[PATCH v6 0/7] treewide: ufs: Add support for Renesas R-Car UFS controller

[PATCH v6 0/7] treewide: ufs: Add support for Renesas R-Car UFS controller

[Yoshihiro Shimoda]

This patch series adds support Renesas R-Car S4-8 UFS controller.
This controller has some restrictions so adds some quirks for it.
Before using this driver, we have to initialize a clock generator
on the environment board (named "Spider") by using the commands of
U-Boot like below:
 => i2c dev 0
 => i2c mw 0x6c 0x26 0x05
 => i2c olen 0x6c 2
 => i2c mw 0x6c 0x13a 0x86
 => i2c mw 0x6c 0x268 0x06
 => i2c mw 0x6c 0x269 0x00
 => i2c mw 0x6c 0x26a 0x3c
 => i2c mw 0x6c 0x26b 0x00
 => i2c mw 0x6c 0x26c 0x06
 => i2c mw 0x6c 0x26d 0x00
 => i2c mw 0x6c 0x26e 0x3f
 => i2c mw 0x6c 0x26f 0x00

Changes from v5:
 - Rebase on the following repositories:
   - Based on renesas-drivers-2022-05-24-v5.18
   - Merged jejb/for-next
 - Add Reviewed-by and Acked-by tags in patch [1/7].
   Note that the document has an error about number of interrupts.
   So, the Renesas UFS has one interrupt and it's the same with ufs-common.yaml.
 - Clear hda->capabilities of MASK_64_ADDRESSING_SUPPORT instead in patch [2/7].
 - Fix some issues in patch [4/7].
 - Add Reviewed-by in patch [6/7] and [7/7].
https://lore.kernel.org/all/20220427123706.555166-2-yoshihiro.shimoda.uh@renesas.com/

Changes from v4:
 - Fix ufs_renesas_of_match was not terminated in patch [4/7].
   (from kernel test robot, thanks!)
https://lore.kernel.org/all/20220420025450.289578-1-yoshihiro.shimoda.uh@renesas.com/

Changes from v3:
 - Fix build warning by clang in patch [4/7].
https://lore.kernel.org/all/20220419120316.209151-1-yoshihiro.shimoda.uh@renesas.com/

Changes from v2:
 - Add Reviewed-by in patch [1/7]. (Krzysztof, thanks!)
 - Use WARN_ON() instead of BUG_ON in patch [4/7].
https://lore.kernel.org/all/20220414023115.4190736-1-yoshihiro.shimoda.uh@renesas.com/

Changes from v1:
 - Fix dt-binding doc in patch [1/7].
 - Add __maybe_unused for compile test on other platforms in patch [4/7].
 - Fix node names in patch [5/7].
https://lore.kernel.org/all/20220412073647.3808493-1-yoshihiro.shimoda.uh@renesas.com/

Yoshihiro Shimoda (7):
  dt-bindings: ufs: Document Renesas R-Car UFS host controller
  ufs: add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS
  ufs: add UFSHCD_QUIRK_HIBERN_FASTAUTO
  scsi: ufs-renesas: Add support for Renesas R-Car UFS controller
  scsi: MAINTAINERS: Add maintainer for Renesas UFS driver
  arm64: dts: renesas: r8a779f0: Add UFS node
  arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

 .../devicetree/bindings/ufs/renesas,ufs.yaml  |  61 +++
 MAINTAINERS                                   |   7 +
 .../boot/dts/renesas/r8a779f0-spider-cpu.dtsi |   8 +
 arch/arm64/boot/dts/renesas/r8a779f0.dtsi     |  19 +
 drivers/ufs/core/ufshcd.c                     |  11 +-
 drivers/ufs/host/Kconfig                      |  12 +
 drivers/ufs/host/Makefile                     |   1 +
 drivers/ufs/host/ufs-renesas.c                | 412 ++++++++++++++++++
 include/ufs/ufshcd.h                          |  12 +
 9 files changed, 541 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/ufs/renesas,ufs.yaml
 create mode 100644 drivers/ufs/host/ufs-renesas.c

-- 
2.25.1

[PATCH v6 1/7] dt-bindings: ufs: Document Renesas R-Car UFS host controller

[Yoshihiro Shimoda]

Document Renesas R-Car UFS host controller for R-Car S4-8 (r8a779f0).

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 .../devicetree/bindings/ufs/renesas,ufs.yaml  | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ufs/renesas,ufs.yaml

diff --git a/Documentation/devicetree/bindings/ufs/renesas,ufs.yaml b/Documentation/devicetree/bindings/ufs/renesas,ufs.yaml
new file mode 100644
index 000000000000..f04f9f61fa9f
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/renesas,ufs.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/renesas,ufs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas R-Car UFS Host Controller
+
+maintainers:
+  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+
+allOf:
+  - $ref: ufs-common.yaml
+
+properties:
+  compatible:
+    const: renesas,r8a779f0-ufs
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: fck
+      - const: ref_clk
+
+  power-domains:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - power-domains
+  - resets
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/power/r8a779f0-sysc.h>
+
+    ufs: ufs@e686000 {
+            compatible = "renesas,r8a779f0-ufs";
+            reg = <0xe6860000 0x100>;
+            interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+            clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>;
+            clock-names = "fck", "ref_clk";
+            freq-table-hz = <200000000 200000000>, <38400000 38400000>;
+            power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+            resets = <&cpg 1514>;
+    };
-- 
2.25.1

[PATCH v6 2/7] ufs: add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS

[Yoshihiro Shimoda]

Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS for a broken host controller
of the 64-bit addressing supported capability.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 drivers/ufs/core/ufshcd.c | 2 ++
 include/ufs/ufshcd.h      | 6 ++++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index 01fb4bad86be..88e567c3ba0b 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -2216,6 +2216,8 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
 	int err;
 
 	hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
+	if (hba->quirks & UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS)
+		hba->capabilities &= ~MASK_64_ADDRESSING_SUPPORT;
 
 	/* nutrs and nutmrs are 0 based values */
 	hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index a92271421718..795c8951341d 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -577,6 +577,12 @@ enum ufshcd_quirks {
 	 * support physical host configuration.
 	 */
 	UFSHCD_QUIRK_SKIP_PH_CONFIGURATION		= 1 << 16,
+
+	/*
+	 * This quirk needs to be enabled if the host controller has
+	 * 64-bit addressing supported capability but it doesn't work.
+	 */
+	UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS		= 1 << 17,
 };
 
 enum ufshcd_caps {
-- 
2.25.1

[PATCH v6 3/7] ufs: add UFSHCD_QUIRK_HIBERN_FASTAUTO

[Yoshihiro Shimoda]

Add UFSHCD_QUIRK_HIBERN_FASTAUTO for a broken host controller of
the auto-hibernate capability but it's FASTAUTO only.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 drivers/ufs/core/ufshcd.c | 9 +++++++--
 include/ufs/ufshcd.h      | 6 ++++++
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index 88e567c3ba0b..bb6cbd514a69 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -4260,8 +4260,13 @@ static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
 	if (hba->max_pwr_info.is_valid)
 		return 0;
 
-	pwr_info->pwr_tx = FAST_MODE;
-	pwr_info->pwr_rx = FAST_MODE;
+	if (hba->quirks & UFSHCD_QUIRK_HIBERN_FASTAUTO) {
+		pwr_info->pwr_tx = FASTAUTO_MODE;
+		pwr_info->pwr_rx = FASTAUTO_MODE;
+	} else {
+		pwr_info->pwr_tx = FAST_MODE;
+		pwr_info->pwr_rx = FAST_MODE;
+	}
 	pwr_info->hs_rate = PA_HS_MODE_B;
 
 	/* Get the connected lane count */
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 795c8951341d..991aea081ec7 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -583,6 +583,12 @@ enum ufshcd_quirks {
 	 * 64-bit addressing supported capability but it doesn't work.
 	 */
 	UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS		= 1 << 17,
+
+	/*
+	 * This quirk needs to be enabled if the host controller has
+	 * auto-hibernate capability but it's FASTAUTO only.
+	 */
+	UFSHCD_QUIRK_HIBERN_FASTAUTO			= 1 << 18,
 };
 
 enum ufshcd_caps {
-- 
2.25.1

[PATCH v6 4/7] scsi: ufs-renesas: Add support for Renesas R-Car UFS controller

[Yoshihiro Shimoda]

Add support for Renesas R-Car UFS controller which needs vender specific
initialization.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 drivers/ufs/host/Kconfig       |  12 +
 drivers/ufs/host/Makefile      |   1 +
 drivers/ufs/host/ufs-renesas.c | 412 +++++++++++++++++++++++++++++++++
 3 files changed, 425 insertions(+)
 create mode 100644 drivers/ufs/host/ufs-renesas.c

diff --git a/drivers/ufs/host/Kconfig b/drivers/ufs/host/Kconfig
index 82590224da13..4cc2dbd79ed0 100644
--- a/drivers/ufs/host/Kconfig
+++ b/drivers/ufs/host/Kconfig
@@ -92,6 +92,18 @@ config SCSI_UFS_HISI
 	  Select this if you have UFS controller on Hisilicon chipset.
 	  If unsure, say N.
 
+config SCSI_UFS_RENESAS
+	tristate "Renesas specific hooks to UFS controller platform driver"
+	depends on (ARCH_RENESAS || COMPILE_TEST) && SCSI_UFSHCD_PLATFORM
+	help
+	  This selects the Renesas specific additions to UFSHCD platform driver.
+	  UFS host on Renesas needs some vendor specific configuration before
+	  accessing the hardware.
+
+	  Select this if you have UFS controller on Renesas chipset.
+
+	  If unsure, say N.
+
 config SCSI_UFS_TI_J721E
 	tristate "TI glue layer for Cadence UFS Controller"
 	depends on OF && HAS_IOMEM && (ARCH_K3 || COMPILE_TEST)
diff --git a/drivers/ufs/host/Makefile b/drivers/ufs/host/Makefile
index e4be54273c98..7717ca93e7d5 100644
--- a/drivers/ufs/host/Makefile
+++ b/drivers/ufs/host/Makefile
@@ -11,4 +11,5 @@ obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
 obj-$(CONFIG_SCSI_UFSHCD_PLATFORM) += ufshcd-pltfrm.o
 obj-$(CONFIG_SCSI_UFS_HISI) += ufs-hisi.o
 obj-$(CONFIG_SCSI_UFS_MEDIATEK) += ufs-mediatek.o
+obj-$(CONFIG_SCSI_UFS_RENESAS) += ufs-renesas.o
 obj-$(CONFIG_SCSI_UFS_TI_J721E) += ti-j721e-ufs.o
diff --git a/drivers/ufs/host/ufs-renesas.c b/drivers/ufs/host/ufs-renesas.c
new file mode 100644
index 000000000000..f8a5e79ed3b4
--- /dev/null
+++ b/drivers/ufs/host/ufs-renesas.c
@@ -0,0 +1,412 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Renesas UFS host controller driver
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/iopoll.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/pm_runtime.h>
+#include <ufs/ufshcd.h>
+
+#include "ufshcd-pltfrm.h"
+
+struct ufs_renesas_priv {
+	bool initialized;	/* The hardware needs initialization once */
+};
+
+enum {
+	SET_PHY_INDEX_LO = 0,
+	SET_PHY_INDEX_HI,
+	TIMER_INDEX,
+	MAX_INDEX
+};
+
+enum ufs_renesas_init_param_mode {
+	MODE_RESTORE,
+	MODE_SET,
+	MODE_SAVE,
+	MODE_POLL,
+	MODE_WAIT,
+	MODE_WRITE,
+};
+
+#define PARAM_RESTORE(_reg, _index) \
+		{ .mode = MODE_RESTORE, .reg = _reg, .index = _index }
+#define PARAM_SET(_index, _set) \
+		{ .mode = MODE_SET, .index = _index, .u.set = _set }
+#define PARAM_SAVE(_reg, _mask, _index) \
+		{ .mode = MODE_SAVE, .reg = _reg, .mask = (u32)(_mask), \
+		  .index = _index }
+#define PARAM_POLL(_reg, _expected, _mask) \
+		{ .mode = MODE_POLL, .reg = _reg, .u.expected = _expected, \
+		  .mask = (u32)(_mask) }
+#define PARAM_WAIT(_delay_us) \
+		{ .mode = MODE_WAIT, .u.delay_us = _delay_us }
+
+#define PARAM_WRITE(_reg, _val) \
+		{ .mode = MODE_WRITE, .reg = _reg, .u.val = _val }
+
+#define PARAM_WRITE_D0_D4(_d0, _d4) \
+		PARAM_WRITE(0xd0, _d0),	PARAM_WRITE(0xd4, _d4)
+
+#define PARAM_WRITE_800_80C_POLL(_addr, _data_800)		\
+		PARAM_WRITE_D0_D4(0x0000080c, 0x00000100),	\
+		PARAM_WRITE_D0_D4(0x00000800, ((_data_800) << 16) | BIT(8) | (_addr)), \
+		PARAM_WRITE(0xd0, 0x0000080c),			\
+		PARAM_POLL(0xd4, BIT(8), BIT(8))
+
+#define PARAM_RESTORE_800_80C_POLL(_index)			\
+		PARAM_WRITE_D0_D4(0x0000080c, 0x00000100),	\
+		PARAM_WRITE(0xd0, 0x00000800),			\
+		PARAM_RESTORE(0xd4, _index),			\
+		PARAM_WRITE(0xd0, 0x0000080c),			\
+		PARAM_POLL(0xd4, BIT(8), BIT(8))
+
+#define PARAM_WRITE_804_80C_POLL(_addr, _data_804)		\
+		PARAM_WRITE_D0_D4(0x0000080c, 0x00000100),	\
+		PARAM_WRITE_D0_D4(0x00000804, ((_data_804) << 16) | BIT(8) | (_addr)), \
+		PARAM_WRITE(0xd0, 0x0000080c),			\
+		PARAM_POLL(0xd4, BIT(8), BIT(8))
+
+#define PARAM_WRITE_828_82C_POLL(_data_828)			\
+		PARAM_WRITE_D0_D4(0x0000082c, 0x0f000000),	\
+		PARAM_WRITE_D0_D4(0x00000828, _data_828),	\
+		PARAM_WRITE(0xd0, 0x0000082c),			\
+		PARAM_POLL(0xd4, _data_828, _data_828)
+
+#define PARAM_WRITE_PHY(_addr16, _data16)			\
+		PARAM_WRITE(0xf0, 1),				\
+		PARAM_WRITE_800_80C_POLL(0x16, (_addr16) & 0xff), \
+		PARAM_WRITE_800_80C_POLL(0x17, ((_addr16) >> 8) & 0xff), \
+		PARAM_WRITE_800_80C_POLL(0x18, (_data16) & 0xff), \
+		PARAM_WRITE_800_80C_POLL(0x19, ((_data16) >> 8) & 0xff), \
+		PARAM_WRITE_800_80C_POLL(0x1c, 0x01),		\
+		PARAM_WRITE_828_82C_POLL(0x0f000000),		\
+		PARAM_WRITE(0xf0, 0)
+
+#define PARAM_SET_PHY(_addr16, _data16)				\
+		PARAM_WRITE(0xf0, 1),				\
+		PARAM_WRITE_800_80C_POLL(0x16, (_addr16) & 0xff), \
+		PARAM_WRITE_800_80C_POLL(0x17, ((_addr16) >> 8) & 0xff), \
+		PARAM_WRITE_800_80C_POLL(0x1c, 0x01),		\
+		PARAM_WRITE_828_82C_POLL(0x0f000000),		\
+		PARAM_WRITE_804_80C_POLL(0x1a, 0),		\
+		PARAM_WRITE(0xd0, 0x00000808),			\
+		PARAM_SAVE(0xd4, 0xff, SET_PHY_INDEX_LO),	\
+		PARAM_WRITE_804_80C_POLL(0x1b, 0),		\
+		PARAM_WRITE(0xd0, 0x00000808),			\
+		PARAM_SAVE(0xd4, 0xff, SET_PHY_INDEX_HI),	\
+		PARAM_WRITE_828_82C_POLL(0x0f000000),		\
+		PARAM_WRITE(0xf0, 0),				\
+		PARAM_WRITE(0xf0, 1),				\
+		PARAM_WRITE_800_80C_POLL(0x16, (_addr16) & 0xff), \
+		PARAM_WRITE_800_80C_POLL(0x17, ((_addr16) >> 8) & 0xff), \
+		PARAM_SET(SET_PHY_INDEX_LO, ((_data16 & 0xff) << 16) | BIT(8) | 0x18), \
+		PARAM_RESTORE_800_80C_POLL(SET_PHY_INDEX_LO),	\
+		PARAM_SET(SET_PHY_INDEX_HI, (((_data16 >> 8) & 0xff) << 16) | BIT(8) | 0x19), \
+		PARAM_RESTORE_800_80C_POLL(SET_PHY_INDEX_HI),	\
+		PARAM_WRITE_800_80C_POLL(0x1c, 0x01),		\
+		PARAM_WRITE_828_82C_POLL(0x0f000000),		\
+		PARAM_WRITE(0xf0, 0)
+
+#define PARAM_INDIRECT_WRITE(_gpio, _addr, _data_800)		\
+		PARAM_WRITE(0xf0, _gpio),			\
+		PARAM_WRITE_800_80C_POLL(_addr, _data_800),	\
+		PARAM_WRITE_828_82C_POLL(0x0f000000),		\
+		PARAM_WRITE(0xf0, 0)
+
+#define PARAM_INDIRECT_POLL(_gpio, _addr, _expected, _mask)	\
+		PARAM_WRITE(0xf0, _gpio),			\
+		PARAM_WRITE_800_80C_POLL(_addr, 0),		\
+		PARAM_WRITE(0xd0, 0x00000808),			\
+		PARAM_POLL(0xd4, _expected, _mask),		\
+		PARAM_WRITE(0xf0, 0)
+
+struct ufs_renesas_init_param {
+	enum ufs_renesas_init_param_mode mode;
+	u32 reg;
+	union {
+		u32 expected;
+		u32 delay_us;
+		u32 set;
+		u32 val;
+	} u;
+	u32 mask;
+	u32 index;
+};
+
+/* This setting is for SERIES B */
+static const struct ufs_renesas_init_param ufs_param[] = {
+	PARAM_WRITE(0xc0, 0x49425308),
+	PARAM_WRITE_D0_D4(0x00000104, 0x00000002),
+	PARAM_WAIT(1),
+	PARAM_WRITE_D0_D4(0x00000828, 0x00000200),
+	PARAM_WAIT(1),
+	PARAM_WRITE_D0_D4(0x00000828, 0x00000000),
+	PARAM_WRITE_D0_D4(0x00000104, 0x00000001),
+	PARAM_WRITE_D0_D4(0x00000940, 0x00000001),
+	PARAM_WAIT(1),
+	PARAM_WRITE_D0_D4(0x00000940, 0x00000000),
+
+	PARAM_WRITE(0xc0, 0x49425308),
+	PARAM_WRITE(0xc0, 0x41584901),
+
+	PARAM_WRITE_D0_D4(0x0000080c, 0x00000100),
+	PARAM_WRITE_D0_D4(0x00000804, 0x00000000),
+	PARAM_WRITE(0xd0, 0x0000080c),
+	PARAM_POLL(0xd4, BIT(8), BIT(8)),
+
+	PARAM_WRITE(REG_CONTROLLER_ENABLE, 0x00000001),
+
+	PARAM_WRITE(0xd0, 0x00000804),
+	PARAM_POLL(0xd4, BIT(8) | BIT(6) | BIT(0), BIT(8) | BIT(6) | BIT(0)),
+
+	PARAM_WRITE(0xd0, 0x00000d00),
+	PARAM_SAVE(0xd4, 0x0000ffff, TIMER_INDEX),
+	PARAM_WRITE(0xd4, 0x00000000),
+	PARAM_WRITE_D0_D4(0x0000082c, 0x0f000000),
+	PARAM_WRITE_D0_D4(0x00000828, 0x08000000),
+	PARAM_WRITE(0xd0, 0x0000082c),
+	PARAM_POLL(0xd4, BIT(27), BIT(27)),
+	PARAM_WRITE(0xd0, 0x00000d2c),
+	PARAM_POLL(0xd4, BIT(0), BIT(0)),
+
+	/* phy setup */
+	PARAM_INDIRECT_WRITE(1, 0x01, 0x001f),
+	PARAM_INDIRECT_WRITE(7, 0x5d, 0x0014),
+	PARAM_INDIRECT_WRITE(7, 0x5e, 0x0014),
+	PARAM_INDIRECT_WRITE(7, 0x0d, 0x0003),
+	PARAM_INDIRECT_WRITE(7, 0x0e, 0x0007),
+	PARAM_INDIRECT_WRITE(7, 0x5f, 0x0003),
+	PARAM_INDIRECT_WRITE(7, 0x60, 0x0003),
+	PARAM_INDIRECT_WRITE(7, 0x5b, 0x00a6),
+	PARAM_INDIRECT_WRITE(7, 0x5c, 0x0003),
+
+	PARAM_INDIRECT_POLL(7, 0x3c, 0, BIT(7)),
+	PARAM_INDIRECT_POLL(7, 0x4c, 0, BIT(4)),
+
+	PARAM_INDIRECT_WRITE(1, 0x32, 0x0080),
+	PARAM_INDIRECT_WRITE(1, 0x1f, 0x0001),
+	PARAM_INDIRECT_WRITE(0, 0x2c, 0x0001),
+	PARAM_INDIRECT_WRITE(0, 0x32, 0x0087),
+
+	PARAM_INDIRECT_WRITE(1, 0x4d, 0x0061),
+	PARAM_INDIRECT_WRITE(4, 0x9b, 0x0009),
+	PARAM_INDIRECT_WRITE(4, 0xa6, 0x0005),
+	PARAM_INDIRECT_WRITE(4, 0xa5, 0x0058),
+	PARAM_INDIRECT_WRITE(1, 0x39, 0x0027),
+	PARAM_INDIRECT_WRITE(1, 0x47, 0x004c),
+
+	PARAM_INDIRECT_WRITE(7, 0x0d, 0x0002),
+	PARAM_INDIRECT_WRITE(7, 0x0e, 0x0007),
+
+	PARAM_WRITE_PHY(0x0028, 0x0061),
+	PARAM_WRITE_PHY(0x4014, 0x0061),
+	PARAM_SET_PHY(0x401c, BIT(2)),
+	PARAM_WRITE_PHY(0x4000, 0x0000),
+	PARAM_WRITE_PHY(0x4001, 0x0000),
+
+	PARAM_WRITE_PHY(0x10ae, 0x0001),
+	PARAM_WRITE_PHY(0x10ad, 0x0000),
+	PARAM_WRITE_PHY(0x10af, 0x0001),
+	PARAM_WRITE_PHY(0x10b6, 0x0001),
+	PARAM_WRITE_PHY(0x10ae, 0x0000),
+
+	PARAM_WRITE_PHY(0x10ae, 0x0001),
+	PARAM_WRITE_PHY(0x10ad, 0x0000),
+	PARAM_WRITE_PHY(0x10af, 0x0002),
+	PARAM_WRITE_PHY(0x10b6, 0x0001),
+	PARAM_WRITE_PHY(0x10ae, 0x0000),
+
+	PARAM_WRITE_PHY(0x10ae, 0x0001),
+	PARAM_WRITE_PHY(0x10ad, 0x0080),
+	PARAM_WRITE_PHY(0x10af, 0x0000),
+	PARAM_WRITE_PHY(0x10b6, 0x0001),
+	PARAM_WRITE_PHY(0x10ae, 0x0000),
+
+	PARAM_WRITE_PHY(0x10ae, 0x0001),
+	PARAM_WRITE_PHY(0x10ad, 0x0080),
+	PARAM_WRITE_PHY(0x10af, 0x001a),
+	PARAM_WRITE_PHY(0x10b6, 0x0001),
+	PARAM_WRITE_PHY(0x10ae, 0x0000),
+
+	PARAM_INDIRECT_WRITE(7, 0x70, 0x0016),
+	PARAM_INDIRECT_WRITE(7, 0x71, 0x0016),
+	PARAM_INDIRECT_WRITE(7, 0x72, 0x0014),
+	PARAM_INDIRECT_WRITE(7, 0x73, 0x0014),
+	PARAM_INDIRECT_WRITE(7, 0x74, 0x0000),
+	PARAM_INDIRECT_WRITE(7, 0x75, 0x0000),
+	PARAM_INDIRECT_WRITE(7, 0x76, 0x0010),
+	PARAM_INDIRECT_WRITE(7, 0x77, 0x0010),
+	PARAM_INDIRECT_WRITE(7, 0x78, 0x00ff),
+	PARAM_INDIRECT_WRITE(7, 0x79, 0x0000),
+
+	PARAM_INDIRECT_WRITE(7, 0x19, 0x0007),
+
+	PARAM_INDIRECT_WRITE(7, 0x1a, 0x0007),
+
+	PARAM_INDIRECT_WRITE(7, 0x24, 0x000c),
+
+	PARAM_INDIRECT_WRITE(7, 0x25, 0x000c),
+
+	PARAM_INDIRECT_WRITE(7, 0x62, 0x0000),
+	PARAM_INDIRECT_WRITE(7, 0x63, 0x0000),
+	PARAM_INDIRECT_WRITE(7, 0x5d, 0x0014),
+	PARAM_INDIRECT_WRITE(7, 0x5e, 0x0017),
+	PARAM_INDIRECT_WRITE(7, 0x5d, 0x0004),
+	PARAM_INDIRECT_WRITE(7, 0x5e, 0x0017),
+	PARAM_INDIRECT_POLL(7, 0x55, 0, BIT(6)),
+	PARAM_INDIRECT_POLL(7, 0x41, 0, BIT(7)),
+	/* end of phy setup */
+
+	PARAM_WRITE(0xf0, 0),
+	PARAM_WRITE(0xd0, 0x00000d00),
+	PARAM_RESTORE(0xd4, TIMER_INDEX),
+};
+
+static void ufs_renesas_dbg_register_dump(struct ufs_hba *hba)
+{
+	ufshcd_dump_regs(hba, 0xc0, 0x40, "regs: 0xc0 + ");
+}
+
+static void ufs_renesas_reg_control(struct ufs_hba *hba,
+				    const struct ufs_renesas_init_param *p)
+{
+	static u32 save[MAX_INDEX];
+	int ret;
+	u32 val;
+
+	WARN_ON(p->index >= MAX_INDEX);
+
+	switch (p->mode) {
+	case MODE_RESTORE:
+		ufshcd_writel(hba, save[p->index], p->reg);
+		break;
+	case MODE_SET:
+		save[p->index] |= p->u.set;
+		break;
+	case MODE_SAVE:
+		save[p->index] = ufshcd_readl(hba, p->reg) & p->mask;
+		break;
+	case MODE_POLL:
+		ret = readl_poll_timeout_atomic(hba->mmio_base + p->reg,
+						val,
+						(val & p->mask) == p->u.expected,
+						10, 1000);
+		if (ret)
+			dev_err(hba->dev, "%s: poll failed %d (%08x, %08x, %08x)\n",
+				__func__, ret, val, p->mask, p->u.expected);
+		break;
+	case MODE_WAIT:
+		if (p->u.delay_us > 1000)
+			mdelay(DIV_ROUND_UP(p->u.delay_us, 1000));
+		else
+			udelay(p->u.delay_us);
+		break;
+	case MODE_WRITE:
+		ufshcd_writel(hba, p->u.val, p->reg);
+		break;
+	default:
+		break;
+	}
+}
+
+static void ufs_renesas_pre_init(struct ufs_hba *hba)
+{
+	const struct ufs_renesas_init_param *p = ufs_param;
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(ufs_param); i++)
+		ufs_renesas_reg_control(hba, &p[i]);
+}
+
+static int ufs_renesas_hce_enable_notify(struct ufs_hba *hba,
+					 enum ufs_notify_change_status status)
+{
+	struct ufs_renesas_priv *priv = ufshcd_get_variant(hba);
+
+	if (priv->initialized)
+		return 0;
+
+	if (status == PRE_CHANGE)
+		ufs_renesas_pre_init(hba);
+
+	priv->initialized = true;
+
+	return 0;
+}
+
+static int ufs_renesas_setup_clocks(struct ufs_hba *hba, bool on,
+				    enum ufs_notify_change_status status)
+{
+	if (on && status == PRE_CHANGE)
+		pm_runtime_get_sync(hba->dev);
+	else if (!on && status == POST_CHANGE)
+		pm_runtime_put(hba->dev);
+
+	return 0;
+}
+
+static int ufs_renesas_init(struct ufs_hba *hba)
+{
+	struct ufs_renesas_priv *priv;
+
+	priv = devm_kmalloc(hba->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	ufshcd_set_variant(hba, priv);
+
+	hba->quirks |= UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS | UFSHCD_QUIRK_HIBERN_FASTAUTO;
+
+	return 0;
+}
+
+static const struct ufs_hba_variant_ops ufs_renesas_vops = {
+	.name		= "renesas",
+	.init		= ufs_renesas_init,
+	.setup_clocks	= ufs_renesas_setup_clocks,
+	.hce_enable_notify = ufs_renesas_hce_enable_notify,
+	.dbg_register_dump = ufs_renesas_dbg_register_dump,
+};
+
+static const struct of_device_id __maybe_unused ufs_renesas_of_match[] = {
+	{ .compatible = "renesas,r8a779f0-ufs" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ufs_renesas_of_match);
+
+static int ufs_renesas_probe(struct platform_device *pdev)
+{
+	return ufshcd_pltfrm_init(pdev, &ufs_renesas_vops);
+}
+
+static int ufs_renesas_remove(struct platform_device *pdev)
+{
+	struct ufs_hba *hba = platform_get_drvdata(pdev);
+
+	ufshcd_remove(hba);
+
+	return 0;
+}
+
+static struct platform_driver ufs_renesas_platform = {
+	.probe	= ufs_renesas_probe,
+	.remove	= ufs_renesas_remove,
+	.driver	= {
+		.name	= "ufshcd-renesas",
+		.of_match_table	= of_match_ptr(ufs_renesas_of_match),
+	},
+};
+module_platform_driver(ufs_renesas_platform);
+
+MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
+MODULE_DESCRIPTION("Renesas UFS host controller driver");
+MODULE_LICENSE("Dual MIT/GPL");
-- 
2.25.1

[PATCH v6 5/7] scsi: MAINTAINERS: Add maintainer for Renesas UFS driver

[Yoshihiro Shimoda]

Add maintainer for Renesas UFS driver.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 MAINTAINERS | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 95cffa82d6d5..06425beb8d05 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20322,6 +20322,13 @@ L:	linux-mediatek@lists.infradead.org (moderated for non-subscribers)
 S:	Maintained
 F:	drivers/ufs/host/ufs-mediatek*
 
+UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER RENESAS HOOKS
+M:	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+L:	linux-renesas-soc@vger.kernel.org
+L:	linux-scsi@vger.kernel.org
+S:	Maintained
+F:	drivers/ufs/host/ufs-renesas.c
+
 UNSORTED BLOCK IMAGES (UBI)
 M:	Richard Weinberger <richard@nod.at>
 L:	linux-mtd@lists.infradead.org
-- 
2.25.1

[PATCH v6 6/7] arm64: dts: renesas: r8a779f0: Add UFS node

[Yoshihiro Shimoda]

Add UFS node for R-Car S4-8 (r8a779f0).

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
index df46fb87cffc..155a7ee8dae4 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
@@ -40,6 +40,13 @@ extalr_clk: extalr {
 		clock-frequency = <0>;
 	};
 
+	ufs30_clk: ufs30-clk {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		/* This value must be overridden by the board */
+		clock-frequency = <0>;
+	};
+
 	pmu_a55 {
 		compatible = "arm,cortex-a55-pmu";
 		interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
@@ -259,6 +266,18 @@ i2c5: i2c@e66e0000 {
 			status = "disabled";
 		};
 
+		ufs: ufs@e6860000 {
+			compatible = "renesas,r8a779f0-ufs";
+			reg = <0 0xe6860000 0 0x100>;
+			interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>;
+			clock-names = "fck", "ref_clk";
+			freq-table-hz = <200000000 200000000>, <38400000 38400000>;
+			power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+			resets = <&cpg 1514>;
+			status = "disabled";
+		};
+
 		scif3: serial@e6c50000 {
 			compatible = "renesas,scif-r8a779f0",
 				     "renesas,rcar-gen4-scif", "renesas,scif";
-- 
2.25.1

[PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Yoshihiro Shimoda]

Enable UFS device for R-Car S4-8 Spider CPU board.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
index 41aa8591b3b1..999c823719bc 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
@@ -82,3 +82,11 @@ &scif3 {
 &scif_clk {
 	clock-frequency = <24000000>;
 };
+
+&ufs {
+	status = "okay";
+};
+
+&ufs30_clk {
+	clock-frequency = <38400000>;
+};
-- 
2.25.1

Re: [PATCH v6 0/7] treewide: ufs: Add support for Renesas R-Car UFS controller

[Geert Uytterhoeven]

Hi Martin,

On Fri, Jun 3, 2022 at 5:40 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> This patch series adds support Renesas R-Car S4-8 UFS controller.
> This controller has some restrictions so adds some quirks for it.
>
> Yoshihiro Shimoda (7):
>   dt-bindings: ufs: Document Renesas R-Car UFS host controller
>   ufs: add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS
>   ufs: add UFSHCD_QUIRK_HIBERN_FASTAUTO
>   scsi: ufs-renesas: Add support for Renesas R-Car UFS controller
>   scsi: MAINTAINERS: Add maintainer for Renesas UFS driver
>   arm64: dts: renesas: r8a779f0: Add UFS node
>   arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

I see you have applied this series, including the DTS parts, to
your for-next tree. Please never apply DTS patches to the SCSI tree,
as they are meant to go in through the soc tree.

Can you please drop the last two patches from your tree?
Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v6 6/7] arm64: dts: renesas: r8a779f0: Add UFS node

[Geert Uytterhoeven]

Hi Shimoda-san,

On Fri, Jun 3, 2022 at 1:05 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> Add UFS node for R-Car S4-8 (r8a779f0).
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Now the binding/driver parts have been accepted, I will queue this
patch in renesas-devel for v5.20, with the ufs30-clk node moved,
to preserve alphabetical sort order.

> --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
> @@ -40,6 +40,13 @@ extalr_clk: extalr {
>                 clock-frequency = <0>;
>         };
>
> +       ufs30_clk: ufs30-clk {
> +               compatible = "fixed-clock";
> +               #clock-cells = <0>;
> +               /* This value must be overridden by the board */
> +               clock-frequency = <0>;
> +       };
> +
>         pmu_a55 {
>                 compatible = "arm,cortex-a55-pmu";
>                 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
> @@ -259,6 +266,18 @@ i2c5: i2c@e66e0000 {
>                         status = "disabled";
>                 };
>
> +               ufs: ufs@e6860000 {
> +                       compatible = "renesas,r8a779f0-ufs";
> +                       reg = <0 0xe6860000 0 0x100>;
> +                       interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>;
> +                       clock-names = "fck", "ref_clk";
> +                       freq-table-hz = <200000000 200000000>, <38400000 38400000>;
> +                       power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> +                       resets = <&cpg 1514>;
> +                       status = "disabled";
> +               };
> +
>                 scif3: serial@e6c50000 {
>                         compatible = "renesas,scif-r8a779f0",
>                                      "renesas,rcar-gen4-scif", "renesas,scif";

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Geert Uytterhoeven]

Hi Shimoda-san,

On Fri, Jun 3, 2022 at 1:05 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> Enable UFS device for R-Car S4-8 Spider CPU board.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
> @@ -82,3 +82,11 @@ &scif3 {
>  &scif_clk {
>         clock-frequency = <24000000>;
>  };
> +
> +&ufs {
> +       status = "okay";
> +};
> +
> +&ufs30_clk {
> +       clock-frequency = <38400000>;
> +};

Given this relies on either the boot loader setting up ufs30_clk,
like is usually done for the PCIe bus clock, or on adding a proper
clock driver to Linux, I think this patch should be postponed.

Or perhaps the latest firmware stack has fixed the issue?
Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v6 0/7] treewide: ufs: Add support for Renesas R-Car UFS controller

[Martin K. Petersen]

Geert,

> I see you have applied this series, including the DTS parts, to your
> for-next tree. Please never apply DTS patches to the SCSI tree, as
> they are meant to go in through the soc tree.

OK. Just queued it up in for-next to see what would break. It's not in
the actual queue for 5.20.

> Can you please drop the last two patches from your tree?

Sure. I can also wait with the rest if you prefer?

-- 
Martin K. Petersen	Oracle Linux Engineering

Re: [PATCH v6 0/7] treewide: ufs: Add support for Renesas R-Car UFS controller

[Geert Uytterhoeven]

Hi Martin,

On Wed, Jun 15, 2022 at 4:54 AM Martin K. Petersen
<martin.petersen@oracle.com> wrote:
> > I see you have applied this series, including the DTS parts, to your
> > for-next tree. Please never apply DTS patches to the SCSI tree, as
> > they are meant to go in through the soc tree.
>
> OK. Just queued it up in for-next to see what would break. It's not in
> the actual queue for 5.20.

IC. How will I know when they are queued for real?

> > Can you please drop the last two patches from your tree?
>
> Sure. I can also wait with the rest if you prefer?

No need to wait with the rest, unless you are not happy with it yet?
Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v6 0/7] treewide: ufs: Add support for Renesas R-Car UFS controller

[Martin K. Petersen]

Geert,

>> OK. Just queued it up in for-next to see what would break. It's not in
>> the actual queue for 5.20.
>
> IC. How will I know when they are queued for real?

I send out merge notifications when patches end up in either 'fixes' or
'queue'.

My 'for-next' branch is ephemeral and I often queue things to just see
what breaks. I do not have the ability to test several of the drivers
that go through my tree so I do depend on the various checkers to help
identify issues prior to merging.

> No need to wait with the rest, unless you are not happy with it yet?
> Thanks!

The rest looks OK to me. I'll leave it in.

-- 
Martin K. Petersen	Oracle Linux Engineering

Re: [PATCH v6 0/7] treewide: ufs: Add support for Renesas R-Car UFS controller

[Martin K. Petersen]

On Fri, 3 Jun 2022 20:05:17 +0900, Yoshihiro Shimoda wrote:

> This patch series adds support Renesas R-Car S4-8 UFS controller.
> This controller has some restrictions so adds some quirks for it.
> Before using this driver, we have to initialize a clock generator
> on the environment board (named "Spider") by using the commands of
> U-Boot like below:
>  => i2c dev 0
>  => i2c mw 0x6c 0x26 0x05
>  => i2c olen 0x6c 2
>  => i2c mw 0x6c 0x13a 0x86
>  => i2c mw 0x6c 0x268 0x06
>  => i2c mw 0x6c 0x269 0x00
>  => i2c mw 0x6c 0x26a 0x3c
>  => i2c mw 0x6c 0x26b 0x00
>  => i2c mw 0x6c 0x26c 0x06
>  => i2c mw 0x6c 0x26d 0x00
>  => i2c mw 0x6c 0x26e 0x3f
>  => i2c mw 0x6c 0x26f 0x00
> 
> [...]

Applied to 5.20/scsi-queue, thanks!

[1/7] dt-bindings: ufs: Document Renesas R-Car UFS host controller
      https://git.kernel.org/mkp/scsi/c/7522c08d1e55
[2/7] ufs: add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS
      https://git.kernel.org/mkp/scsi/c/6554400d6f66
[3/7] ufs: add UFSHCD_QUIRK_HIBERN_FASTAUTO
      https://git.kernel.org/mkp/scsi/c/2f11bbc2c7f3
[4/7] scsi: ufs-renesas: Add support for Renesas R-Car UFS controller
      https://git.kernel.org/mkp/scsi/c/d69520288efd
[5/7] scsi: MAINTAINERS: Add maintainer for Renesas UFS driver
      https://git.kernel.org/mkp/scsi/c/09c962fd4816

-- 
Martin K. Petersen	Oracle Linux Engineering

Re: [PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Wolfram Sang]

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Hi Shimoda-san, Geert,

On Fri, Jun 03, 2022 at 08:05:24PM +0900, Yoshihiro Shimoda wrote:
> Enable UFS device for R-Car S4-8 Spider CPU board.
> 
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

With my firmware, the manual setup of the clock in the bootloader is
still needed. So, yes, I agree we should wait with this patch until we
have a better way to deal with the clock.

Other than that, the patches give me SCSI disks I can work with
(partition, read, write). There are a few initial errors, though:

[    0.449917] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03 for idn 1 failed, index 0, err = 253
[    0.452035] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03 for idn 1 failed, index 0, err = 253
[    0.453859] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03 for idn 1 failed, index 0, err = 253
[    0.453874] ufshcd-renesas e6860000.ufs: ufshcd_query_attr_retry: query attribute, idn 1, failed with error 253 after 3 retires

(A patch for the typo in the last line has already been sent)

But after that, everything looks fine on first testing. So, for the
patches:

Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Happy hacking!


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RE: [PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Avri Altman]

> Hi Shimoda-san, Geert,
> 
> On Fri, Jun 03, 2022 at 08:05:24PM +0900, Yoshihiro Shimoda wrote:
> > Enable UFS device for R-Car S4-8 Spider CPU board.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> With my firmware, the manual setup of the clock in the bootloader is still
> needed. So, yes, I agree we should wait with this patch until we have a better
> way to deal with the clock.
> 
> Other than that, the patches give me SCSI disks I can work with (partition,
> read, write). There are a few initial errors, though:
> 
> [    0.449917] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03
> for idn 1 failed, index 0, err = 253
> [    0.452035] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03
> for idn 1 failed, index 0, err = 253
> [    0.453859] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03
> for idn 1 failed, index 0, err = 253
> [    0.453874] ufshcd-renesas e6860000.ufs: ufshcd_query_attr_retry: query
> attribute, idn 1, failed with error 253 after 3 retires
Should be interesting to find out who is trying to read an undefined (reserved) attribute in your system.

Thanks,
Avri
> 
> (A patch for the typo in the last line has already been sent)
> 
> But after that, everything looks fine on first testing. So, for the
> patches:
> 
> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> 
> Happy hacking!

RE: [PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Yoshihiro Shimoda]

Hi Wolfram-san,

> From: Wolfram Sang, Sent: Wednesday, June 22, 2022 12:14 AM
> 
> Hi Shimoda-san, Geert,
> 
> On Fri, Jun 03, 2022 at 08:05:24PM +0900, Yoshihiro Shimoda wrote:
> > Enable UFS device for R-Car S4-8 Spider CPU board.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> With my firmware, the manual setup of the clock in the bootloader is
> still needed. So, yes, I agree we should wait with this patch until we
> have a better way to deal with the clock.
> 
> Other than that, the patches give me SCSI disks I can work with
> (partition, read, write). There are a few initial errors, though:
> 
> [    0.449917] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03 for idn 1 failed, index 0, err = 253
> [    0.452035] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03 for idn 1 failed, index 0, err = 253
> [    0.453859] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03 for idn 1 failed, index 0, err = 253
> [    0.453874] ufshcd-renesas e6860000.ufs: ufshcd_query_attr_retry: query attribute, idn 1, failed with error 253 after
> 3 retires

Hmm, my environment [1] could not reproduce this error messages. 

[1]
based on renesas-drivers-2022-05-24-v5.18 which I made the patches.
Perhaps, should I test on the latest kernel?
Which kernel version did you test?

> (A patch for the typo in the last line has already been sent)

Thank you for sending a patch!

> But after that, everything looks fine on first testing. So, for the
> patches:
> 
> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Thank you for testing!

Best regards,
Yoshihiro Shimoda

> Happy hacking!

Re: [PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Wolfram Sang]

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Hi Shimoda-san,

> Hmm, my environment [1] could not reproduce this error messages. 

Interesting. I will add some debug output to provide more information.

> based on renesas-drivers-2022-05-24-v5.18 which I made the patches.
> Perhaps, should I test on the latest kernel?
> Which kernel version did you test?

renesas-drivers-2022-06-07-v5.19-rc1 with my Thermal, HSCIF, and your
UFS patches on top. I pushed it here:

git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/s4/ufs-experimental

I'll be back soon,

   Wolfram


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RE: [PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Yoshihiro Shimoda]

Hi Wolfram-san,

> From: Wolfram Sang, Sent: Wednesday, June 22, 2022 5:23 PM
> 
> Hi Shimoda-san,
> 
> > Hmm, my environment [1] could not reproduce this error messages.
> 
> Interesting. I will add some debug output to provide more information.

Thanks!

> > based on renesas-drivers-2022-05-24-v5.18 which I made the patches.
> > Perhaps, should I test on the latest kernel?
> > Which kernel version did you test?
> 
> renesas-drivers-2022-06-07-v5.19-rc1 with my Thermal, HSCIF, and your
> UFS patches on top. I pushed it here:
> 
> git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/s4/ufs-experimental

Thank you for sharing your branch. I'll check this tomorrow.

> I'll be back soon,

I'm afraid, but I'll be out-of-office today after I sent this email.
So, no rush is needed :)

Best regards,
Yoshihiro Shimoda

>    Wolfram

Re: [PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Wolfram Sang]

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Hi Avri, all,

> > [    0.449917] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03
> > for idn 1 failed, index 0, err = 253
> > [    0.452035] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03
> > for idn 1 failed, index 0, err = 253
> > [    0.453859] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode 0x03
> > for idn 1 failed, index 0, err = 253
> > [    0.453874] ufshcd-renesas e6860000.ufs: ufshcd_query_attr_retry: query
> > attribute, idn 1, failed with error 253 after 3 retires
> Should be interesting to find out who is trying to read an undefined (reserved) attribute in your system.

So, the call trace is:

[    0.455361] Call trace:
[    0.455521]  ufshcd_query_attr_retry+0x68/0xb0
[    0.455808]  ufshpb_get_dev_info+0x80/0x110
[    0.456083]  ufshcd_probe_hba+0xce0/0x10d0
[    0.456349]  ufshcd_async_scan+0x34/0x310
[    0.456609]  async_run_entry_fn+0x34/0x130
[    0.456873]  process_one_work+0x1e4/0x434
[    0.457136]  worker_thread+0x174/0x4dc
[    0.457379]  kthread+0xdc/0xe0
[    0.457580]  ret_from_fork+0x10/0x20

which leads me to this call in ufshpb_get_dev_info():

2622         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
2623                 QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD, 0, 0, &max_single_cmd);

And from here on, I miss the UFS experience to debug further. But I will
happily provide more information if people give me pointers.

All the best,

   Wolfram

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RE: [PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Avri Altman]

> Hi Avri, all,
> 
> > > [    0.449917] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode
> 0x03
> > > for idn 1 failed, index 0, err = 253
> > > [    0.452035] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode
> 0x03
> > > for idn 1 failed, index 0, err = 253
> > > [    0.453859] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode
> 0x03
> > > for idn 1 failed, index 0, err = 253
> > > [    0.453874] ufshcd-renesas e6860000.ufs: ufshcd_query_attr_retry:
> query
> > > attribute, idn 1, failed with error 253 after 3 retires
> > Should be interesting to find out who is trying to read an undefined
> (reserved) attribute in your system.
> 
> So, the call trace is:
> 
> [    0.455361] Call trace:
> [    0.455521]  ufshcd_query_attr_retry+0x68/0xb0
> [    0.455808]  ufshpb_get_dev_info+0x80/0x110
> [    0.456083]  ufshcd_probe_hba+0xce0/0x10d0
> [    0.456349]  ufshcd_async_scan+0x34/0x310
> [    0.456609]  async_run_entry_fn+0x34/0x130
> [    0.456873]  process_one_work+0x1e4/0x434
> [    0.457136]  worker_thread+0x174/0x4dc
> [    0.457379]  kthread+0xdc/0xe0
> [    0.457580]  ret_from_fork+0x10/0x20
> 
> which leads me to this call in ufshpb_get_dev_info():
> 
> 2622         ret = ufshcd_query_attr_retry(hba,
> UPIU_QUERY_OPCODE_READ_ATTR,
> 2623                 QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD, 0, 0,
> &max_single_cmd);
> 
> And from here on, I miss the UFS experience to debug further. But I will
> happily provide more information if people give me pointers.
Ah ok.
That's cool - HPB is enable on your platform.
For some reason JEDEC didn't merge the HPB amendment into UFS4.0 - and I forgot all about that attribute.

Thanks,
Avri

> 
> All the best,
> 
>    Wolfram

RE: [PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Avri Altman]

> > Hi Avri, all,
> >
> > > > [    0.449917] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode
> > 0x03
> > > > for idn 1 failed, index 0, err = 253
> > > > [    0.452035] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode
> > 0x03
> > > > for idn 1 failed, index 0, err = 253
> > > > [    0.453859] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode
> > 0x03
> > > > for idn 1 failed, index 0, err = 253
> > > > [    0.453874] ufshcd-renesas e6860000.ufs: ufshcd_query_attr_retry:
> > query
> > > > attribute, idn 1, failed with error 253 after 3 retires
> > > Should be interesting to find out who is trying to read an undefined
> > (reserved) attribute in your system.
> >
> > So, the call trace is:
> >
> > [    0.455361] Call trace:
> > [    0.455521]  ufshcd_query_attr_retry+0x68/0xb0
> > [    0.455808]  ufshpb_get_dev_info+0x80/0x110
> > [    0.456083]  ufshcd_probe_hba+0xce0/0x10d0
> > [    0.456349]  ufshcd_async_scan+0x34/0x310
> > [    0.456609]  async_run_entry_fn+0x34/0x130
> > [    0.456873]  process_one_work+0x1e4/0x434
> > [    0.457136]  worker_thread+0x174/0x4dc
> > [    0.457379]  kthread+0xdc/0xe0
> > [    0.457580]  ret_from_fork+0x10/0x20
> >
> > which leads me to this call in ufshpb_get_dev_info():
> >
> > 2622         ret = ufshcd_query_attr_retry(hba,
> > UPIU_QUERY_OPCODE_READ_ATTR,
> > 2623                 QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD, 0, 0,
> > &max_single_cmd);
> >
> > And from here on, I miss the UFS experience to debug further. But I
> > will happily provide more information if people give me pointers.
> Ah ok.
> That's cool - HPB is enable on your platform.
> For some reason JEDEC didn't merge the HPB amendment into UFS4.0 - and I
> forgot all about that attribute.
And the source of this error is that your device does not support HPB2.0,
Which is fine, because HPB2.0 support was removed a while ago.

Thanks,
Avri

> 
> Thanks,
> Avri
> 
> >
> > All the best,
> >
> >    Wolfram

Re: [PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Wolfram Sang]

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Hi Avri,

> > > which leads me to this call in ufshpb_get_dev_info():
> > >
> > > 2622         ret = ufshcd_query_attr_retry(hba,
> > > UPIU_QUERY_OPCODE_READ_ATTR,
> > > 2623                 QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD, 0, 0,
> > > &max_single_cmd);
> > >
> > > And from here on, I miss the UFS experience to debug further. But I
> > > will happily provide more information if people give me pointers.
> > Ah ok.
> > That's cool - HPB is enable on your platform.
> > For some reason JEDEC didn't merge the HPB amendment into UFS4.0 - and I
> > forgot all about that attribute.
> And the source of this error is that your device does not support HPB2.0,
> Which is fine, because HPB2.0 support was removed a while ago.

As I understand, the UFS core needs an update then? If you CC me on
patches, I will test them right away.

Happy hacking,

   Wolfram


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RE: [PATCH v6 7/7] arm64: dts: renesas: r8a779f0: spider-cpu: Enable UFS device

[Yoshihiro Shimoda]

Hi Avri, Wolfram-san,

> From: Avri Altman, Sent: Wednesday, June 22, 2022 6:47 PM
> 
> > > Hi Avri, all,
> > >
> > > > > [    0.449917] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode
> > > 0x03
> > > > > for idn 1 failed, index 0, err = 253
> > > > > [    0.452035] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode
> > > 0x03
> > > > > for idn 1 failed, index 0, err = 253
> > > > > [    0.453859] ufshcd-renesas e6860000.ufs: ufshcd_query_attr: opcode
> > > 0x03
> > > > > for idn 1 failed, index 0, err = 253
> > > > > [    0.453874] ufshcd-renesas e6860000.ufs: ufshcd_query_attr_retry:
> > > query
> > > > > attribute, idn 1, failed with error 253 after 3 retires
> > > > Should be interesting to find out who is trying to read an undefined
> > > (reserved) attribute in your system.
> > >
> > > So, the call trace is:
> > >
> > > [    0.455361] Call trace:
> > > [    0.455521]  ufshcd_query_attr_retry+0x68/0xb0
> > > [    0.455808]  ufshpb_get_dev_info+0x80/0x110
> > > [    0.456083]  ufshcd_probe_hba+0xce0/0x10d0
> > > [    0.456349]  ufshcd_async_scan+0x34/0x310
> > > [    0.456609]  async_run_entry_fn+0x34/0x130
> > > [    0.456873]  process_one_work+0x1e4/0x434
> > > [    0.457136]  worker_thread+0x174/0x4dc
> > > [    0.457379]  kthread+0xdc/0xe0
> > > [    0.457580]  ret_from_fork+0x10/0x20
> > >
> > > which leads me to this call in ufshpb_get_dev_info():
> > >
> > > 2622         ret = ufshcd_query_attr_retry(hba,
> > > UPIU_QUERY_OPCODE_READ_ATTR,
> > > 2623                 QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD, 0, 0,
> > > &max_single_cmd);
> > >
> > > And from here on, I miss the UFS experience to debug further. But I
> > > will happily provide more information if people give me pointers.
> > Ah ok.
> > That's cool - HPB is enable on your platform.

Thank you for the information. I disabled CONFIG_SCSI_UFS_HPB on my environment.
After I enabled the config, it also output the messages.

> > For some reason JEDEC didn't merge the HPB amendment into UFS4.0 - and I
> > forgot all about that attribute.
> And the source of this error is that your device does not support HPB2.0,
> Which is fine, because HPB2.0 support was removed a while ago.

According to Device Descriptor information of my environment, the UFS device
itself seems to support HPB2.0.
-----
Device Descriptor [Byte offset 0x1f]: bUFSFeaturesSupport = 0xff  <--- so device supports HPB
...
Device Descriptor [Byte offset 0x40]: wHPBVersion = 0x200
Device Descriptor [Byte offset 0x42]: bHPBControl = 0x1
-----

Anyway, the UFS driver seems to work correctly, IIUC.

Best regards,
Yoshihiro Shimoda

> Thanks,
> Avri
> 
> >
> > Thanks,
> > Avri
> >
> > >
> > > All the best,
> > >
> > >    Wolfram