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From: Liang Yang <liang.yang@amlogic.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	<linux-mtd@lists.infradead.org>
Cc: Liang Yang <liang.yang@amlogic.com>,
	Rob Herring <robh@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Jianxin Pan <jianxin.pan@amlogic.com>,
	Victor Wan <victor.wan@amlogic.com>,
	XianWei Zhao <xianwei.zhao@amlogic.com>,
	Kelvin Zhang <kelvin.zhang@amlogic.com>,
	BiChao Zheng <bichao.zheng@amlogic.com>,
	YongHui Yu <yonghui.yu@amlogic.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-amlogic@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: [PATCH v6 1/5] dt-bindings: nand: meson: fix meson nfc clock
Date: Tue, 7 Jun 2022 14:47:26 +0800	[thread overview]
Message-ID: <20220607064731.13367-2-liang.yang@amlogic.com> (raw)
In-Reply-To: <20220607064731.13367-1-liang.yang@amlogic.com>

EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
 .../bindings/mtd/amlogic,meson-nand.txt       | 29 ++++++++-----------
 1 file changed, 12 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
index 5794ab1147c1..5d5cdfef417f 100644
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
@@ -7,18 +7,19 @@ Required properties:
 - compatible : contains one of:
   - "amlogic,meson-gxl-nfc"
   - "amlogic,meson-axg-nfc"
+
+- reg        : Offset and length of the register set
+
+- reg-names  : "nfc" is the register set for NFC controller and "emmc"
+		is the register set for MCI controller.
+
 - clocks     :
 	A list of phandle + clock-specifier pairs for the clocks listed
 	in clock-names.
 
 - clock-names: Should contain the following:
 	"core" - NFC module gate clock
-	"device" - device clock from eMMC sub clock controller
-	"rx" - rx clock phase
-	"tx" - tx clock phase
-
-- amlogic,mmc-syscon	: Required for NAND clocks, it's shared with SD/eMMC
-				controller port C
+	"device" - parent clock for internal NFC
 
 Optional children nodes:
 Children nodes represent the available nand chips.
@@ -28,24 +29,18 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi
 
 Example demonstrate on AXG SoC:
 
-	sd_emmc_c_clkc: mmc@7000 {
-		compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
-		reg = <0x0 0x7000 0x0 0x800>;
-	};
-
 	nand-controller@7800 {
 		compatible = "amlogic,meson-axg-nfc";
-		reg = <0x0 0x7800 0x0 0x100>;
+		reg = <0x0 0x7800 0x0 0x100>,
+		      <0x0 0x7000 0x0 0x800>;
+		reg-names = "nfc", "emmc";
 		#address-cells = <1>;
 		#size-cells = <0>;
 		interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
 
 		clocks = <&clkc CLKID_SD_EMMC_C>,
-			<&sd_emmc_c_clkc CLKID_MMC_DIV>,
-			<&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
-			<&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
-		clock-names = "core", "device", "rx", "tx";
-		amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
+			 <&clkc CLKID_FCLK_DIV2>;
+		clock-names = "core", "device";
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&nand_pins>;
-- 
2.34.1


WARNING: multiple messages have this Message-ID
From: Liang Yang <liang.yang@amlogic.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	<linux-mtd@lists.infradead.org>
Cc: Liang Yang <liang.yang@amlogic.com>,
	Rob Herring <robh@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Jianxin Pan <jianxin.pan@amlogic.com>,
	Victor Wan <victor.wan@amlogic.com>,
	XianWei Zhao <xianwei.zhao@amlogic.com>,
	Kelvin Zhang <kelvin.zhang@amlogic.com>,
	BiChao Zheng <bichao.zheng@amlogic.com>,
	YongHui Yu <yonghui.yu@amlogic.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-amlogic@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: [PATCH v6 1/5] dt-bindings: nand: meson: fix meson nfc clock
Date: Tue, 7 Jun 2022 14:47:26 +0800	[thread overview]
Message-ID: <20220607064731.13367-2-liang.yang@amlogic.com> (raw)
In-Reply-To: <20220607064731.13367-1-liang.yang@amlogic.com>

EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
 .../bindings/mtd/amlogic,meson-nand.txt       | 29 ++++++++-----------
 1 file changed, 12 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
index 5794ab1147c1..5d5cdfef417f 100644
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
@@ -7,18 +7,19 @@ Required properties:
 - compatible : contains one of:
   - "amlogic,meson-gxl-nfc"
   - "amlogic,meson-axg-nfc"
+
+- reg        : Offset and length of the register set
+
+- reg-names  : "nfc" is the register set for NFC controller and "emmc"
+		is the register set for MCI controller.
+
 - clocks     :
 	A list of phandle + clock-specifier pairs for the clocks listed
 	in clock-names.
 
 - clock-names: Should contain the following:
 	"core" - NFC module gate clock
-	"device" - device clock from eMMC sub clock controller
-	"rx" - rx clock phase
-	"tx" - tx clock phase
-
-- amlogic,mmc-syscon	: Required for NAND clocks, it's shared with SD/eMMC
-				controller port C
+	"device" - parent clock for internal NFC
 
 Optional children nodes:
 Children nodes represent the available nand chips.
@@ -28,24 +29,18 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi
 
 Example demonstrate on AXG SoC:
 
-	sd_emmc_c_clkc: mmc@7000 {
-		compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
-		reg = <0x0 0x7000 0x0 0x800>;
-	};
-
 	nand-controller@7800 {
 		compatible = "amlogic,meson-axg-nfc";
-		reg = <0x0 0x7800 0x0 0x100>;
+		reg = <0x0 0x7800 0x0 0x100>,
+		      <0x0 0x7000 0x0 0x800>;
+		reg-names = "nfc", "emmc";
 		#address-cells = <1>;
 		#size-cells = <0>;
 		interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
 
 		clocks = <&clkc CLKID_SD_EMMC_C>,
-			<&sd_emmc_c_clkc CLKID_MMC_DIV>,
-			<&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
-			<&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
-		clock-names = "core", "device", "rx", "tx";
-		amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
+			 <&clkc CLKID_FCLK_DIV2>;
+		clock-names = "core", "device";
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&nand_pins>;
-- 
2.34.1


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

WARNING: multiple messages have this Message-ID
From: Liang Yang <liang.yang@amlogic.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	<linux-mtd@lists.infradead.org>
Cc: Liang Yang <liang.yang@amlogic.com>,
	Rob Herring <robh@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Jianxin Pan <jianxin.pan@amlogic.com>,
	Victor Wan <victor.wan@amlogic.com>,
	XianWei Zhao <xianwei.zhao@amlogic.com>,
	Kelvin Zhang <kelvin.zhang@amlogic.com>,
	BiChao Zheng <bichao.zheng@amlogic.com>,
	YongHui Yu <yonghui.yu@amlogic.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-amlogic@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: [PATCH v6 1/5] dt-bindings: nand: meson: fix meson nfc clock
Date: Tue, 7 Jun 2022 14:47:26 +0800	[thread overview]
Message-ID: <20220607064731.13367-2-liang.yang@amlogic.com> (raw)
In-Reply-To: <20220607064731.13367-1-liang.yang@amlogic.com>

EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
 .../bindings/mtd/amlogic,meson-nand.txt       | 29 ++++++++-----------
 1 file changed, 12 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
index 5794ab1147c1..5d5cdfef417f 100644
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
@@ -7,18 +7,19 @@ Required properties:
 - compatible : contains one of:
   - "amlogic,meson-gxl-nfc"
   - "amlogic,meson-axg-nfc"
+
+- reg        : Offset and length of the register set
+
+- reg-names  : "nfc" is the register set for NFC controller and "emmc"
+		is the register set for MCI controller.
+
 - clocks     :
 	A list of phandle + clock-specifier pairs for the clocks listed
 	in clock-names.
 
 - clock-names: Should contain the following:
 	"core" - NFC module gate clock
-	"device" - device clock from eMMC sub clock controller
-	"rx" - rx clock phase
-	"tx" - tx clock phase
-
-- amlogic,mmc-syscon	: Required for NAND clocks, it's shared with SD/eMMC
-				controller port C
+	"device" - parent clock for internal NFC
 
 Optional children nodes:
 Children nodes represent the available nand chips.
@@ -28,24 +29,18 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi
 
 Example demonstrate on AXG SoC:
 
-	sd_emmc_c_clkc: mmc@7000 {
-		compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
-		reg = <0x0 0x7000 0x0 0x800>;
-	};
-
 	nand-controller@7800 {
 		compatible = "amlogic,meson-axg-nfc";
-		reg = <0x0 0x7800 0x0 0x100>;
+		reg = <0x0 0x7800 0x0 0x100>,
+		      <0x0 0x7000 0x0 0x800>;
+		reg-names = "nfc", "emmc";
 		#address-cells = <1>;
 		#size-cells = <0>;
 		interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
 
 		clocks = <&clkc CLKID_SD_EMMC_C>,
-			<&sd_emmc_c_clkc CLKID_MMC_DIV>,
-			<&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
-			<&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
-		clock-names = "core", "device", "rx", "tx";
-		amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
+			 <&clkc CLKID_FCLK_DIV2>;
+		clock-names = "core", "device";
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&nand_pins>;
-- 
2.34.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID
From: Liang Yang <liang.yang@amlogic.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	<linux-mtd@lists.infradead.org>
Cc: Liang Yang <liang.yang@amlogic.com>,
	Rob Herring <robh@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Jianxin Pan <jianxin.pan@amlogic.com>,
	Victor Wan <victor.wan@amlogic.com>,
	XianWei Zhao <xianwei.zhao@amlogic.com>,
	Kelvin Zhang <kelvin.zhang@amlogic.com>,
	BiChao Zheng <bichao.zheng@amlogic.com>,
	YongHui Yu <yonghui.yu@amlogic.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-amlogic@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: [PATCH v6 1/5] dt-bindings: nand: meson: fix meson nfc clock
Date: Tue, 7 Jun 2022 14:47:26 +0800	[thread overview]
Message-ID: <20220607064731.13367-2-liang.yang@amlogic.com> (raw)
In-Reply-To: <20220607064731.13367-1-liang.yang@amlogic.com>

EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
 .../bindings/mtd/amlogic,meson-nand.txt       | 29 ++++++++-----------
 1 file changed, 12 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
index 5794ab1147c1..5d5cdfef417f 100644
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
@@ -7,18 +7,19 @@ Required properties:
 - compatible : contains one of:
   - "amlogic,meson-gxl-nfc"
   - "amlogic,meson-axg-nfc"
+
+- reg        : Offset and length of the register set
+
+- reg-names  : "nfc" is the register set for NFC controller and "emmc"
+		is the register set for MCI controller.
+
 - clocks     :
 	A list of phandle + clock-specifier pairs for the clocks listed
 	in clock-names.
 
 - clock-names: Should contain the following:
 	"core" - NFC module gate clock
-	"device" - device clock from eMMC sub clock controller
-	"rx" - rx clock phase
-	"tx" - tx clock phase
-
-- amlogic,mmc-syscon	: Required for NAND clocks, it's shared with SD/eMMC
-				controller port C
+	"device" - parent clock for internal NFC
 
 Optional children nodes:
 Children nodes represent the available nand chips.
@@ -28,24 +29,18 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi
 
 Example demonstrate on AXG SoC:
 
-	sd_emmc_c_clkc: mmc@7000 {
-		compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
-		reg = <0x0 0x7000 0x0 0x800>;
-	};
-
 	nand-controller@7800 {
 		compatible = "amlogic,meson-axg-nfc";
-		reg = <0x0 0x7800 0x0 0x100>;
+		reg = <0x0 0x7800 0x0 0x100>,
+		      <0x0 0x7000 0x0 0x800>;
+		reg-names = "nfc", "emmc";
 		#address-cells = <1>;
 		#size-cells = <0>;
 		interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
 
 		clocks = <&clkc CLKID_SD_EMMC_C>,
-			<&sd_emmc_c_clkc CLKID_MMC_DIV>,
-			<&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
-			<&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
-		clock-names = "core", "device", "rx", "tx";
-		amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
+			 <&clkc CLKID_FCLK_DIV2>;
+		clock-names = "core", "device";
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&nand_pins>;
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-06-07  6:47 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-07  6:47 [PATCH v6 0/5] fix the meson NFC clock Liang Yang
2022-06-07  6:47 ` Liang Yang
2022-06-07  6:47 ` Liang Yang
2022-06-07  6:47 ` Liang Yang
2022-06-07  6:47 ` Liang Yang [this message]
2022-06-07  6:47   ` [PATCH v6 1/5] dt-bindings: nand: meson: fix meson nfc clock Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47 ` [PATCH v6 2/5] mtd: rawnand: meson: fix the clock Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47 ` [PATCH v6 3/5] mtd: rawnand: meson: refine resource getting in probe Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47 ` [PATCH v6 4/5] dt-bindings: nand: meson: convert txt to yaml Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47 ` [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  6:47   ` Liang Yang
2022-06-07  7:12   ` Neil Armstrong
2022-06-07  7:12     ` Neil Armstrong
2022-06-07  7:12     ` Neil Armstrong
2022-06-07  7:12     ` Neil Armstrong
2022-06-07  9:37     ` Liang Yang
2022-06-07  9:37       ` Liang Yang
2022-06-07  9:37       ` Liang Yang
2022-06-07  9:37       ` Liang Yang

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