* [PATCH v6 0/5] fix the meson NFC clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Rob Herring, Richard Weinberger, Vignesh Raghavendra,
Jerome Brunet, Neil Armstrong, Martin Blumenstingl, Kevin Hilman,
Jianxin Pan, Victor Wan, XianWei Zhao, Kelvin Zhang,
BiChao Zheng, YongHui Yu, linux-arm-kernel, linux-amlogic,
linux-kernel, devicetree
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link for more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.
Changes since v5 [6]
- add change log for patch 3/5
- add patch 5/5 to fix the reporting error of test robot
Changes since v4 [5]
- split the dt binding patch into two patches, one for fixing,
clock, the other for coverting to yaml
- split the nfc driver patch into two patches, one for fixing
clock, the other for refining the get nfc resource.
Changes since v3 [4]
- use devm_platform_ioremap_resource_byname
- dt_binding_check for mtd/amlogic,meson-nand.yaml
Changes since v2 [3]
- use fw_name from dts, instead the wrong way using __clk_get_name
- reg resource size change to 0x800
- use reg-names
Changes since v1 [2]
- use clk_parent_data instead of parent_names
- define a reg resource instead of sd_emmc_c_clkc
[1] https://lore.kernel.org/r/20220106033130.37623-1-liang.yang@amlogic.com
https://lore.kernel.org/r/20220106032504.23310-1-liang.yang@amlogic.com
[2] https://lore.kernel.org/all/20220217063346.21691-1-liang.yang@amlogic.com
[3] https://lore.kernel.org/all/20220318124121.26117-1-liang.yang@amlogic.com
[4] https://lore.kernel.org/all/20220402074921.13316-1-liang.yang@amlogic.com/
[5] https://lore.kernel.org/all/20220513123404.48513-1-liang.yang@amlogic.com/
Liang Yang (5):
dt-bindings: nand: meson: fix meson nfc clock
mtd: rawnand: meson: fix the clock
mtd: rawnand: meson: refine resource getting in probe
dt-bindings: nand: meson: convert txt to yaml
mtd: rawnand: meson: not support legacy clock
.../bindings/mtd/amlogic,meson-nand.txt | 60 -------------
.../bindings/mtd/amlogic,meson-nand.yaml | 88 +++++++++++++++++++
drivers/mtd/nand/raw/Kconfig | 2 +-
drivers/mtd/nand/raw/meson_nand.c | 86 +++++++++---------
4 files changed, 131 insertions(+), 105 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v6 0/5] fix the meson NFC clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Rob Herring, Richard Weinberger, Vignesh Raghavendra,
Jerome Brunet, Neil Armstrong, Martin Blumenstingl, Kevin Hilman,
Jianxin Pan, Victor Wan, XianWei Zhao, Kelvin Zhang,
BiChao Zheng, YongHui Yu, linux-arm-kernel, linux-amlogic,
linux-kernel, devicetree
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link for more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.
Changes since v5 [6]
- add change log for patch 3/5
- add patch 5/5 to fix the reporting error of test robot
Changes since v4 [5]
- split the dt binding patch into two patches, one for fixing,
clock, the other for coverting to yaml
- split the nfc driver patch into two patches, one for fixing
clock, the other for refining the get nfc resource.
Changes since v3 [4]
- use devm_platform_ioremap_resource_byname
- dt_binding_check for mtd/amlogic,meson-nand.yaml
Changes since v2 [3]
- use fw_name from dts, instead the wrong way using __clk_get_name
- reg resource size change to 0x800
- use reg-names
Changes since v1 [2]
- use clk_parent_data instead of parent_names
- define a reg resource instead of sd_emmc_c_clkc
[1] https://lore.kernel.org/r/20220106033130.37623-1-liang.yang@amlogic.com
https://lore.kernel.org/r/20220106032504.23310-1-liang.yang@amlogic.com
[2] https://lore.kernel.org/all/20220217063346.21691-1-liang.yang@amlogic.com
[3] https://lore.kernel.org/all/20220318124121.26117-1-liang.yang@amlogic.com
[4] https://lore.kernel.org/all/20220402074921.13316-1-liang.yang@amlogic.com/
[5] https://lore.kernel.org/all/20220513123404.48513-1-liang.yang@amlogic.com/
Liang Yang (5):
dt-bindings: nand: meson: fix meson nfc clock
mtd: rawnand: meson: fix the clock
mtd: rawnand: meson: refine resource getting in probe
dt-bindings: nand: meson: convert txt to yaml
mtd: rawnand: meson: not support legacy clock
.../bindings/mtd/amlogic,meson-nand.txt | 60 -------------
.../bindings/mtd/amlogic,meson-nand.yaml | 88 +++++++++++++++++++
drivers/mtd/nand/raw/Kconfig | 2 +-
drivers/mtd/nand/raw/meson_nand.c | 86 +++++++++---------
4 files changed, 131 insertions(+), 105 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
--
2.34.1
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v6 0/5] fix the meson NFC clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Rob Herring, Richard Weinberger, Vignesh Raghavendra,
Jerome Brunet, Neil Armstrong, Martin Blumenstingl, Kevin Hilman,
Jianxin Pan, Victor Wan, XianWei Zhao, Kelvin Zhang,
BiChao Zheng, YongHui Yu, linux-arm-kernel, linux-amlogic,
linux-kernel, devicetree
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link for more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.
Changes since v5 [6]
- add change log for patch 3/5
- add patch 5/5 to fix the reporting error of test robot
Changes since v4 [5]
- split the dt binding patch into two patches, one for fixing,
clock, the other for coverting to yaml
- split the nfc driver patch into two patches, one for fixing
clock, the other for refining the get nfc resource.
Changes since v3 [4]
- use devm_platform_ioremap_resource_byname
- dt_binding_check for mtd/amlogic,meson-nand.yaml
Changes since v2 [3]
- use fw_name from dts, instead the wrong way using __clk_get_name
- reg resource size change to 0x800
- use reg-names
Changes since v1 [2]
- use clk_parent_data instead of parent_names
- define a reg resource instead of sd_emmc_c_clkc
[1] https://lore.kernel.org/r/20220106033130.37623-1-liang.yang@amlogic.com
https://lore.kernel.org/r/20220106032504.23310-1-liang.yang@amlogic.com
[2] https://lore.kernel.org/all/20220217063346.21691-1-liang.yang@amlogic.com
[3] https://lore.kernel.org/all/20220318124121.26117-1-liang.yang@amlogic.com
[4] https://lore.kernel.org/all/20220402074921.13316-1-liang.yang@amlogic.com/
[5] https://lore.kernel.org/all/20220513123404.48513-1-liang.yang@amlogic.com/
Liang Yang (5):
dt-bindings: nand: meson: fix meson nfc clock
mtd: rawnand: meson: fix the clock
mtd: rawnand: meson: refine resource getting in probe
dt-bindings: nand: meson: convert txt to yaml
mtd: rawnand: meson: not support legacy clock
.../bindings/mtd/amlogic,meson-nand.txt | 60 -------------
.../bindings/mtd/amlogic,meson-nand.yaml | 88 +++++++++++++++++++
drivers/mtd/nand/raw/Kconfig | 2 +-
drivers/mtd/nand/raw/meson_nand.c | 86 +++++++++---------
4 files changed, 131 insertions(+), 105 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
--
2.34.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v6 1/5] dt-bindings: nand: meson: fix meson nfc clock
2022-06-07 6:47 ` Liang Yang
(?)
(?)
@ 2022-06-07 6:47 ` Liang Yang
-1 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Rob Herring, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Kevin Hilman, Jianxin Pan, Victor Wan,
XianWei Zhao, Kelvin Zhang, BiChao Zheng, YongHui Yu,
linux-arm-kernel, linux-amlogic, linux-kernel, devicetree
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
.../bindings/mtd/amlogic,meson-nand.txt | 29 ++++++++-----------
1 file changed, 12 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
index 5794ab1147c1..5d5cdfef417f 100644
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
@@ -7,18 +7,19 @@ Required properties:
- compatible : contains one of:
- "amlogic,meson-gxl-nfc"
- "amlogic,meson-axg-nfc"
+
+- reg : Offset and length of the register set
+
+- reg-names : "nfc" is the register set for NFC controller and "emmc"
+ is the register set for MCI controller.
+
- clocks :
A list of phandle + clock-specifier pairs for the clocks listed
in clock-names.
- clock-names: Should contain the following:
"core" - NFC module gate clock
- "device" - device clock from eMMC sub clock controller
- "rx" - rx clock phase
- "tx" - tx clock phase
-
-- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC
- controller port C
+ "device" - parent clock for internal NFC
Optional children nodes:
Children nodes represent the available nand chips.
@@ -28,24 +29,18 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi
Example demonstrate on AXG SoC:
- sd_emmc_c_clkc: mmc@7000 {
- compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
- reg = <0x0 0x7000 0x0 0x800>;
- };
-
nand-controller@7800 {
compatible = "amlogic,meson-axg-nfc";
- reg = <0x0 0x7800 0x0 0x100>;
+ reg = <0x0 0x7800 0x0 0x100>,
+ <0x0 0x7000 0x0 0x800>;
+ reg-names = "nfc", "emmc";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_SD_EMMC_C>,
- <&sd_emmc_c_clkc CLKID_MMC_DIV>,
- <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
- <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
- clock-names = "core", "device", "rx", "tx";
- amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "device";
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;
--
2.34.1
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 1/5] dt-bindings: nand: meson: fix meson nfc clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Rob Herring, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Kevin Hilman, Jianxin Pan, Victor Wan,
XianWei Zhao, Kelvin Zhang, BiChao Zheng, YongHui Yu,
linux-arm-kernel, linux-amlogic, linux-kernel, devicetree
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
.../bindings/mtd/amlogic,meson-nand.txt | 29 ++++++++-----------
1 file changed, 12 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
index 5794ab1147c1..5d5cdfef417f 100644
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
@@ -7,18 +7,19 @@ Required properties:
- compatible : contains one of:
- "amlogic,meson-gxl-nfc"
- "amlogic,meson-axg-nfc"
+
+- reg : Offset and length of the register set
+
+- reg-names : "nfc" is the register set for NFC controller and "emmc"
+ is the register set for MCI controller.
+
- clocks :
A list of phandle + clock-specifier pairs for the clocks listed
in clock-names.
- clock-names: Should contain the following:
"core" - NFC module gate clock
- "device" - device clock from eMMC sub clock controller
- "rx" - rx clock phase
- "tx" - tx clock phase
-
-- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC
- controller port C
+ "device" - parent clock for internal NFC
Optional children nodes:
Children nodes represent the available nand chips.
@@ -28,24 +29,18 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi
Example demonstrate on AXG SoC:
- sd_emmc_c_clkc: mmc@7000 {
- compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
- reg = <0x0 0x7000 0x0 0x800>;
- };
-
nand-controller@7800 {
compatible = "amlogic,meson-axg-nfc";
- reg = <0x0 0x7800 0x0 0x100>;
+ reg = <0x0 0x7800 0x0 0x100>,
+ <0x0 0x7000 0x0 0x800>;
+ reg-names = "nfc", "emmc";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_SD_EMMC_C>,
- <&sd_emmc_c_clkc CLKID_MMC_DIV>,
- <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
- <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
- clock-names = "core", "device", "rx", "tx";
- amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "device";
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 1/5] dt-bindings: nand: meson: fix meson nfc clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Rob Herring, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Kevin Hilman, Jianxin Pan, Victor Wan,
XianWei Zhao, Kelvin Zhang, BiChao Zheng, YongHui Yu,
linux-arm-kernel, linux-amlogic, linux-kernel, devicetree
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
.../bindings/mtd/amlogic,meson-nand.txt | 29 ++++++++-----------
1 file changed, 12 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
index 5794ab1147c1..5d5cdfef417f 100644
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
@@ -7,18 +7,19 @@ Required properties:
- compatible : contains one of:
- "amlogic,meson-gxl-nfc"
- "amlogic,meson-axg-nfc"
+
+- reg : Offset and length of the register set
+
+- reg-names : "nfc" is the register set for NFC controller and "emmc"
+ is the register set for MCI controller.
+
- clocks :
A list of phandle + clock-specifier pairs for the clocks listed
in clock-names.
- clock-names: Should contain the following:
"core" - NFC module gate clock
- "device" - device clock from eMMC sub clock controller
- "rx" - rx clock phase
- "tx" - tx clock phase
-
-- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC
- controller port C
+ "device" - parent clock for internal NFC
Optional children nodes:
Children nodes represent the available nand chips.
@@ -28,24 +29,18 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi
Example demonstrate on AXG SoC:
- sd_emmc_c_clkc: mmc@7000 {
- compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
- reg = <0x0 0x7000 0x0 0x800>;
- };
-
nand-controller@7800 {
compatible = "amlogic,meson-axg-nfc";
- reg = <0x0 0x7800 0x0 0x100>;
+ reg = <0x0 0x7800 0x0 0x100>,
+ <0x0 0x7000 0x0 0x800>;
+ reg-names = "nfc", "emmc";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_SD_EMMC_C>,
- <&sd_emmc_c_clkc CLKID_MMC_DIV>,
- <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
- <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
- clock-names = "core", "device", "rx", "tx";
- amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "device";
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;
--
2.34.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 1/5] dt-bindings: nand: meson: fix meson nfc clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Rob Herring, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Kevin Hilman, Jianxin Pan, Victor Wan,
XianWei Zhao, Kelvin Zhang, BiChao Zheng, YongHui Yu,
linux-arm-kernel, linux-amlogic, linux-kernel, devicetree
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
.../bindings/mtd/amlogic,meson-nand.txt | 29 ++++++++-----------
1 file changed, 12 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
index 5794ab1147c1..5d5cdfef417f 100644
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
@@ -7,18 +7,19 @@ Required properties:
- compatible : contains one of:
- "amlogic,meson-gxl-nfc"
- "amlogic,meson-axg-nfc"
+
+- reg : Offset and length of the register set
+
+- reg-names : "nfc" is the register set for NFC controller and "emmc"
+ is the register set for MCI controller.
+
- clocks :
A list of phandle + clock-specifier pairs for the clocks listed
in clock-names.
- clock-names: Should contain the following:
"core" - NFC module gate clock
- "device" - device clock from eMMC sub clock controller
- "rx" - rx clock phase
- "tx" - tx clock phase
-
-- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC
- controller port C
+ "device" - parent clock for internal NFC
Optional children nodes:
Children nodes represent the available nand chips.
@@ -28,24 +29,18 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi
Example demonstrate on AXG SoC:
- sd_emmc_c_clkc: mmc@7000 {
- compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
- reg = <0x0 0x7000 0x0 0x800>;
- };
-
nand-controller@7800 {
compatible = "amlogic,meson-axg-nfc";
- reg = <0x0 0x7800 0x0 0x100>;
+ reg = <0x0 0x7800 0x0 0x100>,
+ <0x0 0x7000 0x0 0x800>;
+ reg-names = "nfc", "emmc";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_SD_EMMC_C>,
- <&sd_emmc_c_clkc CLKID_MMC_DIV>,
- <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
- <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
- clock-names = "core", "device", "rx", "tx";
- amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "device";
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;
--
2.34.1
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v6 2/5] mtd: rawnand: meson: fix the clock
2022-06-07 6:47 ` Liang Yang
(?)
(?)
@ 2022-06-07 6:47 ` Liang Yang
-1 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Kevin Hilman, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/meson_nand.c | 82 +++++++++++++++----------------
1 file changed, 41 insertions(+), 41 deletions(-)
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index ac3be92872d0..cc93667a1e7f 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -10,6 +10,7 @@
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/clk.h>
+#include <linux/clk-provider.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/mtd.h>
#include <linux/mfd/syscon.h>
@@ -56,6 +57,9 @@
#define NFC_RB_IRQ_EN BIT(21)
+#define CLK_DIV_SHIFT 0
+#define CLK_DIV_WIDTH 6
+
#define CMDRWGEN(cmd_dir, ran, bch, short_mode, page_size, pages) \
( \
(cmd_dir) | \
@@ -151,15 +155,15 @@ struct meson_nfc {
struct nand_controller controller;
struct clk *core_clk;
struct clk *device_clk;
- struct clk *phase_tx;
- struct clk *phase_rx;
+ struct clk *nand_clk;
+ struct clk_divider nand_divider;
unsigned long clk_rate;
u32 bus_timing;
struct device *dev;
void __iomem *reg_base;
- struct regmap *reg_clk;
+ void __iomem *reg_clk;
struct completion completion;
struct list_head chips;
const struct meson_nfc_data *data;
@@ -235,7 +239,7 @@ static void meson_nfc_select_chip(struct nand_chip *nand, int chip)
nfc->timing.tbers_max = meson_chip->tbers_max;
if (nfc->clk_rate != meson_chip->clk_rate) {
- ret = clk_set_rate(nfc->device_clk, meson_chip->clk_rate);
+ ret = clk_set_rate(nfc->nand_clk, meson_chip->clk_rate);
if (ret) {
dev_err(nfc->dev, "failed to set clock rate\n");
return;
@@ -987,6 +991,8 @@ static const struct mtd_ooblayout_ops meson_ooblayout_ops = {
static int meson_nfc_clk_init(struct meson_nfc *nfc)
{
+ struct clk_parent_data nfc_divider_parent_data[1];
+ struct clk_init_data init = {0};
int ret;
/* request core clock */
@@ -1002,21 +1008,28 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
return PTR_ERR(nfc->device_clk);
}
- nfc->phase_tx = devm_clk_get(nfc->dev, "tx");
- if (IS_ERR(nfc->phase_tx)) {
- dev_err(nfc->dev, "failed to get TX clk\n");
- return PTR_ERR(nfc->phase_tx);
- }
-
- nfc->phase_rx = devm_clk_get(nfc->dev, "rx");
- if (IS_ERR(nfc->phase_rx)) {
- dev_err(nfc->dev, "failed to get RX clk\n");
- return PTR_ERR(nfc->phase_rx);
- }
+ init.name = devm_kasprintf(nfc->dev,
+ GFP_KERNEL, "%s#div",
+ dev_name(nfc->dev));
+ init.ops = &clk_divider_ops;
+ nfc_divider_parent_data[0].fw_name = "device";
+ init.parent_data = nfc_divider_parent_data;
+ init.num_parents = 1;
+ nfc->nand_divider.reg = nfc->reg_clk;
+ nfc->nand_divider.shift = CLK_DIV_SHIFT;
+ nfc->nand_divider.width = CLK_DIV_WIDTH;
+ nfc->nand_divider.hw.init = &init;
+ nfc->nand_divider.flags = CLK_DIVIDER_ONE_BASED |
+ CLK_DIVIDER_ROUND_CLOSEST |
+ CLK_DIVIDER_ALLOW_ZERO;
+
+ nfc->nand_clk = devm_clk_register(nfc->dev, &nfc->nand_divider.hw);
+ if (IS_ERR(nfc->nand_clk))
+ return PTR_ERR(nfc->nand_clk);
/* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
- regmap_update_bits(nfc->reg_clk,
- 0, CLK_SELECT_NAND, CLK_SELECT_NAND);
+ writel(CLK_SELECT_NAND | readl(nfc->reg_clk),
+ nfc->reg_clk);
ret = clk_prepare_enable(nfc->core_clk);
if (ret) {
@@ -1030,29 +1043,21 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
goto err_device_clk;
}
- ret = clk_prepare_enable(nfc->phase_tx);
+ ret = clk_prepare_enable(nfc->nand_clk);
if (ret) {
- dev_err(nfc->dev, "failed to enable TX clock\n");
- goto err_phase_tx;
+ dev_err(nfc->dev, "pre enable NFC divider fail\n");
+ goto err_nand_clk;
}
- ret = clk_prepare_enable(nfc->phase_rx);
- if (ret) {
- dev_err(nfc->dev, "failed to enable RX clock\n");
- goto err_phase_rx;
- }
-
- ret = clk_set_rate(nfc->device_clk, 24000000);
+ ret = clk_set_rate(nfc->nand_clk, 24000000);
if (ret)
- goto err_disable_rx;
+ goto err_disable_clk;
return 0;
-err_disable_rx:
- clk_disable_unprepare(nfc->phase_rx);
-err_phase_rx:
- clk_disable_unprepare(nfc->phase_tx);
-err_phase_tx:
+err_disable_clk:
+ clk_disable_unprepare(nfc->nand_clk);
+err_nand_clk:
clk_disable_unprepare(nfc->device_clk);
err_device_clk:
clk_disable_unprepare(nfc->core_clk);
@@ -1061,8 +1066,7 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
static void meson_nfc_disable_clk(struct meson_nfc *nfc)
{
- clk_disable_unprepare(nfc->phase_rx);
- clk_disable_unprepare(nfc->phase_tx);
+ clk_disable_unprepare(nfc->nand_clk);
clk_disable_unprepare(nfc->device_clk);
clk_disable_unprepare(nfc->core_clk);
}
@@ -1396,13 +1400,9 @@ static int meson_nfc_probe(struct platform_device *pdev)
if (IS_ERR(nfc->reg_base))
return PTR_ERR(nfc->reg_base);
- nfc->reg_clk =
- syscon_regmap_lookup_by_phandle(dev->of_node,
- "amlogic,mmc-syscon");
- if (IS_ERR(nfc->reg_clk)) {
- dev_err(dev, "Failed to lookup clock base\n");
+ nfc->reg_clk = devm_platform_ioremap_resource_byname(pdev, "emmc");
+ if (IS_ERR(nfc->reg_clk))
return PTR_ERR(nfc->reg_clk);
- }
irq = platform_get_irq(pdev, 0);
if (irq < 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 2/5] mtd: rawnand: meson: fix the clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Kevin Hilman, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/meson_nand.c | 82 +++++++++++++++----------------
1 file changed, 41 insertions(+), 41 deletions(-)
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index ac3be92872d0..cc93667a1e7f 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -10,6 +10,7 @@
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/clk.h>
+#include <linux/clk-provider.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/mtd.h>
#include <linux/mfd/syscon.h>
@@ -56,6 +57,9 @@
#define NFC_RB_IRQ_EN BIT(21)
+#define CLK_DIV_SHIFT 0
+#define CLK_DIV_WIDTH 6
+
#define CMDRWGEN(cmd_dir, ran, bch, short_mode, page_size, pages) \
( \
(cmd_dir) | \
@@ -151,15 +155,15 @@ struct meson_nfc {
struct nand_controller controller;
struct clk *core_clk;
struct clk *device_clk;
- struct clk *phase_tx;
- struct clk *phase_rx;
+ struct clk *nand_clk;
+ struct clk_divider nand_divider;
unsigned long clk_rate;
u32 bus_timing;
struct device *dev;
void __iomem *reg_base;
- struct regmap *reg_clk;
+ void __iomem *reg_clk;
struct completion completion;
struct list_head chips;
const struct meson_nfc_data *data;
@@ -235,7 +239,7 @@ static void meson_nfc_select_chip(struct nand_chip *nand, int chip)
nfc->timing.tbers_max = meson_chip->tbers_max;
if (nfc->clk_rate != meson_chip->clk_rate) {
- ret = clk_set_rate(nfc->device_clk, meson_chip->clk_rate);
+ ret = clk_set_rate(nfc->nand_clk, meson_chip->clk_rate);
if (ret) {
dev_err(nfc->dev, "failed to set clock rate\n");
return;
@@ -987,6 +991,8 @@ static const struct mtd_ooblayout_ops meson_ooblayout_ops = {
static int meson_nfc_clk_init(struct meson_nfc *nfc)
{
+ struct clk_parent_data nfc_divider_parent_data[1];
+ struct clk_init_data init = {0};
int ret;
/* request core clock */
@@ -1002,21 +1008,28 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
return PTR_ERR(nfc->device_clk);
}
- nfc->phase_tx = devm_clk_get(nfc->dev, "tx");
- if (IS_ERR(nfc->phase_tx)) {
- dev_err(nfc->dev, "failed to get TX clk\n");
- return PTR_ERR(nfc->phase_tx);
- }
-
- nfc->phase_rx = devm_clk_get(nfc->dev, "rx");
- if (IS_ERR(nfc->phase_rx)) {
- dev_err(nfc->dev, "failed to get RX clk\n");
- return PTR_ERR(nfc->phase_rx);
- }
+ init.name = devm_kasprintf(nfc->dev,
+ GFP_KERNEL, "%s#div",
+ dev_name(nfc->dev));
+ init.ops = &clk_divider_ops;
+ nfc_divider_parent_data[0].fw_name = "device";
+ init.parent_data = nfc_divider_parent_data;
+ init.num_parents = 1;
+ nfc->nand_divider.reg = nfc->reg_clk;
+ nfc->nand_divider.shift = CLK_DIV_SHIFT;
+ nfc->nand_divider.width = CLK_DIV_WIDTH;
+ nfc->nand_divider.hw.init = &init;
+ nfc->nand_divider.flags = CLK_DIVIDER_ONE_BASED |
+ CLK_DIVIDER_ROUND_CLOSEST |
+ CLK_DIVIDER_ALLOW_ZERO;
+
+ nfc->nand_clk = devm_clk_register(nfc->dev, &nfc->nand_divider.hw);
+ if (IS_ERR(nfc->nand_clk))
+ return PTR_ERR(nfc->nand_clk);
/* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
- regmap_update_bits(nfc->reg_clk,
- 0, CLK_SELECT_NAND, CLK_SELECT_NAND);
+ writel(CLK_SELECT_NAND | readl(nfc->reg_clk),
+ nfc->reg_clk);
ret = clk_prepare_enable(nfc->core_clk);
if (ret) {
@@ -1030,29 +1043,21 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
goto err_device_clk;
}
- ret = clk_prepare_enable(nfc->phase_tx);
+ ret = clk_prepare_enable(nfc->nand_clk);
if (ret) {
- dev_err(nfc->dev, "failed to enable TX clock\n");
- goto err_phase_tx;
+ dev_err(nfc->dev, "pre enable NFC divider fail\n");
+ goto err_nand_clk;
}
- ret = clk_prepare_enable(nfc->phase_rx);
- if (ret) {
- dev_err(nfc->dev, "failed to enable RX clock\n");
- goto err_phase_rx;
- }
-
- ret = clk_set_rate(nfc->device_clk, 24000000);
+ ret = clk_set_rate(nfc->nand_clk, 24000000);
if (ret)
- goto err_disable_rx;
+ goto err_disable_clk;
return 0;
-err_disable_rx:
- clk_disable_unprepare(nfc->phase_rx);
-err_phase_rx:
- clk_disable_unprepare(nfc->phase_tx);
-err_phase_tx:
+err_disable_clk:
+ clk_disable_unprepare(nfc->nand_clk);
+err_nand_clk:
clk_disable_unprepare(nfc->device_clk);
err_device_clk:
clk_disable_unprepare(nfc->core_clk);
@@ -1061,8 +1066,7 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
static void meson_nfc_disable_clk(struct meson_nfc *nfc)
{
- clk_disable_unprepare(nfc->phase_rx);
- clk_disable_unprepare(nfc->phase_tx);
+ clk_disable_unprepare(nfc->nand_clk);
clk_disable_unprepare(nfc->device_clk);
clk_disable_unprepare(nfc->core_clk);
}
@@ -1396,13 +1400,9 @@ static int meson_nfc_probe(struct platform_device *pdev)
if (IS_ERR(nfc->reg_base))
return PTR_ERR(nfc->reg_base);
- nfc->reg_clk =
- syscon_regmap_lookup_by_phandle(dev->of_node,
- "amlogic,mmc-syscon");
- if (IS_ERR(nfc->reg_clk)) {
- dev_err(dev, "Failed to lookup clock base\n");
+ nfc->reg_clk = devm_platform_ioremap_resource_byname(pdev, "emmc");
+ if (IS_ERR(nfc->reg_clk))
return PTR_ERR(nfc->reg_clk);
- }
irq = platform_get_irq(pdev, 0);
if (irq < 0)
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 2/5] mtd: rawnand: meson: fix the clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Kevin Hilman, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/meson_nand.c | 82 +++++++++++++++----------------
1 file changed, 41 insertions(+), 41 deletions(-)
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index ac3be92872d0..cc93667a1e7f 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -10,6 +10,7 @@
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/clk.h>
+#include <linux/clk-provider.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/mtd.h>
#include <linux/mfd/syscon.h>
@@ -56,6 +57,9 @@
#define NFC_RB_IRQ_EN BIT(21)
+#define CLK_DIV_SHIFT 0
+#define CLK_DIV_WIDTH 6
+
#define CMDRWGEN(cmd_dir, ran, bch, short_mode, page_size, pages) \
( \
(cmd_dir) | \
@@ -151,15 +155,15 @@ struct meson_nfc {
struct nand_controller controller;
struct clk *core_clk;
struct clk *device_clk;
- struct clk *phase_tx;
- struct clk *phase_rx;
+ struct clk *nand_clk;
+ struct clk_divider nand_divider;
unsigned long clk_rate;
u32 bus_timing;
struct device *dev;
void __iomem *reg_base;
- struct regmap *reg_clk;
+ void __iomem *reg_clk;
struct completion completion;
struct list_head chips;
const struct meson_nfc_data *data;
@@ -235,7 +239,7 @@ static void meson_nfc_select_chip(struct nand_chip *nand, int chip)
nfc->timing.tbers_max = meson_chip->tbers_max;
if (nfc->clk_rate != meson_chip->clk_rate) {
- ret = clk_set_rate(nfc->device_clk, meson_chip->clk_rate);
+ ret = clk_set_rate(nfc->nand_clk, meson_chip->clk_rate);
if (ret) {
dev_err(nfc->dev, "failed to set clock rate\n");
return;
@@ -987,6 +991,8 @@ static const struct mtd_ooblayout_ops meson_ooblayout_ops = {
static int meson_nfc_clk_init(struct meson_nfc *nfc)
{
+ struct clk_parent_data nfc_divider_parent_data[1];
+ struct clk_init_data init = {0};
int ret;
/* request core clock */
@@ -1002,21 +1008,28 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
return PTR_ERR(nfc->device_clk);
}
- nfc->phase_tx = devm_clk_get(nfc->dev, "tx");
- if (IS_ERR(nfc->phase_tx)) {
- dev_err(nfc->dev, "failed to get TX clk\n");
- return PTR_ERR(nfc->phase_tx);
- }
-
- nfc->phase_rx = devm_clk_get(nfc->dev, "rx");
- if (IS_ERR(nfc->phase_rx)) {
- dev_err(nfc->dev, "failed to get RX clk\n");
- return PTR_ERR(nfc->phase_rx);
- }
+ init.name = devm_kasprintf(nfc->dev,
+ GFP_KERNEL, "%s#div",
+ dev_name(nfc->dev));
+ init.ops = &clk_divider_ops;
+ nfc_divider_parent_data[0].fw_name = "device";
+ init.parent_data = nfc_divider_parent_data;
+ init.num_parents = 1;
+ nfc->nand_divider.reg = nfc->reg_clk;
+ nfc->nand_divider.shift = CLK_DIV_SHIFT;
+ nfc->nand_divider.width = CLK_DIV_WIDTH;
+ nfc->nand_divider.hw.init = &init;
+ nfc->nand_divider.flags = CLK_DIVIDER_ONE_BASED |
+ CLK_DIVIDER_ROUND_CLOSEST |
+ CLK_DIVIDER_ALLOW_ZERO;
+
+ nfc->nand_clk = devm_clk_register(nfc->dev, &nfc->nand_divider.hw);
+ if (IS_ERR(nfc->nand_clk))
+ return PTR_ERR(nfc->nand_clk);
/* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
- regmap_update_bits(nfc->reg_clk,
- 0, CLK_SELECT_NAND, CLK_SELECT_NAND);
+ writel(CLK_SELECT_NAND | readl(nfc->reg_clk),
+ nfc->reg_clk);
ret = clk_prepare_enable(nfc->core_clk);
if (ret) {
@@ -1030,29 +1043,21 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
goto err_device_clk;
}
- ret = clk_prepare_enable(nfc->phase_tx);
+ ret = clk_prepare_enable(nfc->nand_clk);
if (ret) {
- dev_err(nfc->dev, "failed to enable TX clock\n");
- goto err_phase_tx;
+ dev_err(nfc->dev, "pre enable NFC divider fail\n");
+ goto err_nand_clk;
}
- ret = clk_prepare_enable(nfc->phase_rx);
- if (ret) {
- dev_err(nfc->dev, "failed to enable RX clock\n");
- goto err_phase_rx;
- }
-
- ret = clk_set_rate(nfc->device_clk, 24000000);
+ ret = clk_set_rate(nfc->nand_clk, 24000000);
if (ret)
- goto err_disable_rx;
+ goto err_disable_clk;
return 0;
-err_disable_rx:
- clk_disable_unprepare(nfc->phase_rx);
-err_phase_rx:
- clk_disable_unprepare(nfc->phase_tx);
-err_phase_tx:
+err_disable_clk:
+ clk_disable_unprepare(nfc->nand_clk);
+err_nand_clk:
clk_disable_unprepare(nfc->device_clk);
err_device_clk:
clk_disable_unprepare(nfc->core_clk);
@@ -1061,8 +1066,7 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
static void meson_nfc_disable_clk(struct meson_nfc *nfc)
{
- clk_disable_unprepare(nfc->phase_rx);
- clk_disable_unprepare(nfc->phase_tx);
+ clk_disable_unprepare(nfc->nand_clk);
clk_disable_unprepare(nfc->device_clk);
clk_disable_unprepare(nfc->core_clk);
}
@@ -1396,13 +1400,9 @@ static int meson_nfc_probe(struct platform_device *pdev)
if (IS_ERR(nfc->reg_base))
return PTR_ERR(nfc->reg_base);
- nfc->reg_clk =
- syscon_regmap_lookup_by_phandle(dev->of_node,
- "amlogic,mmc-syscon");
- if (IS_ERR(nfc->reg_clk)) {
- dev_err(dev, "Failed to lookup clock base\n");
+ nfc->reg_clk = devm_platform_ioremap_resource_byname(pdev, "emmc");
+ if (IS_ERR(nfc->reg_clk))
return PTR_ERR(nfc->reg_clk);
- }
irq = platform_get_irq(pdev, 0);
if (irq < 0)
--
2.34.1
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 2/5] mtd: rawnand: meson: fix the clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Kevin Hilman, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/meson_nand.c | 82 +++++++++++++++----------------
1 file changed, 41 insertions(+), 41 deletions(-)
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index ac3be92872d0..cc93667a1e7f 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -10,6 +10,7 @@
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/clk.h>
+#include <linux/clk-provider.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/mtd.h>
#include <linux/mfd/syscon.h>
@@ -56,6 +57,9 @@
#define NFC_RB_IRQ_EN BIT(21)
+#define CLK_DIV_SHIFT 0
+#define CLK_DIV_WIDTH 6
+
#define CMDRWGEN(cmd_dir, ran, bch, short_mode, page_size, pages) \
( \
(cmd_dir) | \
@@ -151,15 +155,15 @@ struct meson_nfc {
struct nand_controller controller;
struct clk *core_clk;
struct clk *device_clk;
- struct clk *phase_tx;
- struct clk *phase_rx;
+ struct clk *nand_clk;
+ struct clk_divider nand_divider;
unsigned long clk_rate;
u32 bus_timing;
struct device *dev;
void __iomem *reg_base;
- struct regmap *reg_clk;
+ void __iomem *reg_clk;
struct completion completion;
struct list_head chips;
const struct meson_nfc_data *data;
@@ -235,7 +239,7 @@ static void meson_nfc_select_chip(struct nand_chip *nand, int chip)
nfc->timing.tbers_max = meson_chip->tbers_max;
if (nfc->clk_rate != meson_chip->clk_rate) {
- ret = clk_set_rate(nfc->device_clk, meson_chip->clk_rate);
+ ret = clk_set_rate(nfc->nand_clk, meson_chip->clk_rate);
if (ret) {
dev_err(nfc->dev, "failed to set clock rate\n");
return;
@@ -987,6 +991,8 @@ static const struct mtd_ooblayout_ops meson_ooblayout_ops = {
static int meson_nfc_clk_init(struct meson_nfc *nfc)
{
+ struct clk_parent_data nfc_divider_parent_data[1];
+ struct clk_init_data init = {0};
int ret;
/* request core clock */
@@ -1002,21 +1008,28 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
return PTR_ERR(nfc->device_clk);
}
- nfc->phase_tx = devm_clk_get(nfc->dev, "tx");
- if (IS_ERR(nfc->phase_tx)) {
- dev_err(nfc->dev, "failed to get TX clk\n");
- return PTR_ERR(nfc->phase_tx);
- }
-
- nfc->phase_rx = devm_clk_get(nfc->dev, "rx");
- if (IS_ERR(nfc->phase_rx)) {
- dev_err(nfc->dev, "failed to get RX clk\n");
- return PTR_ERR(nfc->phase_rx);
- }
+ init.name = devm_kasprintf(nfc->dev,
+ GFP_KERNEL, "%s#div",
+ dev_name(nfc->dev));
+ init.ops = &clk_divider_ops;
+ nfc_divider_parent_data[0].fw_name = "device";
+ init.parent_data = nfc_divider_parent_data;
+ init.num_parents = 1;
+ nfc->nand_divider.reg = nfc->reg_clk;
+ nfc->nand_divider.shift = CLK_DIV_SHIFT;
+ nfc->nand_divider.width = CLK_DIV_WIDTH;
+ nfc->nand_divider.hw.init = &init;
+ nfc->nand_divider.flags = CLK_DIVIDER_ONE_BASED |
+ CLK_DIVIDER_ROUND_CLOSEST |
+ CLK_DIVIDER_ALLOW_ZERO;
+
+ nfc->nand_clk = devm_clk_register(nfc->dev, &nfc->nand_divider.hw);
+ if (IS_ERR(nfc->nand_clk))
+ return PTR_ERR(nfc->nand_clk);
/* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
- regmap_update_bits(nfc->reg_clk,
- 0, CLK_SELECT_NAND, CLK_SELECT_NAND);
+ writel(CLK_SELECT_NAND | readl(nfc->reg_clk),
+ nfc->reg_clk);
ret = clk_prepare_enable(nfc->core_clk);
if (ret) {
@@ -1030,29 +1043,21 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
goto err_device_clk;
}
- ret = clk_prepare_enable(nfc->phase_tx);
+ ret = clk_prepare_enable(nfc->nand_clk);
if (ret) {
- dev_err(nfc->dev, "failed to enable TX clock\n");
- goto err_phase_tx;
+ dev_err(nfc->dev, "pre enable NFC divider fail\n");
+ goto err_nand_clk;
}
- ret = clk_prepare_enable(nfc->phase_rx);
- if (ret) {
- dev_err(nfc->dev, "failed to enable RX clock\n");
- goto err_phase_rx;
- }
-
- ret = clk_set_rate(nfc->device_clk, 24000000);
+ ret = clk_set_rate(nfc->nand_clk, 24000000);
if (ret)
- goto err_disable_rx;
+ goto err_disable_clk;
return 0;
-err_disable_rx:
- clk_disable_unprepare(nfc->phase_rx);
-err_phase_rx:
- clk_disable_unprepare(nfc->phase_tx);
-err_phase_tx:
+err_disable_clk:
+ clk_disable_unprepare(nfc->nand_clk);
+err_nand_clk:
clk_disable_unprepare(nfc->device_clk);
err_device_clk:
clk_disable_unprepare(nfc->core_clk);
@@ -1061,8 +1066,7 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
static void meson_nfc_disable_clk(struct meson_nfc *nfc)
{
- clk_disable_unprepare(nfc->phase_rx);
- clk_disable_unprepare(nfc->phase_tx);
+ clk_disable_unprepare(nfc->nand_clk);
clk_disable_unprepare(nfc->device_clk);
clk_disable_unprepare(nfc->core_clk);
}
@@ -1396,13 +1400,9 @@ static int meson_nfc_probe(struct platform_device *pdev)
if (IS_ERR(nfc->reg_base))
return PTR_ERR(nfc->reg_base);
- nfc->reg_clk =
- syscon_regmap_lookup_by_phandle(dev->of_node,
- "amlogic,mmc-syscon");
- if (IS_ERR(nfc->reg_clk)) {
- dev_err(dev, "Failed to lookup clock base\n");
+ nfc->reg_clk = devm_platform_ioremap_resource_byname(pdev, "emmc");
+ if (IS_ERR(nfc->reg_clk))
return PTR_ERR(nfc->reg_clk);
- }
irq = platform_get_irq(pdev, 0);
if (irq < 0)
--
2.34.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v6 3/5] mtd: rawnand: meson: refine resource getting in probe
2022-06-07 6:47 ` Liang Yang
(?)
(?)
@ 2022-06-07 6:47 ` Liang Yang
-1 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Kevin Hilman, Neil Armstrong, Rob Herring,
Richard Weinberger, Vignesh Raghavendra, Jerome Brunet,
Martin Blumenstingl, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
simply use devm_platform_ioremap_resource_byname() instead of two steps:
res = platform_get_resource(pdev, IORESOURCE_MEM, 0) and
reg_base = devm_ioremap_resource(dev, res)
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/meson_nand.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index cc93667a1e7f..6e50387475bb 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -1378,7 +1378,6 @@ static int meson_nfc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct meson_nfc *nfc;
- struct resource *res;
int ret, irq;
nfc = devm_kzalloc(dev, sizeof(*nfc), GFP_KERNEL);
@@ -1395,8 +1394,7 @@ static int meson_nfc_probe(struct platform_device *pdev)
nfc->dev = dev;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- nfc->reg_base = devm_ioremap_resource(dev, res);
+ nfc->reg_base = devm_platform_ioremap_resource_byname(pdev, "nfc");
if (IS_ERR(nfc->reg_base))
return PTR_ERR(nfc->reg_base);
--
2.34.1
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 3/5] mtd: rawnand: meson: refine resource getting in probe
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Kevin Hilman, Neil Armstrong, Rob Herring,
Richard Weinberger, Vignesh Raghavendra, Jerome Brunet,
Martin Blumenstingl, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
simply use devm_platform_ioremap_resource_byname() instead of two steps:
res = platform_get_resource(pdev, IORESOURCE_MEM, 0) and
reg_base = devm_ioremap_resource(dev, res)
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/meson_nand.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index cc93667a1e7f..6e50387475bb 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -1378,7 +1378,6 @@ static int meson_nfc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct meson_nfc *nfc;
- struct resource *res;
int ret, irq;
nfc = devm_kzalloc(dev, sizeof(*nfc), GFP_KERNEL);
@@ -1395,8 +1394,7 @@ static int meson_nfc_probe(struct platform_device *pdev)
nfc->dev = dev;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- nfc->reg_base = devm_ioremap_resource(dev, res);
+ nfc->reg_base = devm_platform_ioremap_resource_byname(pdev, "nfc");
if (IS_ERR(nfc->reg_base))
return PTR_ERR(nfc->reg_base);
--
2.34.1
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 3/5] mtd: rawnand: meson: refine resource getting in probe
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Kevin Hilman, Neil Armstrong, Rob Herring,
Richard Weinberger, Vignesh Raghavendra, Jerome Brunet,
Martin Blumenstingl, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
simply use devm_platform_ioremap_resource_byname() instead of two steps:
res = platform_get_resource(pdev, IORESOURCE_MEM, 0) and
reg_base = devm_ioremap_resource(dev, res)
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/meson_nand.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index cc93667a1e7f..6e50387475bb 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -1378,7 +1378,6 @@ static int meson_nfc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct meson_nfc *nfc;
- struct resource *res;
int ret, irq;
nfc = devm_kzalloc(dev, sizeof(*nfc), GFP_KERNEL);
@@ -1395,8 +1394,7 @@ static int meson_nfc_probe(struct platform_device *pdev)
nfc->dev = dev;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- nfc->reg_base = devm_ioremap_resource(dev, res);
+ nfc->reg_base = devm_platform_ioremap_resource_byname(pdev, "nfc");
if (IS_ERR(nfc->reg_base))
return PTR_ERR(nfc->reg_base);
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 3/5] mtd: rawnand: meson: refine resource getting in probe
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Kevin Hilman, Neil Armstrong, Rob Herring,
Richard Weinberger, Vignesh Raghavendra, Jerome Brunet,
Martin Blumenstingl, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
simply use devm_platform_ioremap_resource_byname() instead of two steps:
res = platform_get_resource(pdev, IORESOURCE_MEM, 0) and
reg_base = devm_ioremap_resource(dev, res)
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/meson_nand.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index cc93667a1e7f..6e50387475bb 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -1378,7 +1378,6 @@ static int meson_nfc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct meson_nfc *nfc;
- struct resource *res;
int ret, irq;
nfc = devm_kzalloc(dev, sizeof(*nfc), GFP_KERNEL);
@@ -1395,8 +1394,7 @@ static int meson_nfc_probe(struct platform_device *pdev)
nfc->dev = dev;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- nfc->reg_base = devm_ioremap_resource(dev, res);
+ nfc->reg_base = devm_platform_ioremap_resource_byname(pdev, "nfc");
if (IS_ERR(nfc->reg_base))
return PTR_ERR(nfc->reg_base);
--
2.34.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v6 4/5] dt-bindings: nand: meson: convert txt to yaml
2022-06-07 6:47 ` Liang Yang
(?)
(?)
@ 2022-06-07 6:47 ` Liang Yang
-1 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Rob Herring, Richard Weinberger, Vignesh Raghavendra,
Jerome Brunet, Neil Armstrong, Martin Blumenstingl, Kevin Hilman,
Jianxin Pan, Victor Wan, XianWei Zhao, Kelvin Zhang,
BiChao Zheng, YongHui Yu, linux-arm-kernel, linux-amlogic,
linux-kernel
convert the amlogic,meson-name.txt to amlogic,meson-nand.yaml
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
.../bindings/mtd/amlogic,meson-nand.txt | 55 ------------
.../bindings/mtd/amlogic,meson-nand.yaml | 88 +++++++++++++++++++
2 files changed, 88 insertions(+), 55 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
deleted file mode 100644
index 5d5cdfef417f..000000000000
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ /dev/null
@@ -1,55 +0,0 @@
-Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
-
-This file documents the properties in addition to those available in
-the MTD NAND bindings.
-
-Required properties:
-- compatible : contains one of:
- - "amlogic,meson-gxl-nfc"
- - "amlogic,meson-axg-nfc"
-
-- reg : Offset and length of the register set
-
-- reg-names : "nfc" is the register set for NFC controller and "emmc"
- is the register set for MCI controller.
-
-- clocks :
- A list of phandle + clock-specifier pairs for the clocks listed
- in clock-names.
-
-- clock-names: Should contain the following:
- "core" - NFC module gate clock
- "device" - parent clock for internal NFC
-
-Optional children nodes:
-Children nodes represent the available nand chips.
-
-Other properties:
-see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
-
-Example demonstrate on AXG SoC:
-
- nand-controller@7800 {
- compatible = "amlogic,meson-axg-nfc";
- reg = <0x0 0x7800 0x0 0x100>,
- <0x0 0x7000 0x0 0x800>;
- reg-names = "nfc", "emmc";
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
-
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "device";
-
- pinctrl-names = "default";
- pinctrl-0 = <&nand_pins>;
-
- nand@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- nand-on-flash-bbt;
- };
- };
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
new file mode 100644
index 000000000000..42634e9c0d3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
+
+allOf:
+ - $ref: "nand-controller.yaml"
+
+maintainers:
+ - liang.yang@amlogic.com
+
+properties:
+ compatible:
+ enum:
+ - "amlogic,meson-gxl-nfc"
+ - "amlogic,meson-axg-nfc"
+
+ reg:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 2
+
+ clock-names:
+ items:
+ - const: core
+ - const: device
+
+patternProperties:
+ "^nand@[0-7]$":
+ type: object
+ properties:
+ reg:
+ minimum: 0
+ maximum: 1
+
+ nand-ecc-mode:
+ const: hw
+
+ nand-ecc-step-size:
+ const: 1024
+
+ nand-ecc-strength:
+ enum: [8, 16, 24, 30, 40, 50, 60]
+ description: |
+ The ECC configurations that can be supported are as follows.
+ meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
+ meson-axg-nfc 8
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-clkc.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ nand-controller@ffe07800 {
+ compatible = "amlogic,meson-axg-nfc";
+ reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
+ reg-names = "nfc", "emmc";
+ interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "device";
+
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ };
+ };
+
+...
--
2.34.1
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 4/5] dt-bindings: nand: meson: convert txt to yaml
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Rob Herring, Richard Weinberger, Vignesh Raghavendra,
Jerome Brunet, Neil Armstrong, Martin Blumenstingl, Kevin Hilman,
Jianxin Pan, Victor Wan, XianWei Zhao, Kelvin Zhang,
BiChao Zheng, YongHui Yu, linux-arm-kernel, linux-amlogic,
linux-kernel
convert the amlogic,meson-name.txt to amlogic,meson-nand.yaml
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
.../bindings/mtd/amlogic,meson-nand.txt | 55 ------------
.../bindings/mtd/amlogic,meson-nand.yaml | 88 +++++++++++++++++++
2 files changed, 88 insertions(+), 55 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
deleted file mode 100644
index 5d5cdfef417f..000000000000
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ /dev/null
@@ -1,55 +0,0 @@
-Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
-
-This file documents the properties in addition to those available in
-the MTD NAND bindings.
-
-Required properties:
-- compatible : contains one of:
- - "amlogic,meson-gxl-nfc"
- - "amlogic,meson-axg-nfc"
-
-- reg : Offset and length of the register set
-
-- reg-names : "nfc" is the register set for NFC controller and "emmc"
- is the register set for MCI controller.
-
-- clocks :
- A list of phandle + clock-specifier pairs for the clocks listed
- in clock-names.
-
-- clock-names: Should contain the following:
- "core" - NFC module gate clock
- "device" - parent clock for internal NFC
-
-Optional children nodes:
-Children nodes represent the available nand chips.
-
-Other properties:
-see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
-
-Example demonstrate on AXG SoC:
-
- nand-controller@7800 {
- compatible = "amlogic,meson-axg-nfc";
- reg = <0x0 0x7800 0x0 0x100>,
- <0x0 0x7000 0x0 0x800>;
- reg-names = "nfc", "emmc";
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
-
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "device";
-
- pinctrl-names = "default";
- pinctrl-0 = <&nand_pins>;
-
- nand@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- nand-on-flash-bbt;
- };
- };
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
new file mode 100644
index 000000000000..42634e9c0d3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
+
+allOf:
+ - $ref: "nand-controller.yaml"
+
+maintainers:
+ - liang.yang@amlogic.com
+
+properties:
+ compatible:
+ enum:
+ - "amlogic,meson-gxl-nfc"
+ - "amlogic,meson-axg-nfc"
+
+ reg:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 2
+
+ clock-names:
+ items:
+ - const: core
+ - const: device
+
+patternProperties:
+ "^nand@[0-7]$":
+ type: object
+ properties:
+ reg:
+ minimum: 0
+ maximum: 1
+
+ nand-ecc-mode:
+ const: hw
+
+ nand-ecc-step-size:
+ const: 1024
+
+ nand-ecc-strength:
+ enum: [8, 16, 24, 30, 40, 50, 60]
+ description: |
+ The ECC configurations that can be supported are as follows.
+ meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
+ meson-axg-nfc 8
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-clkc.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ nand-controller@ffe07800 {
+ compatible = "amlogic,meson-axg-nfc";
+ reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
+ reg-names = "nfc", "emmc";
+ interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "device";
+
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ };
+ };
+
+...
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 4/5] dt-bindings: nand: meson: convert txt to yaml
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Rob Herring, Richard Weinberger, Vignesh Raghavendra,
Jerome Brunet, Neil Armstrong, Martin Blumenstingl, Kevin Hilman,
Jianxin Pan, Victor Wan, XianWei Zhao, Kelvin Zhang,
BiChao Zheng, YongHui Yu, linux-arm-kernel, linux-amlogic,
linux-kernel
convert the amlogic,meson-name.txt to amlogic,meson-nand.yaml
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
.../bindings/mtd/amlogic,meson-nand.txt | 55 ------------
.../bindings/mtd/amlogic,meson-nand.yaml | 88 +++++++++++++++++++
2 files changed, 88 insertions(+), 55 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
deleted file mode 100644
index 5d5cdfef417f..000000000000
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ /dev/null
@@ -1,55 +0,0 @@
-Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
-
-This file documents the properties in addition to those available in
-the MTD NAND bindings.
-
-Required properties:
-- compatible : contains one of:
- - "amlogic,meson-gxl-nfc"
- - "amlogic,meson-axg-nfc"
-
-- reg : Offset and length of the register set
-
-- reg-names : "nfc" is the register set for NFC controller and "emmc"
- is the register set for MCI controller.
-
-- clocks :
- A list of phandle + clock-specifier pairs for the clocks listed
- in clock-names.
-
-- clock-names: Should contain the following:
- "core" - NFC module gate clock
- "device" - parent clock for internal NFC
-
-Optional children nodes:
-Children nodes represent the available nand chips.
-
-Other properties:
-see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
-
-Example demonstrate on AXG SoC:
-
- nand-controller@7800 {
- compatible = "amlogic,meson-axg-nfc";
- reg = <0x0 0x7800 0x0 0x100>,
- <0x0 0x7000 0x0 0x800>;
- reg-names = "nfc", "emmc";
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
-
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "device";
-
- pinctrl-names = "default";
- pinctrl-0 = <&nand_pins>;
-
- nand@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- nand-on-flash-bbt;
- };
- };
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
new file mode 100644
index 000000000000..42634e9c0d3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
+
+allOf:
+ - $ref: "nand-controller.yaml"
+
+maintainers:
+ - liang.yang@amlogic.com
+
+properties:
+ compatible:
+ enum:
+ - "amlogic,meson-gxl-nfc"
+ - "amlogic,meson-axg-nfc"
+
+ reg:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 2
+
+ clock-names:
+ items:
+ - const: core
+ - const: device
+
+patternProperties:
+ "^nand@[0-7]$":
+ type: object
+ properties:
+ reg:
+ minimum: 0
+ maximum: 1
+
+ nand-ecc-mode:
+ const: hw
+
+ nand-ecc-step-size:
+ const: 1024
+
+ nand-ecc-strength:
+ enum: [8, 16, 24, 30, 40, 50, 60]
+ description: |
+ The ECC configurations that can be supported are as follows.
+ meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
+ meson-axg-nfc 8
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-clkc.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ nand-controller@ffe07800 {
+ compatible = "amlogic,meson-axg-nfc";
+ reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
+ reg-names = "nfc", "emmc";
+ interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "device";
+
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ };
+ };
+
+...
--
2.34.1
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v6 4/5] dt-bindings: nand: meson: convert txt to yaml
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, Rob Herring, Richard Weinberger, Vignesh Raghavendra,
Jerome Brunet, Neil Armstrong, Martin Blumenstingl, Kevin Hilman,
Jianxin Pan, Victor Wan, XianWei Zhao, Kelvin Zhang,
BiChao Zheng, YongHui Yu, linux-arm-kernel, linux-amlogic,
linux-kernel
convert the amlogic,meson-name.txt to amlogic,meson-nand.yaml
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
.../bindings/mtd/amlogic,meson-nand.txt | 55 ------------
.../bindings/mtd/amlogic,meson-nand.yaml | 88 +++++++++++++++++++
2 files changed, 88 insertions(+), 55 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
deleted file mode 100644
index 5d5cdfef417f..000000000000
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ /dev/null
@@ -1,55 +0,0 @@
-Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
-
-This file documents the properties in addition to those available in
-the MTD NAND bindings.
-
-Required properties:
-- compatible : contains one of:
- - "amlogic,meson-gxl-nfc"
- - "amlogic,meson-axg-nfc"
-
-- reg : Offset and length of the register set
-
-- reg-names : "nfc" is the register set for NFC controller and "emmc"
- is the register set for MCI controller.
-
-- clocks :
- A list of phandle + clock-specifier pairs for the clocks listed
- in clock-names.
-
-- clock-names: Should contain the following:
- "core" - NFC module gate clock
- "device" - parent clock for internal NFC
-
-Optional children nodes:
-Children nodes represent the available nand chips.
-
-Other properties:
-see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
-
-Example demonstrate on AXG SoC:
-
- nand-controller@7800 {
- compatible = "amlogic,meson-axg-nfc";
- reg = <0x0 0x7800 0x0 0x100>,
- <0x0 0x7000 0x0 0x800>;
- reg-names = "nfc", "emmc";
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
-
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "device";
-
- pinctrl-names = "default";
- pinctrl-0 = <&nand_pins>;
-
- nand@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- nand-on-flash-bbt;
- };
- };
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
new file mode 100644
index 000000000000..42634e9c0d3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
+
+allOf:
+ - $ref: "nand-controller.yaml"
+
+maintainers:
+ - liang.yang@amlogic.com
+
+properties:
+ compatible:
+ enum:
+ - "amlogic,meson-gxl-nfc"
+ - "amlogic,meson-axg-nfc"
+
+ reg:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 2
+
+ clock-names:
+ items:
+ - const: core
+ - const: device
+
+patternProperties:
+ "^nand@[0-7]$":
+ type: object
+ properties:
+ reg:
+ minimum: 0
+ maximum: 1
+
+ nand-ecc-mode:
+ const: hw
+
+ nand-ecc-step-size:
+ const: 1024
+
+ nand-ecc-strength:
+ enum: [8, 16, 24, 30, 40, 50, 60]
+ description: |
+ The ECC configurations that can be supported are as follows.
+ meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
+ meson-axg-nfc 8
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-clkc.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ nand-controller@ffe07800 {
+ compatible = "amlogic,meson-axg-nfc";
+ reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
+ reg-names = "nfc", "emmc";
+ interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "device";
+
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ };
+ };
+
+...
--
2.34.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
2022-06-07 6:47 ` Liang Yang
(?)
(?)
@ 2022-06-07 6:47 ` Liang Yang
-1 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Kevin Hilman, Jianxin Pan, Victor Wan,
XianWei Zhao, Kelvin Zhang, BiChao Zheng, YongHui Yu,
linux-arm-kernel, linux-amlogic, linux-kernel
meson NFC driver use common clock interfaces. so the test robot report
some errors once using the legacy clock with HAVE_LEGACY_CLK on.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 67b7cb67c030..5169412a4af4 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
config MTD_NAND_MESON
tristate "Support for NAND controller on Amlogic's Meson SoCs"
- depends on ARCH_MESON || COMPILE_TEST
+ depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
select MFD_SYSCON
help
Enables support for NAND controller on Amlogic's Meson SoCs.
--
2.34.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Kevin Hilman, Jianxin Pan, Victor Wan,
XianWei Zhao, Kelvin Zhang, BiChao Zheng, YongHui Yu,
linux-arm-kernel, linux-amlogic, linux-kernel
meson NFC driver use common clock interfaces. so the test robot report
some errors once using the legacy clock with HAVE_LEGACY_CLK on.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 67b7cb67c030..5169412a4af4 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
config MTD_NAND_MESON
tristate "Support for NAND controller on Amlogic's Meson SoCs"
- depends on ARCH_MESON || COMPILE_TEST
+ depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
select MFD_SYSCON
help
Enables support for NAND controller on Amlogic's Meson SoCs.
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Kevin Hilman, Jianxin Pan, Victor Wan,
XianWei Zhao, Kelvin Zhang, BiChao Zheng, YongHui Yu,
linux-arm-kernel, linux-amlogic, linux-kernel
meson NFC driver use common clock interfaces. so the test robot report
some errors once using the legacy clock with HAVE_LEGACY_CLK on.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 67b7cb67c030..5169412a4af4 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
config MTD_NAND_MESON
tristate "Support for NAND controller on Amlogic's Meson SoCs"
- depends on ARCH_MESON || COMPILE_TEST
+ depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
select MFD_SYSCON
help
Enables support for NAND controller on Amlogic's Meson SoCs.
--
2.34.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
@ 2022-06-07 6:47 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 6:47 UTC (permalink / raw)
To: Miquel Raynal, linux-mtd
Cc: Liang Yang, kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Neil Armstrong,
Martin Blumenstingl, Kevin Hilman, Jianxin Pan, Victor Wan,
XianWei Zhao, Kelvin Zhang, BiChao Zheng, YongHui Yu,
linux-arm-kernel, linux-amlogic, linux-kernel
meson NFC driver use common clock interfaces. so the test robot report
some errors once using the legacy clock with HAVE_LEGACY_CLK on.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
---
drivers/mtd/nand/raw/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 67b7cb67c030..5169412a4af4 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
config MTD_NAND_MESON
tristate "Support for NAND controller on Amlogic's Meson SoCs"
- depends on ARCH_MESON || COMPILE_TEST
+ depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
select MFD_SYSCON
help
Enables support for NAND controller on Amlogic's Meson SoCs.
--
2.34.1
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply related [flat|nested] 32+ messages in thread
* Re: [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
2022-06-07 6:47 ` Liang Yang
(?)
(?)
@ 2022-06-07 7:12 ` Neil Armstrong
-1 siblings, 0 replies; 32+ messages in thread
From: Neil Armstrong @ 2022-06-07 7:12 UTC (permalink / raw)
To: Liang Yang, Miquel Raynal, linux-mtd
Cc: kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Martin Blumenstingl,
Kevin Hilman, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
Hi,
On 07/06/2022 08:47, Liang Yang wrote:
> meson NFC driver use common clock interfaces. so the test robot report
> some errors once using the legacy clock with HAVE_LEGACY_CLK on.
>
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
> ---
> drivers/mtd/nand/raw/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
> index 67b7cb67c030..5169412a4af4 100644
> --- a/drivers/mtd/nand/raw/Kconfig
> +++ b/drivers/mtd/nand/raw/Kconfig
> @@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
>
> config MTD_NAND_MESON
> tristate "Support for NAND controller on Amlogic's Meson SoCs"
> - depends on ARCH_MESON || COMPILE_TEST
> + depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
I think depending on CCF would be better than excluding legacy clock.
> select MFD_SYSCON
> help
> Enables support for NAND controller on Amlogic's Meson SoCs.
Neil
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
@ 2022-06-07 7:12 ` Neil Armstrong
0 siblings, 0 replies; 32+ messages in thread
From: Neil Armstrong @ 2022-06-07 7:12 UTC (permalink / raw)
To: Liang Yang, Miquel Raynal, linux-mtd
Cc: kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Martin Blumenstingl,
Kevin Hilman, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
Hi,
On 07/06/2022 08:47, Liang Yang wrote:
> meson NFC driver use common clock interfaces. so the test robot report
> some errors once using the legacy clock with HAVE_LEGACY_CLK on.
>
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
> ---
> drivers/mtd/nand/raw/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
> index 67b7cb67c030..5169412a4af4 100644
> --- a/drivers/mtd/nand/raw/Kconfig
> +++ b/drivers/mtd/nand/raw/Kconfig
> @@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
>
> config MTD_NAND_MESON
> tristate "Support for NAND controller on Amlogic's Meson SoCs"
> - depends on ARCH_MESON || COMPILE_TEST
> + depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
I think depending on CCF would be better than excluding legacy clock.
> select MFD_SYSCON
> help
> Enables support for NAND controller on Amlogic's Meson SoCs.
Neil
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
@ 2022-06-07 7:12 ` Neil Armstrong
0 siblings, 0 replies; 32+ messages in thread
From: Neil Armstrong @ 2022-06-07 7:12 UTC (permalink / raw)
To: Liang Yang, Miquel Raynal, linux-mtd
Cc: kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Martin Blumenstingl,
Kevin Hilman, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
Hi,
On 07/06/2022 08:47, Liang Yang wrote:
> meson NFC driver use common clock interfaces. so the test robot report
> some errors once using the legacy clock with HAVE_LEGACY_CLK on.
>
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
> ---
> drivers/mtd/nand/raw/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
> index 67b7cb67c030..5169412a4af4 100644
> --- a/drivers/mtd/nand/raw/Kconfig
> +++ b/drivers/mtd/nand/raw/Kconfig
> @@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
>
> config MTD_NAND_MESON
> tristate "Support for NAND controller on Amlogic's Meson SoCs"
> - depends on ARCH_MESON || COMPILE_TEST
> + depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
I think depending on CCF would be better than excluding legacy clock.
> select MFD_SYSCON
> help
> Enables support for NAND controller on Amlogic's Meson SoCs.
Neil
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
@ 2022-06-07 7:12 ` Neil Armstrong
0 siblings, 0 replies; 32+ messages in thread
From: Neil Armstrong @ 2022-06-07 7:12 UTC (permalink / raw)
To: Liang Yang, Miquel Raynal, linux-mtd
Cc: kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Martin Blumenstingl,
Kevin Hilman, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
Hi,
On 07/06/2022 08:47, Liang Yang wrote:
> meson NFC driver use common clock interfaces. so the test robot report
> some errors once using the legacy clock with HAVE_LEGACY_CLK on.
>
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
> ---
> drivers/mtd/nand/raw/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
> index 67b7cb67c030..5169412a4af4 100644
> --- a/drivers/mtd/nand/raw/Kconfig
> +++ b/drivers/mtd/nand/raw/Kconfig
> @@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
>
> config MTD_NAND_MESON
> tristate "Support for NAND controller on Amlogic's Meson SoCs"
> - depends on ARCH_MESON || COMPILE_TEST
> + depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
I think depending on CCF would be better than excluding legacy clock.
> select MFD_SYSCON
> help
> Enables support for NAND controller on Amlogic's Meson SoCs.
Neil
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
2022-06-07 7:12 ` Neil Armstrong
(?)
(?)
@ 2022-06-07 9:37 ` Liang Yang
-1 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 9:37 UTC (permalink / raw)
To: Neil Armstrong, Miquel Raynal, linux-mtd
Cc: kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Martin Blumenstingl,
Kevin Hilman, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
Hi Neil,
On 2022/6/7 15:12, Neil Armstrong wrote:
> [ EXTERNAL EMAIL ]
>
> Hi,
>
> On 07/06/2022 08:47, Liang Yang wrote:
>> meson NFC driver use common clock interfaces. so the test robot report
>> some errors once using the legacy clock with HAVE_LEGACY_CLK on.
>>
>> Reported-by: kernel test robot <lkp@intel.com>
>> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
>> ---
>> drivers/mtd/nand/raw/Kconfig | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
>> index 67b7cb67c030..5169412a4af4 100644
>> --- a/drivers/mtd/nand/raw/Kconfig
>> +++ b/drivers/mtd/nand/raw/Kconfig
>> @@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
>> config MTD_NAND_MESON
>> tristate "Support for NAND controller on Amlogic's Meson SoCs"
>> - depends on ARCH_MESON || COMPILE_TEST
>> + depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
>
> I think depending on CCF would be better than excluding legacy clock.
>
indeed. i will use COMMON_CLK later. thanks.
>> select MFD_SYSCON
>> help
>> Enables support for NAND controller on Amlogic's Meson SoCs.
>
> Neil
>
> .
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
@ 2022-06-07 9:37 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 9:37 UTC (permalink / raw)
To: Neil Armstrong, Miquel Raynal, linux-mtd
Cc: kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Martin Blumenstingl,
Kevin Hilman, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
Hi Neil,
On 2022/6/7 15:12, Neil Armstrong wrote:
> [ EXTERNAL EMAIL ]
>
> Hi,
>
> On 07/06/2022 08:47, Liang Yang wrote:
>> meson NFC driver use common clock interfaces. so the test robot report
>> some errors once using the legacy clock with HAVE_LEGACY_CLK on.
>>
>> Reported-by: kernel test robot <lkp@intel.com>
>> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
>> ---
>> drivers/mtd/nand/raw/Kconfig | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
>> index 67b7cb67c030..5169412a4af4 100644
>> --- a/drivers/mtd/nand/raw/Kconfig
>> +++ b/drivers/mtd/nand/raw/Kconfig
>> @@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
>> config MTD_NAND_MESON
>> tristate "Support for NAND controller on Amlogic's Meson SoCs"
>> - depends on ARCH_MESON || COMPILE_TEST
>> + depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
>
> I think depending on CCF would be better than excluding legacy clock.
>
indeed. i will use COMMON_CLK later. thanks.
>> select MFD_SYSCON
>> help
>> Enables support for NAND controller on Amlogic's Meson SoCs.
>
> Neil
>
> .
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
@ 2022-06-07 9:37 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 9:37 UTC (permalink / raw)
To: Neil Armstrong, Miquel Raynal, linux-mtd
Cc: kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Martin Blumenstingl,
Kevin Hilman, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
Hi Neil,
On 2022/6/7 15:12, Neil Armstrong wrote:
> [ EXTERNAL EMAIL ]
>
> Hi,
>
> On 07/06/2022 08:47, Liang Yang wrote:
>> meson NFC driver use common clock interfaces. so the test robot report
>> some errors once using the legacy clock with HAVE_LEGACY_CLK on.
>>
>> Reported-by: kernel test robot <lkp@intel.com>
>> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
>> ---
>> drivers/mtd/nand/raw/Kconfig | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
>> index 67b7cb67c030..5169412a4af4 100644
>> --- a/drivers/mtd/nand/raw/Kconfig
>> +++ b/drivers/mtd/nand/raw/Kconfig
>> @@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
>> config MTD_NAND_MESON
>> tristate "Support for NAND controller on Amlogic's Meson SoCs"
>> - depends on ARCH_MESON || COMPILE_TEST
>> + depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
>
> I think depending on CCF would be better than excluding legacy clock.
>
indeed. i will use COMMON_CLK later. thanks.
>> select MFD_SYSCON
>> help
>> Enables support for NAND controller on Amlogic's Meson SoCs.
>
> Neil
>
> .
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v6 5/5] mtd: rawnand: meson: not support legacy clock
@ 2022-06-07 9:37 ` Liang Yang
0 siblings, 0 replies; 32+ messages in thread
From: Liang Yang @ 2022-06-07 9:37 UTC (permalink / raw)
To: Neil Armstrong, Miquel Raynal, linux-mtd
Cc: kernel test robot, Rob Herring, Richard Weinberger,
Vignesh Raghavendra, Jerome Brunet, Martin Blumenstingl,
Kevin Hilman, Jianxin Pan, Victor Wan, XianWei Zhao,
Kelvin Zhang, BiChao Zheng, YongHui Yu, linux-arm-kernel,
linux-amlogic, linux-kernel
Hi Neil,
On 2022/6/7 15:12, Neil Armstrong wrote:
> [ EXTERNAL EMAIL ]
>
> Hi,
>
> On 07/06/2022 08:47, Liang Yang wrote:
>> meson NFC driver use common clock interfaces. so the test robot report
>> some errors once using the legacy clock with HAVE_LEGACY_CLK on.
>>
>> Reported-by: kernel test robot <lkp@intel.com>
>> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
>> ---
>> drivers/mtd/nand/raw/Kconfig | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
>> index 67b7cb67c030..5169412a4af4 100644
>> --- a/drivers/mtd/nand/raw/Kconfig
>> +++ b/drivers/mtd/nand/raw/Kconfig
>> @@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
>> config MTD_NAND_MESON
>> tristate "Support for NAND controller on Amlogic's Meson SoCs"
>> - depends on ARCH_MESON || COMPILE_TEST
>> + depends on ARCH_MESON || COMPILE_TEST || !HAVE_LEGACY_CLK
>
> I think depending on CCF would be better than excluding legacy clock.
>
indeed. i will use COMMON_CLK later. thanks.
>> select MFD_SYSCON
>> help
>> Enables support for NAND controller on Amlogic's Meson SoCs.
>
> Neil
>
> .
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 32+ messages in thread