From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 083FBC43334 for ; Fri, 10 Jun 2022 14:36:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349632AbiFJOgU (ORCPT ); Fri, 10 Jun 2022 10:36:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349515AbiFJOgG (ORCPT ); Fri, 10 Jun 2022 10:36:06 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0511743AD6 for ; Fri, 10 Jun 2022 07:36:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654871765; x=1686407765; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=r1mjNgxw2ZcRVt/bhSb4f5Mjb8Nk4rnJL0ffOUx3ru4=; b=H4D0stHE/qZCPny0gOg+1JFrFCT2ILC17FuN9xB4L8UUejfFgocSkp1f /N1C//gshTiBfmBkBUMA03X0Tw02LfrHdOUv4V3NFnSUCtDqT+fMcFdJI VU13IrAXu5uKksTvJeinP5EeMhmVuYXg5mE3qgyNZqmcAIJBAkQWhYNOk jY4gss7LthLZKVqBzNK+0+PTWTE9qRQiG/DHP45SB9lqOHAWICYcGtoie IxSwN2VjbhX7D+u3HD2JeRvj4zwWKlMAWe3431I7jczdFAeExX6PvZCOC SWWYRE5/cJza5OqlT5H+8KGSJquwzTYYsNzjDQ92zQ0bHpHlN4CPgnETq Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10374"; a="278781423" X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="278781423" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:35:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="534102921" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga003.jf.intel.com with ESMTP; 10 Jun 2022 07:35:31 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id 5720D60E; Fri, 10 Jun 2022 17:35:30 +0300 (EEST) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv3 6/8] x86/mm: Provide ARCH_GET_UNTAG_MASK and ARCH_ENABLE_TAGGED_ADDR Date: Fri, 10 Jun 2022 17:35:25 +0300 Message-Id: <20220610143527.22974-7-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> References: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a couple of arch_prctl() handles: - ARCH_ENABLE_TAGGED_ADDR enabled LAM. The argument is required number of tag bits. It is rounded up to the nearest LAM mode that can provide it. For now only LAM_U57 is supported, with 6 tag bits. - ARCH_GET_UNTAG_MASK returns untag mask. It can indicates where tag bits located in the address. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/uapi/asm/prctl.h | 3 +++ arch/x86/kernel/process_64.c | 32 ++++++++++++++++++++++++++++++- 2 files changed, 34 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/uapi/asm/prctl.h b/arch/x86/include/uapi/asm/prctl.h index 500b96e71f18..38164a05c23c 100644 --- a/arch/x86/include/uapi/asm/prctl.h +++ b/arch/x86/include/uapi/asm/prctl.h @@ -20,4 +20,7 @@ #define ARCH_MAP_VDSO_32 0x2002 #define ARCH_MAP_VDSO_64 0x2003 +#define ARCH_GET_UNTAG_MASK 0x4001 +#define ARCH_ENABLE_TAGGED_ADDR 0x4002 + #endif /* _ASM_X86_PRCTL_H */ diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 1962008fe743..93c8eba1a66d 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -742,6 +742,32 @@ static long prctl_map_vdso(const struct vdso_image *image, unsigned long addr) } #endif +static int prctl_enable_tagged_addr(unsigned long nr_bits) +{ + struct mm_struct *mm = current->mm; + + /* Already enabled? */ + if (mm->context.lam_cr3_mask) + return -EBUSY; + + /* LAM has to be enabled before spawning threads */ + if (get_nr_threads(current) > 1) + return -EBUSY; + + if (!nr_bits) { + return -EINVAL; + } else if (nr_bits <= 6) { + mm->context.lam_cr3_mask = X86_CR3_LAM_U57; + mm->context.untag_mask = ~GENMASK(62, 57); + } else { + return -EINVAL; + } + + /* Update CR3 to get LAM active */ + switch_mm(current->mm, current->mm, current); + return 0; +} + long do_arch_prctl_64(struct task_struct *task, int option, unsigned long arg2) { int ret = 0; @@ -829,7 +855,11 @@ long do_arch_prctl_64(struct task_struct *task, int option, unsigned long arg2) case ARCH_MAP_VDSO_64: return prctl_map_vdso(&vdso_image_64, arg2); #endif - + case ARCH_GET_UNTAG_MASK: + return put_user(current->mm->context.untag_mask, + (unsigned long __user *)arg2); + case ARCH_ENABLE_TAGGED_ADDR: + return prctl_enable_tagged_addr(arg2); default: ret = -EINVAL; break; -- 2.35.1