From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59D4BC43334 for ; Fri, 17 Jun 2022 05:15:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4F4CB11AB5B; Fri, 17 Jun 2022 05:15:08 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id D2A4411AB1A; Fri, 17 Jun 2022 05:15:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655442906; x=1686978906; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=yzzgCpzUKc+vhQ746rwG5grVv3R/h6I3qPANhwuVD0A=; b=KeiH2yMbvlmjquZrfG1JbQmmyPqlN8aA9EYd/7ZlFIV7aqSeRl7I0vSg veivQPkuilfPUXH1+C41ACF5MROsBaorzcm/PgwtMD1LNhOnWhoayXk2r SyVawLAVZJbV2xfRmUZkfdLYpb3doLMXEwF7Xx8qtlkfo1N4QUyHJzwbT VI+XJwDm9UZnH/aGUo9K+2Ox1Wq4dGnT0ceJPW9cK7q4o9AVJ2Ky1NBNr OChx7FZqg2WLC8ACiSRBYiU1BJqbyBj7+mlcExkzlOKLvEBtIJofLM7el BEVPCatfCidztQ3ae87JTPDJHskSLmU0AkIfTyaYg5Bb7GstpdIsFwmAq Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="262440244" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="262440244" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jun 2022 22:15:06 -0700 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="613427118" Received: from nvishwa1-desk.sc.intel.com ([172.25.29.76]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 16 Jun 2022 22:15:06 -0700 From: Niranjana Vishwanathapura To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, daniel.vetter@intel.com Subject: [PATCH v2 0/3] drm/doc/rfc: i915 VM_BIND feature design + uapi Date: Thu, 16 Jun 2022 22:14:42 -0700 Message-Id: <20220617051445.8901-1-niranjana.vishwanathapura@intel.com> X-Mailer: git-send-email 2.21.0.rc0.32.g243a4c7e27 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: matthew.brost@intel.com, paulo.r.zanoni@intel.com, tvrtko.ursulin@intel.com, chris.p.wilson@intel.com, thomas.hellstrom@intel.com, oak.zeng@intel.com, matthew.auld@intel.com, jason@jlekstrand.net, lionel.g.landwerlin@intel.com, christian.koenig@amd.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This is the i915 driver VM_BIND feature design RFC patch series along with the required uapi definition and description of intended use cases. v2: Reduce the scope to simple Mesa use case. Remove all compute related uapi, vm_bind/unbind queue support and only support a timeline out fence instead of an in/out timeline fence array. Signed-off-by: Niranjana Vishwanathapura Niranjana Vishwanathapura (3): drm/doc/rfc: VM_BIND feature design document drm/i915: Update i915 uapi documentation drm/doc/rfc: VM_BIND uapi definition Documentation/gpu/rfc/i915_vm_bind.h | 226 +++++++++++++++++++++++ Documentation/gpu/rfc/i915_vm_bind.rst | 238 +++++++++++++++++++++++++ Documentation/gpu/rfc/index.rst | 4 + include/uapi/drm/i915_drm.h | 205 ++++++++++++++++----- 4 files changed, 628 insertions(+), 45 deletions(-) create mode 100644 Documentation/gpu/rfc/i915_vm_bind.h create mode 100644 Documentation/gpu/rfc/i915_vm_bind.rst -- 2.21.0.rc0.32.g243a4c7e27 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 165F2C43334 for ; Fri, 17 Jun 2022 05:15:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C12C911AEE9; Fri, 17 Jun 2022 05:15:07 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id D2A4411AB1A; Fri, 17 Jun 2022 05:15:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655442906; x=1686978906; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=yzzgCpzUKc+vhQ746rwG5grVv3R/h6I3qPANhwuVD0A=; b=KeiH2yMbvlmjquZrfG1JbQmmyPqlN8aA9EYd/7ZlFIV7aqSeRl7I0vSg veivQPkuilfPUXH1+C41ACF5MROsBaorzcm/PgwtMD1LNhOnWhoayXk2r SyVawLAVZJbV2xfRmUZkfdLYpb3doLMXEwF7Xx8qtlkfo1N4QUyHJzwbT VI+XJwDm9UZnH/aGUo9K+2Ox1Wq4dGnT0ceJPW9cK7q4o9AVJ2Ky1NBNr OChx7FZqg2WLC8ACiSRBYiU1BJqbyBj7+mlcExkzlOKLvEBtIJofLM7el BEVPCatfCidztQ3ae87JTPDJHskSLmU0AkIfTyaYg5Bb7GstpdIsFwmAq Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="262440244" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="262440244" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jun 2022 22:15:06 -0700 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="613427118" Received: from nvishwa1-desk.sc.intel.com ([172.25.29.76]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 16 Jun 2022 22:15:06 -0700 From: Niranjana Vishwanathapura To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, daniel.vetter@intel.com Date: Thu, 16 Jun 2022 22:14:42 -0700 Message-Id: <20220617051445.8901-1-niranjana.vishwanathapura@intel.com> X-Mailer: git-send-email 2.21.0.rc0.32.g243a4c7e27 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [Intel-gfx] [PATCH v2 0/3] drm/doc/rfc: i915 VM_BIND feature design + uapi X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulo.r.zanoni@intel.com, chris.p.wilson@intel.com, thomas.hellstrom@intel.com, matthew.auld@intel.com, christian.koenig@amd.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This is the i915 driver VM_BIND feature design RFC patch series along with the required uapi definition and description of intended use cases. v2: Reduce the scope to simple Mesa use case. Remove all compute related uapi, vm_bind/unbind queue support and only support a timeline out fence instead of an in/out timeline fence array. Signed-off-by: Niranjana Vishwanathapura Niranjana Vishwanathapura (3): drm/doc/rfc: VM_BIND feature design document drm/i915: Update i915 uapi documentation drm/doc/rfc: VM_BIND uapi definition Documentation/gpu/rfc/i915_vm_bind.h | 226 +++++++++++++++++++++++ Documentation/gpu/rfc/i915_vm_bind.rst | 238 +++++++++++++++++++++++++ Documentation/gpu/rfc/index.rst | 4 + include/uapi/drm/i915_drm.h | 205 ++++++++++++++++----- 4 files changed, 628 insertions(+), 45 deletions(-) create mode 100644 Documentation/gpu/rfc/i915_vm_bind.h create mode 100644 Documentation/gpu/rfc/i915_vm_bind.rst -- 2.21.0.rc0.32.g243a4c7e27