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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH v3 33/51] target/arm: Implement SME integer outer product
Date: Mon, 20 Jun 2022 10:52:17 -0700	[thread overview]
Message-ID: <20220620175235.60881-34-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220620175235.60881-1-richard.henderson@linaro.org>

This is SMOPA, SUMOPA, USMOPA_s, UMOPA, for both Int8 and Int16.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/helper-sme.h    | 16 ++++++++
 target/arm/sme.decode      | 10 +++++
 target/arm/sme_helper.c    | 82 ++++++++++++++++++++++++++++++++++++++
 target/arm/translate-sme.c | 14 +++++++
 4 files changed, 122 insertions(+)

diff --git a/target/arm/helper-sme.h b/target/arm/helper-sme.h
index ecc957be14..31562551ee 100644
--- a/target/arm/helper-sme.h
+++ b/target/arm/helper-sme.h
@@ -128,3 +128,19 @@ DEF_HELPER_FLAGS_7(sme_fmopa_d, TCG_CALL_NO_RWG,
                    void, ptr, ptr, ptr, ptr, ptr, ptr, i32)
 DEF_HELPER_FLAGS_6(sme_bfmopa, TCG_CALL_NO_RWG,
                    void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_smopa_s, TCG_CALL_NO_RWG,
+                   void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_umopa_s, TCG_CALL_NO_RWG,
+                   void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_sumopa_s, TCG_CALL_NO_RWG,
+                   void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_usmopa_s, TCG_CALL_NO_RWG,
+                   void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_smopa_d, TCG_CALL_NO_RWG,
+                   void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_umopa_d, TCG_CALL_NO_RWG,
+                   void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_sumopa_d, TCG_CALL_NO_RWG,
+                   void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_usmopa_d, TCG_CALL_NO_RWG,
+                   void, ptr, ptr, ptr, ptr, ptr, i32)
diff --git a/target/arm/sme.decode b/target/arm/sme.decode
index e8d27fd8a0..628804e37a 100644
--- a/target/arm/sme.decode
+++ b/target/arm/sme.decode
@@ -76,3 +76,13 @@ FMOPA_d         10000000 110 ..... ... ... ..... . 0 ...        @op_64
 
 BFMOPA          10000001 100 ..... ... ... ..... . 00 ..        @op_32
 FMOPA_h         10000001 101 ..... ... ... ..... . 00 ..        @op_32
+
+SMOPA_s         1010000 0 10 0 ..... ... ... ..... . 00 ..      @op_32
+SUMOPA_s        1010000 0 10 1 ..... ... ... ..... . 00 ..      @op_32
+USMOPA_s        1010000 1 10 0 ..... ... ... ..... . 00 ..      @op_32
+UMOPA_s         1010000 1 10 1 ..... ... ... ..... . 00 ..      @op_32
+
+SMOPA_d         1010000 0 11 0 ..... ... ... ..... . 0 ...      @op_64
+SUMOPA_d        1010000 0 11 1 ..... ... ... ..... . 0 ...      @op_64
+USMOPA_d        1010000 1 11 0 ..... ... ... ..... . 0 ...      @op_64
+UMOPA_d         1010000 1 11 1 ..... ... ... ..... . 0 ...      @op_64
diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c
index 6863a204d4..f1c7e6ae56 100644
--- a/target/arm/sme_helper.c
+++ b/target/arm/sme_helper.c
@@ -1090,3 +1090,85 @@ void HELPER(sme_bfmopa)(void *vza, void *vzn, void *vzm, void *vpn,
         } while (row & 15);
     }
 }
+
+typedef uint64_t IMOPFn(uint64_t, uint64_t, uint64_t, uint8_t, bool);
+
+static inline void do_imopa(uint64_t *za, uint64_t *zn, uint64_t *zm,
+                            uint8_t *pn, uint8_t *pm,
+                            uint32_t desc, IMOPFn *fn)
+{
+    intptr_t row, col, oprsz = simd_oprsz(desc) / 8;
+    bool neg = simd_data(desc);
+
+    for (row = 0; row < oprsz; ++row) {
+        uint8_t pa = pn[H1(row)];
+        uint64_t *za_row = &za[row * sizeof(ARMVectorReg)];
+        uint64_t n = zn[row];
+
+        for (col = 0; col < oprsz; ++col) {
+            uint8_t pb = pm[H1(col)];
+            uint64_t *a = &za_row[col];
+
+            *a = fn(n, zm[col], *a, pa & pb, neg);
+        }
+    }
+}
+
+#define DEF_IMOP_32(NAME, NTYPE, MTYPE) \
+static uint64_t NAME(uint64_t n, uint64_t m, uint64_t a, uint8_t p, bool neg) \
+{                                                                           \
+    uint32_t sum0 = 0, sum1 = 0;                                            \
+    /* Apply P to N as a mask, making the inactive elements 0. */           \
+    n &= expand_pred_b(p);                                                  \
+    sum0 += (NTYPE)(n >> 0) * (MTYPE)(m >> 0);                              \
+    sum0 += (NTYPE)(n >> 8) * (MTYPE)(m >> 8);                              \
+    sum0 += (NTYPE)(n >> 16) * (MTYPE)(m >> 16);                            \
+    sum0 += (NTYPE)(n >> 24) * (MTYPE)(m >> 24);                            \
+    sum1 += (NTYPE)(n >> 32) * (MTYPE)(m >> 32);                            \
+    sum1 += (NTYPE)(n >> 40) * (MTYPE)(m >> 40);                            \
+    sum1 += (NTYPE)(n >> 48) * (MTYPE)(m >> 48);                            \
+    sum1 += (NTYPE)(n >> 56) * (MTYPE)(m >> 56);                            \
+    if (neg) {                                                              \
+        sum0 = (uint32_t)a - sum0, sum1 = (uint32_t)(a >> 32) - sum1;       \
+    } else {                                                                \
+        sum0 = (uint32_t)a + sum0, sum1 = (uint32_t)(a >> 32) + sum1;       \
+    }                                                                       \
+    return ((uint64_t)sum1 << 32) | sum0;                                   \
+}
+
+#define DEF_IMOP_64(NAME, NTYPE, MTYPE) \
+static uint64_t NAME(uint64_t n, uint64_t m, uint64_t a, uint8_t p, bool neg) \
+{                                                                           \
+    uint64_t sum = 0;                                                       \
+    /* Apply P to N as a mask, making the inactive elements 0. */           \
+    n &= expand_pred_h(p);                                                  \
+    sum += (NTYPE)(n >> 0) * (MTYPE)(m >> 0);                               \
+    sum += (NTYPE)(n >> 16) * (MTYPE)(m >> 16);                             \
+    sum += (NTYPE)(n >> 32) * (MTYPE)(m >> 32);                             \
+    sum += (NTYPE)(n >> 48) * (MTYPE)(m >> 48);                             \
+    return neg ? a - sum : a + sum;                                         \
+}
+
+DEF_IMOP_32(smopa_s, int8_t, int8_t)
+DEF_IMOP_32(umopa_s, uint8_t, uint8_t)
+DEF_IMOP_32(sumopa_s, int8_t, uint8_t)
+DEF_IMOP_32(usmopa_s, uint8_t, int8_t)
+
+DEF_IMOP_64(smopa_d, int16_t, int16_t)
+DEF_IMOP_64(umopa_d, uint16_t, uint16_t)
+DEF_IMOP_64(sumopa_d, int16_t, uint16_t)
+DEF_IMOP_64(usmopa_d, uint16_t, int16_t)
+
+#define DEF_IMOPH(NAME) \
+    void HELPER(sme_##NAME)(void *vza, void *vzn, void *vzm, void *vpn,      \
+                            void *vpm, uint32_t desc)                        \
+    { do_imopa(vza, vzn, vzm, vpn, vpm, desc, NAME); }
+
+DEF_IMOPH(smopa_s)
+DEF_IMOPH(umopa_s)
+DEF_IMOPH(sumopa_s)
+DEF_IMOPH(usmopa_s)
+DEF_IMOPH(smopa_d)
+DEF_IMOPH(umopa_d)
+DEF_IMOPH(sumopa_d)
+DEF_IMOPH(usmopa_d)
diff --git a/target/arm/translate-sme.c b/target/arm/translate-sme.c
index 847f2274b1..4aa0aff25c 100644
--- a/target/arm/translate-sme.c
+++ b/target/arm/translate-sme.c
@@ -337,3 +337,17 @@ TRANS_FEAT(FMOPA_d, aa64_sme_f64f64, do_outprod_fpst,
 
 /* TODO: FEAT_EBF16 */
 TRANS_FEAT(BFMOPA, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_bfmopa)
+
+TRANS_FEAT(SMOPA_s, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_smopa_s)
+TRANS_FEAT(UMOPA_s, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_umopa_s)
+TRANS_FEAT(SUMOPA_s, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_sumopa_s)
+TRANS_FEAT(USMOPA_s, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_usmopa_s)
+
+TRANS_FEAT(SMOPA_d, aa64_sme_i16i64, do_outprod,
+           a, MO_64, gen_helper_sme_smopa_d)
+TRANS_FEAT(UMOPA_d, aa64_sme_i16i64, do_outprod,
+           a, MO_64, gen_helper_sme_umopa_d)
+TRANS_FEAT(SUMOPA_d, aa64_sme_i16i64, do_outprod,
+           a, MO_64, gen_helper_sme_sumopa_d)
+TRANS_FEAT(USMOPA_d, aa64_sme_i16i64, do_outprod,
+           a, MO_64, gen_helper_sme_usmopa_d)
-- 
2.34.1



  parent reply	other threads:[~2022-06-20 18:46 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-20 17:51 [PATCH v3 00/51] target/arm: Scalable Matrix Extension Richard Henderson
2022-06-20 17:51 ` [PATCH v3 01/51] target/arm: Implement TPIDR2_EL0 Richard Henderson
2022-06-20 17:51 ` [PATCH v3 02/51] target/arm: Add SMEEXC_EL to TB flags Richard Henderson
2022-06-20 17:51 ` [PATCH v3 03/51] target/arm: Add syn_smetrap Richard Henderson
2022-06-20 17:51 ` [PATCH v3 04/51] target/arm: Add ARM_CP_SME Richard Henderson
2022-06-20 17:51 ` [PATCH v3 05/51] target/arm: Add SVCR Richard Henderson
2022-06-20 17:51 ` [PATCH v3 06/51] target/arm: Add SMCR_ELx Richard Henderson
2022-06-20 17:51 ` [PATCH v3 07/51] target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2 Richard Henderson
2022-06-20 17:51 ` [PATCH v3 08/51] target/arm: Add PSTATE.{SM,ZA} to TB flags Richard Henderson
2022-06-20 17:51 ` [PATCH v3 09/51] target/arm: Add the SME ZA storage to CPUARMState Richard Henderson
2022-06-21 20:24   ` Peter Maydell
2022-06-20 17:51 ` [PATCH v3 10/51] target/arm: Implement SMSTART, SMSTOP Richard Henderson
2022-06-20 17:51 ` [PATCH v3 11/51] target/arm: Move error for sve%d property to arm_cpu_sve_finalize Richard Henderson
2022-06-20 17:51 ` [PATCH v3 12/51] target/arm: Create ARMVQMap Richard Henderson
2022-06-20 17:51 ` [PATCH v3 13/51] target/arm: Generalize cpu_arm_{get,set}_vq Richard Henderson
2022-06-20 17:51 ` [PATCH v3 14/51] target/arm: Generalize cpu_arm_{get, set}_default_vec_len Richard Henderson
2022-06-20 17:51 ` [PATCH v3 15/51] target/arm: Move arm_cpu_*_finalize to internals.h Richard Henderson
2022-06-20 17:52 ` [PATCH v3 16/51] target/arm: Unexport aarch64_add_*_properties Richard Henderson
2022-06-20 17:52 ` [PATCH v3 17/51] target/arm: Add cpu properties for SME Richard Henderson
2022-06-21 17:13   ` Peter Maydell
2024-04-12 11:36   ` Peter Maydell
2024-04-12 16:17     ` Richard Henderson
2022-06-20 17:52 ` [PATCH v3 18/51] target/arm: Introduce sve_vqm1_for_el_sm Richard Henderson
2022-06-20 17:52 ` [PATCH v3 19/51] target/arm: Add SVL to TB flags Richard Henderson
2022-06-20 17:52 ` [PATCH v3 20/51] target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h Richard Henderson
2022-06-20 17:52 ` [PATCH v3 21/51] target/arm: Add infrastructure for disas_sme Richard Henderson
2022-06-20 17:52 ` [PATCH v3 22/51] target/arm: Trap AdvSIMD usage when Streaming SVE is active Richard Henderson
2022-06-24 15:30   ` Peter Maydell
2022-06-24 20:34     ` Richard Henderson
2022-06-24 21:38       ` Peter Maydell
2022-06-26  3:37         ` Richard Henderson
2022-06-20 17:52 ` [PATCH v3 23/51] target/arm: Implement SME RDSVL, ADDSVL, ADDSPL Richard Henderson
2022-06-21 17:23   ` Peter Maydell
2022-06-22  0:58     ` Richard Henderson
2022-06-23 10:12       ` Peter Maydell
2022-06-20 17:52 ` [PATCH v3 24/51] target/arm: Implement SME ZERO Richard Henderson
2022-06-21 20:07   ` Peter Maydell
2022-06-20 17:52 ` [PATCH v3 25/51] target/arm: Implement SME MOVA Richard Henderson
2022-06-23 11:24   ` Peter Maydell
2022-06-23 14:44     ` Richard Henderson
2022-06-20 17:52 ` [PATCH v3 26/51] target/arm: Implement SME LD1, ST1 Richard Henderson
2022-06-23 11:41   ` Peter Maydell
2022-06-23 20:36     ` Richard Henderson
2022-06-24 10:05       ` Peter Maydell
2022-06-20 17:52 ` [PATCH v3 27/51] target/arm: Export unpredicated ld/st from translate-sve.c Richard Henderson
2022-06-23 11:42   ` Peter Maydell
2022-06-20 17:52 ` [PATCH v3 28/51] target/arm: Implement SME LDR, STR Richard Henderson
2022-06-23 11:46   ` Peter Maydell
2022-06-20 17:52 ` [PATCH v3 29/51] target/arm: Implement SME ADDHA, ADDVA Richard Henderson
2022-06-23 12:04   ` Peter Maydell
2022-06-20 17:52 ` [PATCH v3 30/51] target/arm: Implement FMOPA, FMOPS (non-widening) Richard Henderson
2022-06-24 12:31   ` Peter Maydell
2022-06-24 14:16     ` Richard Henderson
2022-06-20 17:52 ` [PATCH v3 31/51] target/arm: Implement BFMOPA, BFMOPS Richard Henderson
2022-06-20 17:52 ` [PATCH v3 32/51] target/arm: Implement FMOPA, FMOPS (widening) Richard Henderson
2022-06-20 17:52 ` Richard Henderson [this message]
2022-06-24 12:39   ` [PATCH v3 33/51] target/arm: Implement SME integer outer product Peter Maydell
2022-06-20 17:52 ` [PATCH v3 34/51] target/arm: Implement PSEL Richard Henderson
2022-06-24 12:51   ` Peter Maydell
2022-06-20 17:52 ` [PATCH v3 35/51] target/arm: Implement REVD Richard Henderson
2022-06-24 12:54   ` Peter Maydell
2022-06-20 17:52 ` [PATCH v3 36/51] target/arm: Implement SCLAMP, UCLAMP Richard Henderson
2022-06-24 13:00   ` Peter Maydell
2022-06-20 17:52 ` [PATCH v3 37/51] target/arm: Reset streaming sve state on exception boundaries Richard Henderson
2022-06-24 13:02   ` Peter Maydell
2022-06-20 17:52 ` [PATCH v3 38/51] target/arm: Enable SME for -cpu max Richard Henderson
2022-06-24 13:03   ` Peter Maydell
2022-06-20 17:52 ` [PATCH v3 39/51] linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS Richard Henderson
2022-06-20 17:52 ` [PATCH v3 40/51] linux-user/aarch64: Reset PSTATE.SM on syscalls Richard Henderson
2022-06-20 17:52 ` [PATCH v3 41/51] linux-user/aarch64: Add SM bit to SVE signal context Richard Henderson
2022-06-20 17:52 ` [PATCH v3 42/51] linux-user/aarch64: Tidy target_restore_sigframe error return Richard Henderson
2022-06-20 17:52 ` [PATCH v3 43/51] linux-user/aarch64: Do not allow duplicate or short sve records Richard Henderson
2022-06-20 17:52 ` [PATCH v3 44/51] linux-user/aarch64: Verify extra record lock succeeded Richard Henderson
2022-06-20 17:52 ` [PATCH v3 45/51] linux-user/aarch64: Move sve record checks into restore Richard Henderson
2022-06-20 17:52 ` [PATCH v3 46/51] linux-user/aarch64: Implement SME signal handling Richard Henderson
2022-06-20 17:52 ` [PATCH v3 47/51] linux-user: Rename sve prctls Richard Henderson
2022-06-20 17:52 ` [PATCH v3 48/51] linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL Richard Henderson
2022-06-20 17:52 ` [PATCH v3 49/51] target/arm: Only set ZEN in reset if SVE present Richard Henderson
2022-06-20 17:52 ` [PATCH v3 50/51] target/arm: Enable SME for user-only Richard Henderson
2022-06-20 17:52 ` [PATCH v3 51/51] linux-user/aarch64: Add SME related hwcap entries Richard Henderson
2022-06-24 15:02 ` [PATCH v3 00/51] target/arm: Scalable Matrix Extension Peter Maydell

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