From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BDA9A3D75 for ; Mon, 20 Jun 2022 20:07:24 +0000 (UTC) Received: by mail-wr1-f42.google.com with SMTP id k22so9641978wrd.6 for ; Mon, 20 Jun 2022 13:07:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rFP2epvfooKrZpPFT8BKKDNI28ulsq6H0dBYSPgFoyk=; b=AjebCnrCn0roYHEXtZUSrMTMzWgreVkEMmGmWHB4aW5MqCKA4G4WAtMmLhSH/wSD9O hErB+wW/nmuyZcj6VsVAhDUiCzXy1A0InOSiMOhVg1zOo944NV//bnCbQ2Nfq/Wvm/4X gHuja0BV7C29XQ21FTvJ66Q4m2HHGHfjAfbDNfzOus4oL46kEV7W/Ut/DNWQxw6A0wN3 MaclksZzjz+wgvfYM3RiCRmGkMi+n+Veo8oqESntYKECZMRtvsRVSUdWqg/UzoMptmRp DOSCYB+7UcRMW3szUyAX5e47sGuNfYYpbyhUPLebUPzr6yz1Frjd0ZNrD8flYUO0+4T7 n+iQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rFP2epvfooKrZpPFT8BKKDNI28ulsq6H0dBYSPgFoyk=; b=htX+1mYEKru/cS224ywQfYF+lF3DVUSnYOuImaYPgXAYeIuvZnAtSxWleeke+myOqL 6BSH6xd8jTHM1+r8pn8ErVGtLli4cxqzv7TDOJZwowbJRP7mUKAuGSwfIIrwCmzsJJT9 dkV8wrx+NljaoYHwMULcDvFJkvXx0VyOyrY4e1n9r385O1BBHPtxdklh19woh6vZlbEn kKxkYPgZvyrqgm4W3MRE5eXQIa6rssQ1KCxM/wUjByMJvTnK/zrbW+yYCIi25WqtQSfK +IDkpnG1g2iXDUHm1KBQ+8wKcrgY2fxEwvzEkig0XWzFuEPvKHJPasnqdPvQJElpg3A8 +ovw== X-Gm-Message-State: AJIora9ZsJ1LogLknsmXVKZPxK87jOmKwBSukAnaPZ8TBc/+s9+UpKC/ OK/RyjR7TYcibk4x8VmKhT4= X-Google-Smtp-Source: AGRyM1tPhWdLWdfyykUlpNJ3PSEDMPtwatE94NYU/Ih24mSrC9Dy3BbzCPtCbJhpEUzIutMTZqJdog== X-Received: by 2002:a05:6000:10d0:b0:21b:8ffb:80ad with SMTP id b16-20020a05600010d000b0021b8ffb80admr6433209wrx.444.1655755644354; Mon, 20 Jun 2022 13:07:24 -0700 (PDT) Received: from localhost (92.40.169.63.threembb.co.uk. [92.40.169.63]) by smtp.gmail.com with ESMTPSA id o20-20020a1c7514000000b0039c4ec6fdacsm15898561wmc.40.2022.06.20.13.07.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jun 2022 13:07:23 -0700 (PDT) From: Aidan MacDonald To: broonie@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, srinivas.kandagatla@linaro.org, bgoswami@codeaurora.org, gregkh@linuxfoundation.org, rafael@kernel.org, cw00.choi@samsung.com, krzysztof.kozlowski@linaro.org, b.zolnierkie@samsung.com, myungjoo.ham@samsung.com, michael@walle.cc, linus.walleij@linaro.org, brgl@bgdev.pl, tglx@linutronix.de, maz@kernel.org, lee.jones@linaro.org, mani@kernel.org, cristian.ciocaltea@gmail.com, wens@csie.org, tharvey@gateworks.com, rjones@gateworks.com, mazziesaccount@gmail.com, orsonzhai@gmail.com, baolin.wang7@gmail.com, zhang.lyra@gmail.com, jernej.skrabec@gmail.com, samuel@sholland.org, lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-actions@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, alsa-devel@alsa-project.org Subject: [PATCH 43/49] mfd: qcom-pm8008: Enable mask_writeonly flag for irq chip Date: Mon, 20 Jun 2022 21:06:38 +0100 Message-Id: <20220620200644.1961936-44-aidanmacdonald.0x0@gmail.com> In-Reply-To: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com> References: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The PM8008 has separate set and clear registers for controlling its interrupt masks. These are likely volatile registers which read as 0, and writing a '1' bit sets or clears the corresponding bit in the mask register. The PM8008's regmap config doesn't enable a cache, so all register access is already volatile. Adding the mask_writeonly flag should reduce bus traffic by avoiding a read-modify-write on the mask set/clear registers. Signed-off-by: Aidan MacDonald --- drivers/mfd/qcom-pm8008.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 7bc6becfe7f4..c778f2f87a17 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -141,6 +141,7 @@ static struct regmap_irq_chip pm8008_irq_chip = { .status_base = PM8008_STATUS_BASE, .mask_base = PM8008_MASK_BASE, .unmask_base = PM8008_UNMASK_BASE, + .mask_writeonly = true, .ack_base = PM8008_ACK_BASE, .config_base = pm8008_config_regs, .num_config_bases = ARRAY_SIZE(pm8008_config_regs), -- 2.35.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5E213C433EF for ; Mon, 20 Jun 2022 20:44:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xpfDO0rjUZLqED3D01ry78djQRTFHtIy3/jYX/1rv6o=; b=Y0pLfU3xKvKest /y81i1FjByR1V7BaJbp17lXJ0kiNZSsXags+yv409QGZMEjxb3X05sj9utepR66N0SbMwaCUl/IB4 MRFw9TIgljdRTmLMUvyc4xP0Cuhr0x9xAAANHEd0YoNQBHRm3EkPtDAkzMqhSbXXTa8v6YDNehOz2 eIqCgeenJ2iEv07rnKdOM7IotLBjtPXFDg4hDCwuTs16p2Unq4n/2npIpA1XqeRmMRIk5Gw0kDvZM yMMUrZDcJA9aBZTZt+utIJysl+3B64CdsmewFF2zrDHW8/c+eLEpGwp6W40qdab4IjCA5yVt9w+fi ftdNzrGuSO1xVBjio7vg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o3OEW-002MC6-Ni; Mon, 20 Jun 2022 20:42:53 +0000 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o3NgC-0029BG-Pj; Mon, 20 Jun 2022 20:07:26 +0000 Received: by mail-wr1-x429.google.com with SMTP id w17so16065006wrg.7; Mon, 20 Jun 2022 13:07:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rFP2epvfooKrZpPFT8BKKDNI28ulsq6H0dBYSPgFoyk=; b=AjebCnrCn0roYHEXtZUSrMTMzWgreVkEMmGmWHB4aW5MqCKA4G4WAtMmLhSH/wSD9O hErB+wW/nmuyZcj6VsVAhDUiCzXy1A0InOSiMOhVg1zOo944NV//bnCbQ2Nfq/Wvm/4X gHuja0BV7C29XQ21FTvJ66Q4m2HHGHfjAfbDNfzOus4oL46kEV7W/Ut/DNWQxw6A0wN3 MaclksZzjz+wgvfYM3RiCRmGkMi+n+Veo8oqESntYKECZMRtvsRVSUdWqg/UzoMptmRp DOSCYB+7UcRMW3szUyAX5e47sGuNfYYpbyhUPLebUPzr6yz1Frjd0ZNrD8flYUO0+4T7 n+iQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rFP2epvfooKrZpPFT8BKKDNI28ulsq6H0dBYSPgFoyk=; b=f6UkamTNRTMrwMqh3xQYZI3uF+u5C+P4QMzXiIfmTCR3lgySqTQFp/s/uvsRaT0D1c mXMf0UFlzRT7ZuWhDoCLnEpMrykVjNYFqCVJF3QPslSDnFRHk7pu5SVYMGU1bv34N2gw GMQS3WD266uGoSRIcQzMST3u32NA6Z7jKYJUQa9b+xJUrQPyhsq90ZPMxVCs1zcpgPrv kQpGvKyaHD4AA5eSzoh9EQcZsniANTmRk3HwOO59qo3x0LLmpu35f00XaY3KZNFkAYbx qTgJ/bUnzVpcm8F02ZOGTL+oInTssf3QOYf2kDEmIKpCOHxybT+bxp47KNzWYERZ+CNB VHUw== X-Gm-Message-State: AJIora8jSokxXUC1cEJiFkGAo93j0ZCM6vtP3DLUY56IR3IgcvB15Na2 YkNwqFf3yuHFEUZZw4ObX3Y= X-Google-Smtp-Source: AGRyM1tPhWdLWdfyykUlpNJ3PSEDMPtwatE94NYU/Ih24mSrC9Dy3BbzCPtCbJhpEUzIutMTZqJdog== X-Received: by 2002:a05:6000:10d0:b0:21b:8ffb:80ad with SMTP id b16-20020a05600010d000b0021b8ffb80admr6433209wrx.444.1655755644354; Mon, 20 Jun 2022 13:07:24 -0700 (PDT) Received: from localhost (92.40.169.63.threembb.co.uk. [92.40.169.63]) by smtp.gmail.com with ESMTPSA id o20-20020a1c7514000000b0039c4ec6fdacsm15898561wmc.40.2022.06.20.13.07.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jun 2022 13:07:23 -0700 (PDT) From: Aidan MacDonald To: broonie@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, srinivas.kandagatla@linaro.org, bgoswami@codeaurora.org, gregkh@linuxfoundation.org, rafael@kernel.org, cw00.choi@samsung.com, krzysztof.kozlowski@linaro.org, b.zolnierkie@samsung.com, myungjoo.ham@samsung.com, michael@walle.cc, linus.walleij@linaro.org, brgl@bgdev.pl, tglx@linutronix.de, maz@kernel.org, lee.jones@linaro.org, mani@kernel.org, cristian.ciocaltea@gmail.com, wens@csie.org, tharvey@gateworks.com, rjones@gateworks.com, mazziesaccount@gmail.com, orsonzhai@gmail.com, baolin.wang7@gmail.com, zhang.lyra@gmail.com, jernej.skrabec@gmail.com, samuel@sholland.org, lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-actions@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, alsa-devel@alsa-project.org Subject: [PATCH 43/49] mfd: qcom-pm8008: Enable mask_writeonly flag for irq chip Date: Mon, 20 Jun 2022 21:06:38 +0100 Message-Id: <20220620200644.1961936-44-aidanmacdonald.0x0@gmail.com> In-Reply-To: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com> References: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220620_130724_874422_0643AF8E X-CRM114-Status: UNSURE ( 9.52 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The PM8008 has separate set and clear registers for controlling its interrupt masks. These are likely volatile registers which read as 0, and writing a '1' bit sets or clears the corresponding bit in the mask register. The PM8008's regmap config doesn't enable a cache, so all register access is already volatile. Adding the mask_writeonly flag should reduce bus traffic by avoiding a read-modify-write on the mask set/clear registers. Signed-off-by: Aidan MacDonald --- drivers/mfd/qcom-pm8008.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 7bc6becfe7f4..c778f2f87a17 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -141,6 +141,7 @@ static struct regmap_irq_chip pm8008_irq_chip = { .status_base = PM8008_STATUS_BASE, .mask_base = PM8008_MASK_BASE, .unmask_base = PM8008_UNMASK_BASE, + .mask_writeonly = true, .ack_base = PM8008_ACK_BASE, .config_base = pm8008_config_regs, .num_config_bases = ARRAY_SIZE(pm8008_config_regs), -- 2.35.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A1552C43334 for ; Wed, 22 Jun 2022 15:34:59 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id DCA7520EB; Wed, 22 Jun 2022 17:34:07 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz DCA7520EB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1655912097; bh=7Xr91GBTIk8V/6Ucyw2lpWkyUfUIUrQGG12uVJ2UDGs=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=FH07/sbXTKmffSxcZni9/6Id7Y+H/R5WicuK9WDJBwjXygzCEwb/pYNF0vSi0g48r udRtxAw3d1YLti0BxfyDlOxkPUbQ8wLgEcdYGBUxSN8qBUkusrTpk7qqXsYlLJ0gV5 4g7WzEI7PrNQRVRlmMDNd4K+o61gcAPhiWfXv55U= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 4E69EF80633; Wed, 22 Jun 2022 17:23:47 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 1B196F804DA; Mon, 20 Jun 2022 22:07:27 +0200 (CEST) Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id A15E3F804DA for ; Mon, 20 Jun 2022 22:07:24 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz A15E3F804DA Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="AjebCnrC" Received: by mail-wr1-x42a.google.com with SMTP id e25so12215275wrc.13 for ; Mon, 20 Jun 2022 13:07:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rFP2epvfooKrZpPFT8BKKDNI28ulsq6H0dBYSPgFoyk=; b=AjebCnrCn0roYHEXtZUSrMTMzWgreVkEMmGmWHB4aW5MqCKA4G4WAtMmLhSH/wSD9O hErB+wW/nmuyZcj6VsVAhDUiCzXy1A0InOSiMOhVg1zOo944NV//bnCbQ2Nfq/Wvm/4X gHuja0BV7C29XQ21FTvJ66Q4m2HHGHfjAfbDNfzOus4oL46kEV7W/Ut/DNWQxw6A0wN3 MaclksZzjz+wgvfYM3RiCRmGkMi+n+Veo8oqESntYKECZMRtvsRVSUdWqg/UzoMptmRp DOSCYB+7UcRMW3szUyAX5e47sGuNfYYpbyhUPLebUPzr6yz1Frjd0ZNrD8flYUO0+4T7 n+iQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rFP2epvfooKrZpPFT8BKKDNI28ulsq6H0dBYSPgFoyk=; b=uZB06jlgjqqht4MshcKl8zaau7A5fAFhYElvdd0UZiD66gxBdcMZPlaNuoCZR37DRl 5G9VNwW2ImY13bC1MGtzSVNpJmjHI5aRuWoqeFxk3S8UA2WS6rHzHThiixF8agGz6JNz 7EQuvQyiS8+eWWCrI3fQ024Ok7sqHo/v7Whr5eBFOSC98HmSXekFhYD2ivfVOkblHv2T dgf/DwEosm3CRmEVqKhRxRG5AFv6J94glvt/SFOYpseGHlW1HtdPoAfsHmphAlJe2S7I 8wWZk/d7BC8563+ZIrIs4B+Gq0Bf2vZXynsYtOEEWPBwDE/iexOkTsIJ4sCNiSefv1R6 WtSA== X-Gm-Message-State: AJIora9xj8p0RR+LPEPu251yqkiG3WZ19n/hWmzYqKpwSYCCIAPNQY7H UFuCFLzHpbzKTP3IY/LfiZI= X-Google-Smtp-Source: AGRyM1tPhWdLWdfyykUlpNJ3PSEDMPtwatE94NYU/Ih24mSrC9Dy3BbzCPtCbJhpEUzIutMTZqJdog== X-Received: by 2002:a05:6000:10d0:b0:21b:8ffb:80ad with SMTP id b16-20020a05600010d000b0021b8ffb80admr6433209wrx.444.1655755644354; Mon, 20 Jun 2022 13:07:24 -0700 (PDT) Received: from localhost (92.40.169.63.threembb.co.uk. [92.40.169.63]) by smtp.gmail.com with ESMTPSA id o20-20020a1c7514000000b0039c4ec6fdacsm15898561wmc.40.2022.06.20.13.07.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jun 2022 13:07:23 -0700 (PDT) From: Aidan MacDonald To: broonie@kernel.org Subject: [PATCH 43/49] mfd: qcom-pm8008: Enable mask_writeonly flag for irq chip Date: Mon, 20 Jun 2022 21:06:38 +0100 Message-Id: <20220620200644.1961936-44-aidanmacdonald.0x0@gmail.com> In-Reply-To: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com> References: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Wed, 22 Jun 2022 17:23:18 +0200 Cc: alsa-devel@alsa-project.org, bgoswami@codeaurora.org, rafael@kernel.org, linus.walleij@linaro.org, bjorn.andersson@linaro.org, srinivas.kandagatla@linaro.org, myungjoo.ham@samsung.com, lee.jones@linaro.org, samuel@sholland.org, maz@kernel.org, brgl@bgdev.pl, mani@kernel.org, krzysztof.kozlowski@linaro.org, jernej.skrabec@gmail.com, cw00.choi@samsung.com, wens@csie.org, agross@kernel.org, orsonzhai@gmail.com, linux-sunxi@lists.linux.dev, b.zolnierkie@samsung.com, linux-arm-msm@vger.kernel.org, tharvey@gateworks.com, linux-actions@lists.infradead.org, linux-gpio@vger.kernel.org, tiwai@suse.com, tglx@linutronix.de, cristian.ciocaltea@gmail.com, linux-arm-kernel@lists.infradead.org, rjones@gateworks.com, gregkh@linuxfoundation.org, lgirdwood@gmail.com, linux-kernel@vger.kernel.org, michael@walle.cc, zhang.lyra@gmail.com, baolin.wang7@gmail.com, mazziesaccount@gmail.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" The PM8008 has separate set and clear registers for controlling its interrupt masks. These are likely volatile registers which read as 0, and writing a '1' bit sets or clears the corresponding bit in the mask register. The PM8008's regmap config doesn't enable a cache, so all register access is already volatile. Adding the mask_writeonly flag should reduce bus traffic by avoiding a read-modify-write on the mask set/clear registers. Signed-off-by: Aidan MacDonald --- drivers/mfd/qcom-pm8008.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 7bc6becfe7f4..c778f2f87a17 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -141,6 +141,7 @@ static struct regmap_irq_chip pm8008_irq_chip = { .status_base = PM8008_STATUS_BASE, .mask_base = PM8008_MASK_BASE, .unmask_base = PM8008_UNMASK_BASE, + .mask_writeonly = true, .ack_base = PM8008_ACK_BASE, .config_base = pm8008_config_regs, .num_config_bases = ARRAY_SIZE(pm8008_config_regs), -- 2.35.1