From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20A57CCA47E for ; Fri, 24 Jun 2022 09:10:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231384AbiFXJKI (ORCPT ); Fri, 24 Jun 2022 05:10:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55586 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230185AbiFXJKE (ORCPT ); Fri, 24 Jun 2022 05:10:04 -0400 Received: from twspam01.aspeedtech.com (twspam01.aspeedtech.com [211.20.114.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 454AE4F1DE; Fri, 24 Jun 2022 02:10:02 -0700 (PDT) Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 25O8qkU0088205; Fri, 24 Jun 2022 16:52:46 +0800 (GMT-8) (envelope-from neal_liu@aspeedtech.com) Received: from localhost.localdomain (192.168.10.10) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Jun 2022 17:08:30 +0800 From: Neal Liu To: Corentin Labbe , Christophe JAILLET , Randy Dunlap , Herbert Xu , "David S . Miller" , Rob Herring , Krzysztof Kozlowski , Joel Stanley , "Andrew Jeffery" , Dhananjay Phadke , "Johnny Huang" CC: , , , , , Subject: [PATCH v4 0/5] Add Aspeed crypto driver for hardware acceleration Date: Fri, 24 Jun 2022 17:08:22 +0800 Message-ID: <20220624090827.3909179-1-neal_liu@aspeedtech.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [192.168.10.10] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 25O8qkU0088205 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Aspeed Hash and Crypto Engine (HACE) is designed to accelerate the throughput of hash data digest, encryption and decryption. These patches aim to add Aspeed hash & crypto driver support. The hash & crypto driver also pass the run-time self tests that take place at algorithm registration. Tested-by below configs: - CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set - CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y - CONFIG_DMA_API_DEBUG=y - CONFIG_DMA_API_DEBUG_SG=y - CONFIG_CPU_BIG_ENDIAN=y Change since v3: - Use dmam_alloc_coherent() instead to manage dma_alloc_coherent(). - Add more error handler of dma_prepare() & crypto_engine_start(). Change since v2: - Fix endianness issue. Tested on both little endian & big endian system. - Use common crypto hardware engine for enqueue & dequeue requests. - Use pre-defined IVs for SHA-family. - Revise error handler flow. - Fix sorts of coding style problems. Change since v1: - Add more error handlers, including DMA memory allocate/free, DMA map/unmap, clock enable/disable, etc. - Fix check dma_map error for config DMA_API_DEBUG. - Fix dt-binding doc & dts node naming. Neal Liu (5): crypto: aspeed: Add HACE hash driver dt-bindings: clock: Add AST2600 HACE reset definition ARM: dts: aspeed: Add HACE device controller node dt-bindings: crypto: add documentation for aspeed hace crypto: aspeed: add HACE crypto driver .../bindings/crypto/aspeed,ast2500-hace.yaml | 53 + MAINTAINERS | 7 + arch/arm/boot/dts/aspeed-g6.dtsi | 8 + drivers/crypto/Kconfig | 1 + drivers/crypto/Makefile | 1 + drivers/crypto/aspeed/Kconfig | 40 + drivers/crypto/aspeed/Makefile | 8 + drivers/crypto/aspeed/aspeed-hace-crypto.c | 1041 ++++++++++++ drivers/crypto/aspeed/aspeed-hace-hash.c | 1428 +++++++++++++++++ drivers/crypto/aspeed/aspeed-hace.c | 301 ++++ drivers/crypto/aspeed/aspeed-hace.h | 289 ++++ include/dt-bindings/clock/ast2600-clock.h | 1 + 12 files changed, 3178 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml create mode 100644 drivers/crypto/aspeed/Kconfig create mode 100644 drivers/crypto/aspeed/Makefile create mode 100644 drivers/crypto/aspeed/aspeed-hace-crypto.c create mode 100644 drivers/crypto/aspeed/aspeed-hace-hash.c create mode 100644 drivers/crypto/aspeed/aspeed-hace.c create mode 100644 drivers/crypto/aspeed/aspeed-hace.h -- 2.25.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1AA42C433EF for ; Fri, 24 Jun 2022 09:43:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=4qb8gIeKQguBty/OtMYcHxdAH7lDmT84Da9zMOKqZZY=; b=OouhgaclKcT5vJ gBXiMPCVtixobBsLtDkeC73bYwif1VTzACQBNqpbS9M3sKW8CP/euhcNzpgVKh2DJHsaRQHm6bWj2 SBWpY5E5X5oOfw4H0cqx8z8yl5Zl1C6AFBKy2CZ1QrYMC2inantEWXcAXM5D9D4YRqf3vxswwnioc qd2mj+FliOIcFYackkGWsteJpWP54hAiOmyp4/1f1sPOZrYZf7oUnyfIjOGzu/oF7p9IsbIhT6mrW iAvJhswiRN4e1t7ejooHMjbxX7fsnbg4ANRLSaptIyEmjCrkHOvM+k3+/rr5nazwVMV7uAbkBT/NT 0rlKvvD5QADdPK/UsStw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4fpS-001UnW-6K; Fri, 24 Jun 2022 09:42:19 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4flJ-001SsS-Ts for linux-arm-kernel@bombadil.infradead.org; Fri, 24 Jun 2022 09:38:01 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Type:Content-Transfer-Encoding :MIME-Version:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To:Content-ID: Content-Description:In-Reply-To:References; bh=cJB+s6yzttrtv3slMkAlce72knh6BX5IrEseItL/dTE=; b=B2gHRjUC0uIJiNpALj4gOy8Pr9 qGMwssTp+5+mkR2F3qDreY8W9Px6FrZe6C58Aq3RukI0qDFI6lY9HknZiUTG4g2t3XhGH3VK5uq8x 3k+yN+g9ypPcBg82C63e0N3437bvep5B2nM6a21x/iPL0pLPDWDVEsQySc7fVA6IYSIb0BnxQIQT5 dvBDt7ugAOm+y+oFONDNjhqDh3+orPXC6B2Jnsd32NFOyFii/QrYemVqzhegGPNEEqdZYLSKS4DAK 4ILZzI6VLDnrq4K5sOhhI3zhXHImVBZKJOe5yejsLiVAN1RJoKli7rt6+evReEqK3QeaKWzZ7osWg ZhQu0xfA==; Received: from twspam01.aspeedtech.com ([211.20.114.71]) by desiato.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4fJr-00C8Mq-Iy for linux-arm-kernel@lists.infradead.org; Fri, 24 Jun 2022 09:09:48 +0000 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 25O8qkU0088205; Fri, 24 Jun 2022 16:52:46 +0800 (GMT-8) (envelope-from neal_liu@aspeedtech.com) Received: from localhost.localdomain (192.168.10.10) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Jun 2022 17:08:30 +0800 From: Neal Liu To: Corentin Labbe , Christophe JAILLET , Randy Dunlap , Herbert Xu , "David S . Miller" , Rob Herring , Krzysztof Kozlowski , Joel Stanley , "Andrew Jeffery" , Dhananjay Phadke , "Johnny Huang" CC: , , , , , Subject: [PATCH v4 0/5] Add Aspeed crypto driver for hardware acceleration Date: Fri, 24 Jun 2022 17:08:22 +0800 Message-ID: <20220624090827.3909179-1-neal_liu@aspeedtech.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [192.168.10.10] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 25O8qkU0088205 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220624_100943_971296_EE666B78 X-CRM114-Status: GOOD ( 10.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Aspeed Hash and Crypto Engine (HACE) is designed to accelerate the throughput of hash data digest, encryption and decryption. These patches aim to add Aspeed hash & crypto driver support. The hash & crypto driver also pass the run-time self tests that take place at algorithm registration. Tested-by below configs: - CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set - CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y - CONFIG_DMA_API_DEBUG=y - CONFIG_DMA_API_DEBUG_SG=y - CONFIG_CPU_BIG_ENDIAN=y Change since v3: - Use dmam_alloc_coherent() instead to manage dma_alloc_coherent(). - Add more error handler of dma_prepare() & crypto_engine_start(). Change since v2: - Fix endianness issue. Tested on both little endian & big endian system. - Use common crypto hardware engine for enqueue & dequeue requests. - Use pre-defined IVs for SHA-family. - Revise error handler flow. - Fix sorts of coding style problems. Change since v1: - Add more error handlers, including DMA memory allocate/free, DMA map/unmap, clock enable/disable, etc. - Fix check dma_map error for config DMA_API_DEBUG. - Fix dt-binding doc & dts node naming. Neal Liu (5): crypto: aspeed: Add HACE hash driver dt-bindings: clock: Add AST2600 HACE reset definition ARM: dts: aspeed: Add HACE device controller node dt-bindings: crypto: add documentation for aspeed hace crypto: aspeed: add HACE crypto driver .../bindings/crypto/aspeed,ast2500-hace.yaml | 53 + MAINTAINERS | 7 + arch/arm/boot/dts/aspeed-g6.dtsi | 8 + drivers/crypto/Kconfig | 1 + drivers/crypto/Makefile | 1 + drivers/crypto/aspeed/Kconfig | 40 + drivers/crypto/aspeed/Makefile | 8 + drivers/crypto/aspeed/aspeed-hace-crypto.c | 1041 ++++++++++++ drivers/crypto/aspeed/aspeed-hace-hash.c | 1428 +++++++++++++++++ drivers/crypto/aspeed/aspeed-hace.c | 301 ++++ drivers/crypto/aspeed/aspeed-hace.h | 289 ++++ include/dt-bindings/clock/ast2600-clock.h | 1 + 12 files changed, 3178 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml create mode 100644 drivers/crypto/aspeed/Kconfig create mode 100644 drivers/crypto/aspeed/Makefile create mode 100644 drivers/crypto/aspeed/aspeed-hace-crypto.c create mode 100644 drivers/crypto/aspeed/aspeed-hace-hash.c create mode 100644 drivers/crypto/aspeed/aspeed-hace.c create mode 100644 drivers/crypto/aspeed/aspeed-hace.h -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel