From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0A5EC43334 for ; Fri, 24 Jun 2022 12:18:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230369AbiFXMSh (ORCPT ); Fri, 24 Jun 2022 08:18:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229522AbiFXMSe (ORCPT ); Fri, 24 Jun 2022 08:18:34 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B94E81168; Fri, 24 Jun 2022 05:18:33 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5722461655; Fri, 24 Jun 2022 12:18:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 63E3EC34114; Fri, 24 Jun 2022 12:18:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656073112; bh=Vrl/35KfEA8EXbn5hdEP2XvtFH/JWegI4kprxqGCvz8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=st/AuHrEZ7YjHPn6RpxtJT00QhQHgZJ+TSKJnaNAs5PUD6P85zteMKnXkL/XYZ0aE 6dO2FhsmutMlCQZ7DTR4Pc5jDCW0Sz57NUR4Cs40idy550oMTVJolVulYAfwPEcFyw a8xA+085x65qFaFO1EPKtSv0gdvH1enSUjJ0ZOgrWwXyITAugCEFN6SRWSMN5k08ix P2y9iHInJp73O1dblnRM2Z5ALsUas5k9O0VJrqZLr8Dj4n6Nis+C+Ah8hOz/C24mqc 0m1G5d+8wn8ec0SUXrFz6BL3Cc4bLEI8je+6SvQCwfvlzYRefVnSmm5qCtFMNgzXld YZSqZ00OTTkYg== Date: Fri, 24 Jun 2022 13:18:26 +0100 From: Will Deacon To: Srinivasarao Pathipati Cc: mark.rutland@arm.com, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, alexander.shishkin@linux.intel.com, jolsa@kernel.org, namhyung@kernel.org, catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH V6] arm64: perf: Make exporting of pmu events configurable Message-ID: <20220624121825.GB18561@willie-the-truck> References: <1654779589-19937-1-git-send-email-quic_c_spathi@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1654779589-19937-1-git-send-email-quic_c_spathi@quicinc.com> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jun 09, 2022 at 06:29:49PM +0530, Srinivasarao Pathipati wrote: > The PMU export bit (PMCR_EL0.X) is getting reset during pmu reset, > Make it configurable using sysctls to enable/disable at runtime. > > Signed-off-by: Srinivasarao Pathipati > --- > Changes since V5: > - removed configuring with kernel parameters. > Changes since V4: > - Registering sysctls dynamically for only arm64 as suggested by Will > - Not removed the code to configure with kernel parameters > as the sysctl's kernel parameter(sysctl.kernel.export_pmu_events) > is not working at early bootup. pmu_reset() getting called before > sysctl's kernel parameter is set. > Changes since V3: > - export bit is now configurable with sysctl > - enabling export bit on reset instead of retaining > > Changes since V2: > Done below changes as per Will's comments > - enabling pmcr_x now configurable with kernel parameters and > by default it is disabled. > > Changes since V1: > - Preserving only PMCR_X bit as per Robin Murphy's comment. > > --- > Documentation/admin-guide/sysctl/kernel.rst | 11 +++++++++++ > arch/arm64/kernel/perf_event.c | 13 +++++++++++++ > 2 files changed, 24 insertions(+) > > diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentation/admin-guide/sysctl/kernel.rst > index ddccd10..c2ecd84 100644 > --- a/Documentation/admin-guide/sysctl/kernel.rst > +++ b/Documentation/admin-guide/sysctl/kernel.rst > @@ -267,6 +267,17 @@ domain names are in general different. For a detailed discussion > see the ``hostname(1)`` man page. > > > +export_pmu_events (arm64 only) > +============================== > + > +Controls the PMU export bit (PMCR_EL0.X), which enables the exporting of > +events over an IMPLEMENTATION DEFINED PMU event export bus to another device. > + > +0: disables exporting of events (default). > + > +1: enables exporting of events. > + > + > firmware_config > =============== > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > index cb69ff1..a8c32a0 100644 > --- a/arch/arm64/kernel/perf_event.c > +++ b/arch/arm64/kernel/perf_event.c > @@ -298,6 +298,7 @@ PMU_FORMAT_ATTR(long, "config1:0"); > PMU_FORMAT_ATTR(rdpmc, "config1:1"); > > static int sysctl_perf_user_access __read_mostly; > +static int sysctl_export_pmu_events __read_mostly; > > static inline bool armv8pmu_event_is_64bit(struct perf_event *event) > { > @@ -1047,6 +1048,9 @@ static void armv8pmu_reset(void *info) > if (armv8pmu_has_long_event(cpu_pmu)) > pmcr |= ARMV8_PMU_PMCR_LP; > > + if (sysctl_export_pmu_events) > + pmcr |= ARMV8_PMU_PMCR_X; I think we need to do this in armv8pmu_start() rather than armv8pmu_reset(), otherwise any changes to the sysctl at runtime won't take effect unless you do something like re-online the CPU. Will From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8B6DCC433EF for ; Fri, 24 Jun 2022 12:20:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=nIsHmy/9ZdRYXrN3jr5UHn/9npF8U43rWX+AG6zTQwg=; b=L/ikEs8sqifuwx Q6tY1Rlt1RMtjJrdfZSEEYWq1oU9cZGJdH78wbTK8NE+jyEtrW+KDf631MT3r6X6lsOQjcWUJz6LS dlYD5yfVTPI9VuJJdRc2N8xrVTL/xnffRNdtLskH5sJNG3/f+gPAilPY7nb3S/htbazWb8K51yM7x NIA7QBtGJ5P1dWqXu+DBPdED/z7haTMOZoiZ4023XKNfQxrY3skfspyOmfS/cwnGJZ/CrDfCQ+CZP I5ysy8arRXxwYtNMBYkwpSzjvOUXlqk8TlTfk2e+b36sqGbZKxHOQ87yFKECCcJI0JJ2DXg/SPd6j 0LTysDTyYWILeL5wvYzA==; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jun 09, 2022 at 06:29:49PM +0530, Srinivasarao Pathipati wrote: > The PMU export bit (PMCR_EL0.X) is getting reset during pmu reset, > Make it configurable using sysctls to enable/disable at runtime. > > Signed-off-by: Srinivasarao Pathipati > --- > Changes since V5: > - removed configuring with kernel parameters. > Changes since V4: > - Registering sysctls dynamically for only arm64 as suggested by Will > - Not removed the code to configure with kernel parameters > as the sysctl's kernel parameter(sysctl.kernel.export_pmu_events) > is not working at early bootup. pmu_reset() getting called before > sysctl's kernel parameter is set. > Changes since V3: > - export bit is now configurable with sysctl > - enabling export bit on reset instead of retaining > > Changes since V2: > Done below changes as per Will's comments > - enabling pmcr_x now configurable with kernel parameters and > by default it is disabled. > > Changes since V1: > - Preserving only PMCR_X bit as per Robin Murphy's comment. > > --- > Documentation/admin-guide/sysctl/kernel.rst | 11 +++++++++++ > arch/arm64/kernel/perf_event.c | 13 +++++++++++++ > 2 files changed, 24 insertions(+) > > diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentation/admin-guide/sysctl/kernel.rst > index ddccd10..c2ecd84 100644 > --- a/Documentation/admin-guide/sysctl/kernel.rst > +++ b/Documentation/admin-guide/sysctl/kernel.rst > @@ -267,6 +267,17 @@ domain names are in general different. For a detailed discussion > see the ``hostname(1)`` man page. > > > +export_pmu_events (arm64 only) > +============================== > + > +Controls the PMU export bit (PMCR_EL0.X), which enables the exporting of > +events over an IMPLEMENTATION DEFINED PMU event export bus to another device. > + > +0: disables exporting of events (default). > + > +1: enables exporting of events. > + > + > firmware_config > =============== > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > index cb69ff1..a8c32a0 100644 > --- a/arch/arm64/kernel/perf_event.c > +++ b/arch/arm64/kernel/perf_event.c > @@ -298,6 +298,7 @@ PMU_FORMAT_ATTR(long, "config1:0"); > PMU_FORMAT_ATTR(rdpmc, "config1:1"); > > static int sysctl_perf_user_access __read_mostly; > +static int sysctl_export_pmu_events __read_mostly; > > static inline bool armv8pmu_event_is_64bit(struct perf_event *event) > { > @@ -1047,6 +1048,9 @@ static void armv8pmu_reset(void *info) > if (armv8pmu_has_long_event(cpu_pmu)) > pmcr |= ARMV8_PMU_PMCR_LP; > > + if (sysctl_export_pmu_events) > + pmcr |= ARMV8_PMU_PMCR_X; I think we need to do this in armv8pmu_start() rather than armv8pmu_reset(), otherwise any changes to the sysctl at runtime won't take effect unless you do something like re-online the CPU. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel