From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C485FC433EF for ; Fri, 24 Jun 2022 16:36:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231373AbiFXQgd (ORCPT ); Fri, 24 Jun 2022 12:36:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229761AbiFXQga (ORCPT ); Fri, 24 Jun 2022 12:36:30 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F5DF4E384; Fri, 24 Jun 2022 09:36:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656088589; x=1687624589; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=ISZpanMTrKMtDF2ptQdE6nRc4RobHD9iXX2SAkgkzm8=; b=J5QyMSv0gVcMNtSsxHtX9zLYLHBe2tFpvYYxAn+R35GIlqjM0rNgchJP xR6QIg0NidV3a93N91zKHsmYa4XpINcmBgR48TMpSfU7Pl4UOEI2qWd0A kJfFm3ax8ClQxkhRlHCU19/2cy5z8fdLjW6WqdsDyh4Wg+YZjB/7jFBIc yYHd/jiLpFnvDGLGtmvUjr1y0DyAEiIo//+0V7D0IL4hgzJ1s0fBGcM5u 7WBKT6qs8147m0RIgqpUfQyn5pKKpmsW4xqFL1tUFB+BONQuUzjMmAm9S 4kj0hCWxLME6JYJDttTGVorlVmMhDSxT0yxEJw/4dD2kAhYsbHNq9Z08v g==; X-IronPort-AV: E=McAfee;i="6400,9594,10388"; a="342726209" X-IronPort-AV: E=Sophos;i="5.92,218,1650956400"; d="scan'208";a="342726209" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2022 09:36:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,218,1650956400"; d="scan'208";a="835188932" Received: from yilunxu-optiplex-7050.sh.intel.com (HELO localhost) ([10.239.159.165]) by fmsmga006.fm.intel.com with ESMTP; 24 Jun 2022 09:36:25 -0700 Date: Sat, 25 Jun 2022 00:28:15 +0800 From: Xu Yilun To: Nava kishore Manne Cc: mdf@kernel.org, hao.wu@intel.com, trix@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, michal.simek@xilinx.com, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, git@xilinx.com, Rob Herring Subject: Re: [PATCH v2 2/3] fpga: region: Add fpga-region 'power-domains' property Message-ID: <20220624162815.GA2142910@yilunxu-OptiPlex-7050> References: <20220523134517.4056873-1-nava.manne@xilinx.com> <20220523134517.4056873-3-nava.manne@xilinx.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220523134517.4056873-3-nava.manne@xilinx.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 23, 2022 at 07:15:16PM +0530, Nava kishore Manne wrote: > Add fpga-region 'power-domains' property to allow to handle > the FPGA/PL power domains. > > Signed-off-by: Nava kishore Manne > Acked-by: Rob Herring > --- > Changes for v2: > - Updated power-domains description. > > .../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt > index 7d3515264838..f299c3749505 100644 > --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt > +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt > @@ -196,6 +196,20 @@ Optional properties: > - config-complete-timeout-us : The maximum time in microseconds time for the > FPGA to go to operating mode after the region has been programmed. > - child nodes : devices in the FPGA after programming. > +- power-domains : A phandle and power domain specifier pair to the power domain > + which is responsible for turning on/off the power to the FPGA/PL region. Could you help explain what is PL? > +Example: > + fpga_full: fpga-full { > + compatible = "fpga-region"; > + fpga-mgr = <&zynqmp_pcap>; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + power-domains = <&zynqmp_firmware PL_PD>; > + }; > + > + The PL_PD power domain will be turned on before loading the bitstream > +and turned off while removing/unloading the bitstream using overlays. I think the single power-domain may not cover some use cases that of-fpga-region driver supports. It is possible there are already devices in fpga-region for static OF tree, or an overlay with no 'firmware-name' but 'external-fpga-config'. In these cases power domains may still be needed, is it? Another case is the fpga-region may need multiple power domains? Since the of-fpga-region driver is a generic fpga-region driver, we may investigate more for a compatible power-domain solution. Thanks, Yilun > > In the example below, when an overlay is applied targeting fpga-region0, > fpga_mgr is used to program the FPGA. Two bridges are controlled during > -- > 2.25.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0679FC433EF for ; Fri, 24 Jun 2022 16:37:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pKWynnZLU9yjxUwN4SksrQJ5I8Hj9JQSIFrAT3WtBsU=; b=MGXG3lpc7H2uOo phMzfGmXZ2MayyAskKMykfwAwxinxGPnNRLWrBvbyrh+ajowHfWSHbG123DROxj0OW36s0/dXMdoR /MWqjm8u7ZH+BsDbse/T9fCi2K5fvKbHFa0njGuYMxXuZDdN7gUDjlOSAvh4efBlynOUtAJTjkrx2 +PgYQRDgUnRJSYgUBnGn9gk367HqiBvEkCwz51w1uaqyRHo7hofo1Kw8Hboi+NNpmGfqMwJmqbl6k TkU6an8wzrRWlB31AK+9R+tYQ9T6R4pjy2w5WWRky+Kcl3R+lU/3MhIkEuIWOevICvWHAjJyAqm7Q ooMcRPGszJFVT5vGshAg==; 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X-IronPort-AV: E=McAfee;i="6400,9594,10388"; a="306502147" X-IronPort-AV: E=Sophos;i="5.92,218,1650956400"; d="scan'208";a="306502147" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2022 09:36:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,218,1650956400"; d="scan'208";a="835188932" Received: from yilunxu-optiplex-7050.sh.intel.com (HELO localhost) ([10.239.159.165]) by fmsmga006.fm.intel.com with ESMTP; 24 Jun 2022 09:36:25 -0700 Date: Sat, 25 Jun 2022 00:28:15 +0800 From: Xu Yilun To: Nava kishore Manne Cc: mdf@kernel.org, hao.wu@intel.com, trix@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, michal.simek@xilinx.com, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, git@xilinx.com, Rob Herring Subject: Re: [PATCH v2 2/3] fpga: region: Add fpga-region 'power-domains' property Message-ID: <20220624162815.GA2142910@yilunxu-OptiPlex-7050> References: <20220523134517.4056873-1-nava.manne@xilinx.com> <20220523134517.4056873-3-nava.manne@xilinx.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220523134517.4056873-3-nava.manne@xilinx.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220624_093630_145466_C7753985 X-CRM114-Status: GOOD ( 21.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, May 23, 2022 at 07:15:16PM +0530, Nava kishore Manne wrote: > Add fpga-region 'power-domains' property to allow to handle > the FPGA/PL power domains. > > Signed-off-by: Nava kishore Manne > Acked-by: Rob Herring > --- > Changes for v2: > - Updated power-domains description. > > .../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt > index 7d3515264838..f299c3749505 100644 > --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt > +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt > @@ -196,6 +196,20 @@ Optional properties: > - config-complete-timeout-us : The maximum time in microseconds time for the > FPGA to go to operating mode after the region has been programmed. > - child nodes : devices in the FPGA after programming. > +- power-domains : A phandle and power domain specifier pair to the power domain > + which is responsible for turning on/off the power to the FPGA/PL region. Could you help explain what is PL? > +Example: > + fpga_full: fpga-full { > + compatible = "fpga-region"; > + fpga-mgr = <&zynqmp_pcap>; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + power-domains = <&zynqmp_firmware PL_PD>; > + }; > + > + The PL_PD power domain will be turned on before loading the bitstream > +and turned off while removing/unloading the bitstream using overlays. I think the single power-domain may not cover some use cases that of-fpga-region driver supports. It is possible there are already devices in fpga-region for static OF tree, or an overlay with no 'firmware-name' but 'external-fpga-config'. In these cases power domains may still be needed, is it? Another case is the fpga-region may need multiple power domains? Since the of-fpga-region driver is a generic fpga-region driver, we may investigate more for a compatible power-domain solution. Thanks, Yilun > > In the example below, when an overlay is applied targeting fpga-region0, > fpga_mgr is used to program the FPGA. Two bridges are controlled during > -- > 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel