All of lore.kernel.org
 help / color / mirror / Atom feed
From: Swati Sharma <swati2.sharma@intel.com>
To: igt-dev@lists.freedesktop.org
Subject: [igt-dev] [v2 PATCH i-g-t 2/4] tests/i915/kms_flip_scaled_crc: Add new tests covering modifiers and pixel-formats
Date: Wed, 29 Jun 2022 00:21:26 +0530	[thread overview]
Message-ID: <20220628185128.19692-3-swati2.sharma@intel.com> (raw)
In-Reply-To: <20220628185128.19692-1-swati2.sharma@intel.com>

New test cases are added covering various modifiers and
pixel-formats.

v2: fixed typo

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
---
 tests/i915/kms_flip_scaled_crc.c | 258 ++++++++++++++++++++++++++++++-
 1 file changed, 257 insertions(+), 1 deletion(-)

diff --git a/tests/i915/kms_flip_scaled_crc.c b/tests/i915/kms_flip_scaled_crc.c
index d6edb01c..88640da2 100644
--- a/tests/i915/kms_flip_scaled_crc.c
+++ b/tests/i915/kms_flip_scaled_crc.c
@@ -57,6 +57,38 @@ const struct {
 		1.0,
 		2.0,
 	},
+	{
+		"flip-32bpp-yftile-to-64bpp-yftile-downscaling",
+		"Flip from 32bpp non scaled fb to 64bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB16161616F,
+		1.0,
+		2.0,
+	},
+	{
+		"flip-32bpp-xtile-to-64bpp-xtile-downscaling",
+		"Flip from 32bpp non scaled fb to 64bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_XRGB16161616F,
+		1.0,
+		2.0,
+	},
+	{
+		"flip-32bpp-4tile-to-64bpp-4tile-downscaling",
+		"Flip from 32bpp non scaled fb to 64bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB16161616F,
+		1.0,
+		2.0,
+	},
+	{
+		"flip-32bpp-linear-to-64bpp-linear-downscaling",
+		"Flip from 32bpp non scaled fb to 64bpp downscaled fb to stress CD clock programming",
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_XRGB8888,
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_XRGB16161616F,
+		1.0,
+		2.0,
+	},
 	{
 		"flip-64bpp-ytile-to-32bpp-ytile-downscaling",
 		"Flip from 64bpp non scaled fb to 32bpp downscaled fb to stress CD clock programming",
@@ -65,6 +97,38 @@ const struct {
 		1.0,
 		2.0,
 	},
+	{
+		"flip-64bpp-yftile-to-32bpp-yftile-downscaling",
+		"Flip from 64bpp non scaled fb to 32bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB8888,
+		1.0,
+		2.0,
+	},
+	{
+		"flip-64bpp-xtile-to-32bpp-xtile-downscaling",
+		"Flip from 64bpp non scaled fb to 32bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_XRGB8888,
+		1.0,
+		2.0,
+	},
+	{
+		"flip-64bpp-4tile-to-32bpp-4tile-downscaling",
+		"Flip from 64bpp non scaled fb to 32bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB8888,
+		1.0,
+		2.0,
+	},
+	{
+		"flip-64bpp-linear-to-32bpp-linear-downscaling",
+		"Flip from 64bpp non scaled fb to 32bpp downscaled fb to stress CD clock programming",
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_XRGB16161616F,
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_XRGB8888,
+		1.0,
+		2.0,
+	},
 	{
 		"flip-64bpp-ytile-to-16bpp-ytile-downscaling",
 		"Flip from 64bpp non scaled fb to 16bpp downscaled fb to stress CD clock programming",
@@ -73,6 +137,38 @@ const struct {
 		1.0,
 		2.0,
 	},
+	{
+		"flip-64bpp-yftile-to-16bpp-yftile-downscaling",
+		"Flip from 64bpp non scaled fb to 16bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_RGB565,
+		1.0,
+		2.0,
+	},
+	{
+		"flip-64bpp-xtile-to-16bpp-xtile-downscaling",
+		"Flip from 64bpp non scaled fb to 16bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_RGB565,
+		1.0,
+		2.0,
+	},
+	{
+		"flip-64bpp-4tile-to-16bpp-4tile-downscaling",
+		"Flip from 64bpp non scaled fb to 16bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_RGB565,
+		1.0,
+		2.0,
+	},
+	{
+		"flip-64bpp-linear-to-16bpp-linear-downscaling",
+		"Flip from 64bpp non scaled fb to 16bpp downscaled fb to stress CD clock programming",
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_XRGB16161616F,
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_RGB565,
+		1.0,
+		2.0,
+	},
 	{
 		"flip-32bpp-ytileccs-to-64bpp-ytile-downscaling",
 		"Flip from 32bpp non scaled fb to 64bpp downscaled fb to stress CD clock programming",
@@ -81,6 +177,14 @@ const struct {
 		1.0,
 		2.0,
 	},
+	{
+		"flip-32bpp-yftileccs-to-64bpp-yftile-downscaling",
+		"Flip from 32bpp non scaled fb to 64bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_Yf_TILED_CCS, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB16161616F,
+		1.0,
+		2.0,
+	},
 	{
 		"flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling",
 		"Flip from 32bpp non scaled fb to 32bpp downscaled fb to stress CD clock programming",
@@ -89,6 +193,14 @@ const struct {
 		1.0,
 		2.0,
 	},
+	{
+		"flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling",
+		"Flip from 32bpp non scaled fb to 32bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_4_TILED_DG2_RC_CCS, DRM_FORMAT_XRGB8888,
+		1.0,
+		2.0,
+	},
 	{
 		"flip-32bpp-ytile-to-32bpp-ytileccs-downscaling",
 		"Flip from 32bpp non scaled fb to 32bpp downscaled fb to stress CD clock programming",
@@ -97,6 +209,14 @@ const struct {
 		1.0,
 		2.0,
 	},
+	{
+		"flip-32bpp-yftile-to-32bpp-yftileccs-downscaling",
+		"Flip from 32bpp non scaled fb to 32bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_Yf_TILED_CCS, DRM_FORMAT_XRGB8888,
+		1.0,
+		2.0,
+	},
 	{
 		"flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling",
 		"Flip from 64bpp non scaled fb to 32bpp downscaled fb to stress CD clock programming",
@@ -105,6 +225,14 @@ const struct {
 		1.0,
 		2.0,
 	},
+	{
+		"flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling",
+		"Flip from 64bpp non scaled fb to 32bpp downscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_4_TILED_DG2_RC_CCS, DRM_FORMAT_XRGB8888,
+		1.0,
+		2.0,
+	},
 	{
 		"flip-32bpp-ytile-to-64bpp-ytile-upscaling",
 		"Flip from 32bpp non scaled fb to 64bpp upscaled fb to stress CD clock programming",
@@ -113,6 +241,38 @@ const struct {
 		0.5,
 		1.0,
 	},
+	{
+		"flip-32bpp-yftile-to-64bpp-yftile-upscaling",
+		"Flip from 32bpp non scaled fb to 64bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB16161616F,
+		0.5,
+		1.0,
+	},
+	{
+		"flip-32bpp-xtile-to-64bpp-xtile-upscaling",
+		"Flip from 32bpp non scaled fb to 64bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_XRGB16161616F,
+		0.5,
+		1.0,
+	},
+	{
+		"flip-32bpp-4tile-to-64bpp-4tile-upscaling",
+		"Flip from 32bpp non scaled fb to 64bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB16161616F,
+		0.5,
+		1.0,
+	},
+	{
+		"flip-32bpp-linear-to-64bpp-linear-upscaling",
+		"Flip from 32bpp non scaled fb to 64bpp upscaled fb to stress CD clock programming",
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_XRGB8888,
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_XRGB16161616F,
+		0.5,
+		1.0,
+	},
 	{
 		"flip-64bpp-ytile-to-32bpp-ytile-upscaling",
 		"Flip from 64bpp non scaled fb to 32bpp upscaled fb to stress CD clock programming",
@@ -121,6 +281,38 @@ const struct {
 		0.5,
 		1.0,
 	},
+	{
+		"flip-64bpp-yftile-to-32bpp-yftile-upscaling",
+		"Flip from 64bpp non scaled fb to 32bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB8888,
+		0.5,
+		1.0,
+	},
+	{
+		"flip-64bpp-xtile-to-32bpp-xtile-upscaling",
+		"Flip from 64bpp non scaled fb to 32bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_XRGB8888,
+		0.5,
+		1.0,
+	},
+	{
+		"flip-64bpp-4tile-to-32bpp-4tile-upscaling",
+		"Flip from 64bpp non scaled fb to 32bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB8888,
+		0.5,
+		1.0,
+	},
+	{
+		"flip-64bpp-linear-to-32bpp-linear-upscaling",
+		"Flip from 64bpp non scaled fb to 32bpp upscaled fb to stress CD clock programming",
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_XRGB16161616F,
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_XRGB8888,
+		0.5,
+		1.0,
+	},
 	{
 		"flip-64bpp-ytile-to-16bpp-ytile-upscaling",
 		"Flip from 64bpp non scaled fb to 16bpp upscaled fb to stress CD clock programming",
@@ -129,6 +321,38 @@ const struct {
 		0.5,
 		1.0,
 	},
+	{
+		"flip-64bpp-yftile-to-16bpp-yftile-upscaling",
+		"Flip from 64bpp non scaled fb to 16bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_RGB565,
+		0.5,
+		1.0,
+	},
+	{
+		"flip-64bpp-xtile-to-16bpp-xtile-upscaling",
+		"Flip from 64bpp non scaled fb to 16bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_X_TILED, DRM_FORMAT_RGB565,
+		0.5,
+		1.0,
+	},
+	{
+		"flip-64bpp-4tile-to-16bpp-4tile-upscaling",
+		"Flip from 64bpp non scaled fb to 16bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_RGB565,
+		0.5,
+		1.0,
+	},
+	{
+		"flip-64bpp-linear-to-16bpp-linear-upscaling",
+		"Flip from 64bpp non scaled fb to 16bpp upscaled fb to stress CD clock programming",
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_XRGB16161616F,
+		DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_RGB565,
+		0.5,
+		1.0,
+	},
 	{
 		"flip-32bpp-ytileccs-to-64bpp-ytile-upscaling",
 		"Flip from 32bpp non scaled fb to 64bpp upscaled fb to stress CD clock programming",
@@ -137,6 +361,14 @@ const struct {
 		0.5,
 		1.0,
 	},
+	{
+		"flip-32bpp-yftileccs-to-64bpp-yftile-upscaling",
+		"Flip from 32bpp non scaled fb to 64bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_Yf_TILED_CCS, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB16161616F,
+		0.5,
+		1.0,
+	},
 	{
 		"flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling",
 		"Flip from 32bpp non scaled fb to 32bpp upscaled fb to stress CD clock programming",
@@ -145,6 +377,14 @@ const struct {
 		0.5,
 		1.0,
 	},
+	{
+		"flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling",
+		"Flip from 32bpp non scaled fb to 32bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_4_TILED_DG2_RC_CCS, DRM_FORMAT_XRGB8888,
+		0.5,
+		1.0,
+	},
 	{
 		"flip-32bpp-ytile-to-32bpp-ytileccs-upscaling",
 		"Flip from 32bpp non scaled fb to 32bpp upscaled fb to stress CD clock programming",
@@ -154,13 +394,29 @@ const struct {
 		1.0,
 	},
 	{
-		"flip-64bpp-ytile-to-32bpp-ytilercccs-upscaling",
+		"flip-32bpp-yftile-to-32bpp-yftileccs-upscaling",
+		"Flip from 32bpp non scaled fb to 32bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_Yf_TILED, DRM_FORMAT_XRGB8888,
+		I915_FORMAT_MOD_Yf_TILED_CCS, DRM_FORMAT_XRGB8888,
+		0.5,
+		1.0,
+	},
+	{
+		"flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling",
 		"Flip from 64bpp non scaled fb to 32bpp upscaled fb to stress CD clock programming",
 		I915_FORMAT_MOD_Y_TILED, DRM_FORMAT_XRGB16161616F,
 		I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS, DRM_FORMAT_XRGB8888,
 		0.5,
 		1.0,
 	},
+	{
+		"flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling",
+		"Flip from 64bpp non scaled fb to 32bpp upscaled fb to stress CD clock programming",
+		I915_FORMAT_MOD_4_TILED, DRM_FORMAT_XRGB16161616F,
+		I915_FORMAT_MOD_4_TILED_DG2_RC_CCS, DRM_FORMAT_XRGB8888,
+		0.5,
+		1.0,
+	},
 };
 
 static void setup_fb(data_t *data, struct igt_fb *newfb, uint32_t width,
-- 
2.25.1

  parent reply	other threads:[~2022-06-28 18:50 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-28 18:51 [igt-dev] [v6 PATCH i-g-t 0/4] tests/i915/kms_flip_scaled_crc: New tests Swati Sharma
2022-06-28 18:51 ` [igt-dev] [v5 PATCH i-g-t 1/4] tests/i915/kms_flip_scaled_crc: Convert tests to dynamic Swati Sharma
2022-06-28 18:51 ` Swati Sharma [this message]
2022-06-28 18:51 ` [igt-dev] [v2 PATCH i-g-t 3/4] lib/igt_kms: Add scaling filter property Swati Sharma
2022-06-29 12:36   ` Juha-Pekka Heikkila
2022-06-28 18:51 ` [igt-dev] [v5 PATCH i-g-t 4/4] tests/kms_flip_scaled_crc: Validate NN scaling filter Swati Sharma
2022-06-29 12:37   ` Juha-Pekka Heikkila
2022-06-28 20:04 ` [igt-dev] ✗ Fi.CI.BUILD: failure for tests/i915/kms_flip_scaled_crc: New tests (rev10) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2022-06-27 18:41 [igt-dev] [v5 PATCH i-g-t 0/4] tests/i915/kms_flip_scaled_crc: New tests Swati Sharma
2022-06-27 18:41 ` [igt-dev] [v2 PATCH i-g-t 2/4] tests/i915/kms_flip_scaled_crc: Add new tests covering modifiers and pixel-formats Swati Sharma

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220628185128.19692-3-swati2.sharma@intel.com \
    --to=swati2.sharma@intel.com \
    --cc=igt-dev@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.