From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 37BB4C433EF for ; Thu, 7 Jul 2022 16:12:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2CEC511B1F4; Thu, 7 Jul 2022 16:11:59 +0000 (UTC) Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by gabe.freedesktop.org (Postfix) with ESMTPS id B4C9211B1F4; Thu, 7 Jul 2022 16:11:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1657210318; x=1688746318; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=Qgry4ruyTQ3cr6aDgMN4Adk0Rw6bWhgUBj7xtKHRZQ8=; b=UlK96L142OfzGtwoyLytb/GUu5qUHiNyNNHCsu5hgHFYK57JuMwRCEdI OYsUiKcBViF7evN4oyGn1xFEtcTDVVcYuvpTHXpz1KxhbBeTdan3X+xwf /oP4YIc4MgoaJqzzPy7Gtf1abhHG4R2MuMukyBB403f0vQuYLgs2Id/eq A=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 07 Jul 2022 09:11:57 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2022 09:11:56 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 7 Jul 2022 09:11:56 -0700 Received: from hyd-lnxbld559.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 7 Jul 2022 09:11:51 -0700 From: Akhil P Oommen To: freedreno , , , Rob Clark , Bjorn Andersson Subject: [PATCH 5/7] arm64: dts: qcom: sc7280: Update gpu register list Date: Thu, 7 Jul 2022 21:41:00 +0530 Message-ID: <20220707213950.5.I7291c830ace04fce07e6bd95a11de4ba91410f7b@changeid> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1657210262-17166-1-git-send-email-quic_akhilpo@quicinc.com> References: <1657210262-17166-1-git-send-email-quic_akhilpo@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Jonathan Marek , Akhil P Oommen , linux-kernel@vger.kernel.org, Douglas Anderson , Rob Herring , Jordan Crouse , Andy Gross , Krzysztof Kozlowski , Matthias Kaehlcke Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Update gpu register array with gpucc memory region. Signed-off-by: Akhil P Oommen --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index e66fc67..defdb25 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2228,10 +2228,12 @@ compatible = "qcom,adreno-635.0", "qcom,adreno"; reg = <0 0x03d00000 0 0x40000>, <0 0x03d9e000 0 0x1000>, - <0 0x03d61000 0 0x800>; + <0 0x03d61000 0 0x800>, + <0 0x03d90000 0 0x2000>; reg-names = "kgsl_3d0_reg_memory", "cx_mem", - "cx_dbgc"; + "cx_dbgc", + "gpucc"; interrupts = ; iommus = <&adreno_smmu 0 0x401>; operating-points-v2 = <&gpu_opp_table>; -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFA8CCCA479 for ; Thu, 7 Jul 2022 16:12:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236213AbiGGQM5 (ORCPT ); Thu, 7 Jul 2022 12:12:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236244AbiGGQMf (ORCPT ); Thu, 7 Jul 2022 12:12:35 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 91E0059255; Thu, 7 Jul 2022 09:11:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1657210318; x=1688746318; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=Qgry4ruyTQ3cr6aDgMN4Adk0Rw6bWhgUBj7xtKHRZQ8=; b=UlK96L142OfzGtwoyLytb/GUu5qUHiNyNNHCsu5hgHFYK57JuMwRCEdI OYsUiKcBViF7evN4oyGn1xFEtcTDVVcYuvpTHXpz1KxhbBeTdan3X+xwf /oP4YIc4MgoaJqzzPy7Gtf1abhHG4R2MuMukyBB403f0vQuYLgs2Id/eq A=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 07 Jul 2022 09:11:57 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2022 09:11:56 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 7 Jul 2022 09:11:56 -0700 Received: from hyd-lnxbld559.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 7 Jul 2022 09:11:51 -0700 From: Akhil P Oommen To: freedreno , , , Rob Clark , Bjorn Andersson CC: Jordan Crouse , Douglas Anderson , Matthias Kaehlcke , Jonathan Marek , Akhil P Oommen , Andy Gross , Krzysztof Kozlowski , Rob Herring , , Subject: [PATCH 5/7] arm64: dts: qcom: sc7280: Update gpu register list Date: Thu, 7 Jul 2022 21:41:00 +0530 Message-ID: <20220707213950.5.I7291c830ace04fce07e6bd95a11de4ba91410f7b@changeid> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1657210262-17166-1-git-send-email-quic_akhilpo@quicinc.com> References: <1657210262-17166-1-git-send-email-quic_akhilpo@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Update gpu register array with gpucc memory region. Signed-off-by: Akhil P Oommen --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index e66fc67..defdb25 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2228,10 +2228,12 @@ compatible = "qcom,adreno-635.0", "qcom,adreno"; reg = <0 0x03d00000 0 0x40000>, <0 0x03d9e000 0 0x1000>, - <0 0x03d61000 0 0x800>; + <0 0x03d61000 0 0x800>, + <0 0x03d90000 0 0x2000>; reg-names = "kgsl_3d0_reg_memory", "cx_mem", - "cx_dbgc"; + "cx_dbgc", + "gpucc"; interrupts = ; iommus = <&adreno_smmu 0 0x401>; operating-points-v2 = <&gpu_opp_table>; -- 2.7.4