* [PATCH 1/2] dt-bindings: i2c: update bindings for MT8188 SoC
@ 2022-07-08 3:15 ` kewei.xu
0 siblings, 0 replies; 12+ messages in thread
From: kewei.xu @ 2022-07-08 3:15 UTC (permalink / raw)
To: wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, leilk.liu, qii.wang, liguo.zhang,
caiyu.chen, housong.zhang, yuhan.wei, kewei.xu, david-yh.chiu,
liju-clr.chen
From: Kewei Xu <kewei.xu@mediatek.com>
Add a DT binding documentation for the MT8188 soc.
Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
Change-Id: Iae781c7c68becbf3c5dea3511acb18cdd40d5c08
---
Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml
index 16a1a3118204..4e730fb7be56 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml
@@ -27,6 +27,7 @@ properties:
- const: mediatek,mt8173-i2c
- const: mediatek,mt8183-i2c
- const: mediatek,mt8186-i2c
+ - const: mediatek,mt8188-i2c
- const: mediatek,mt8192-i2c
- items:
- enum:
--
2.18.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 1/2] dt-bindings: i2c: update bindings for MT8188 SoC
@ 2022-07-08 3:15 ` kewei.xu
0 siblings, 0 replies; 12+ messages in thread
From: kewei.xu @ 2022-07-08 3:15 UTC (permalink / raw)
To: wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, leilk.liu, qii.wang, liguo.zhang,
caiyu.chen, housong.zhang, yuhan.wei, kewei.xu, david-yh.chiu,
liju-clr.chen
From: Kewei Xu <kewei.xu@mediatek.com>
Add a DT binding documentation for the MT8188 soc.
Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
Change-Id: Iae781c7c68becbf3c5dea3511acb18cdd40d5c08
---
Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml
index 16a1a3118204..4e730fb7be56 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml
@@ -27,6 +27,7 @@ properties:
- const: mediatek,mt8173-i2c
- const: mediatek,mt8183-i2c
- const: mediatek,mt8186-i2c
+ - const: mediatek,mt8188-i2c
- const: mediatek,mt8192-i2c
- items:
- enum:
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188
2022-07-08 3:15 ` kewei.xu
@ 2022-07-08 3:15 ` kewei.xu
-1 siblings, 0 replies; 12+ messages in thread
From: kewei.xu @ 2022-07-08 3:15 UTC (permalink / raw)
To: wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, leilk.liu, qii.wang, liguo.zhang,
caiyu.chen, housong.zhang, yuhan.wei, kewei.xu, david-yh.chiu,
liju-clr.chen
From: Kewei Xu <kewei.xu@mediatek.com>
Add i2c compatible for MT8188. Compare to MT8192 i2c controller,
The MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to 0x94.
Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
Change-Id: Ibcfa101061f058508eb1ae2cc07af5a3e7e3bf4f
---
drivers/i2c/busses/i2c-mt65xx.c | 43 +++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 8e6985354fd5..70aff42adf5d 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -229,6 +229,35 @@ static const u16 mt_i2c_regs_v2[] = {
[OFFSET_DCM_EN] = 0xf88,
};
+static const u16 mt_i2c_regs_v3[] = {
+ [OFFSET_DATA_PORT] = 0x0,
+ [OFFSET_SLAVE_ADDR] = 0x94,
+ [OFFSET_INTR_MASK] = 0x8,
+ [OFFSET_INTR_STAT] = 0xc,
+ [OFFSET_CONTROL] = 0x10,
+ [OFFSET_TRANSFER_LEN] = 0x14,
+ [OFFSET_TRANSAC_LEN] = 0x18,
+ [OFFSET_DELAY_LEN] = 0x1c,
+ [OFFSET_TIMING] = 0x20,
+ [OFFSET_START] = 0x24,
+ [OFFSET_EXT_CONF] = 0x28,
+ [OFFSET_LTIMING] = 0x2c,
+ [OFFSET_HS] = 0x30,
+ [OFFSET_IO_CONFIG] = 0x34,
+ [OFFSET_FIFO_ADDR_CLR] = 0x38,
+ [OFFSET_SDA_TIMING] = 0x3c,
+ [OFFSET_TRANSFER_LEN_AUX] = 0x44,
+ [OFFSET_CLOCK_DIV] = 0x48,
+ [OFFSET_SOFTRESET] = 0x50,
+ [OFFSET_MULTI_DMA] = 0x8c,
+ [OFFSET_SCL_MIS_COMP_POINT] = 0x90,
+ [OFFSET_DEBUGSTAT] = 0xe4,
+ [OFFSET_DEBUGCTRL] = 0xe8,
+ [OFFSET_FIFO_STAT] = 0xf4,
+ [OFFSET_FIFO_THRESH] = 0xf8,
+ [OFFSET_DCM_EN] = 0xf88,
+};
+
struct mtk_i2c_compatible {
const struct i2c_adapter_quirks *quirks;
const u16 *regs;
@@ -442,6 +471,19 @@ static const struct mtk_i2c_compatible mt8186_compat = {
.max_dma_support = 36,
};
+static const struct mtk_i2c_compatible mt8188_compat = {
+ .regs = mt_i2c_regs_v3,
+ .pmic_i2c = 0,
+ .dcm = 0,
+ .auto_restart = 1,
+ .aux_len_reg = 1,
+ .timing_adjust = 1,
+ .dma_sync = 0,
+ .ltiming_adjust = 1,
+ .apdma_sync = 1,
+ .max_dma_support = 36,
+};
+
static const struct mtk_i2c_compatible mt8192_compat = {
.quirks = &mt8183_i2c_quirks,
.regs = mt_i2c_regs_v2,
@@ -465,6 +507,7 @@ static const struct of_device_id mtk_i2c_of_match[] = {
{ .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
{ .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
{ .compatible = "mediatek,mt8186-i2c", .data = &mt8186_compat },
+ { .compatible = "mediatek,mt8188-i2c", .data = &mt8188_compat },
{ .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat },
{}
};
--
2.18.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188
@ 2022-07-08 3:15 ` kewei.xu
0 siblings, 0 replies; 12+ messages in thread
From: kewei.xu @ 2022-07-08 3:15 UTC (permalink / raw)
To: wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, leilk.liu, qii.wang, liguo.zhang,
caiyu.chen, housong.zhang, yuhan.wei, kewei.xu, david-yh.chiu,
liju-clr.chen
From: Kewei Xu <kewei.xu@mediatek.com>
Add i2c compatible for MT8188. Compare to MT8192 i2c controller,
The MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to 0x94.
Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
Change-Id: Ibcfa101061f058508eb1ae2cc07af5a3e7e3bf4f
---
drivers/i2c/busses/i2c-mt65xx.c | 43 +++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 8e6985354fd5..70aff42adf5d 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -229,6 +229,35 @@ static const u16 mt_i2c_regs_v2[] = {
[OFFSET_DCM_EN] = 0xf88,
};
+static const u16 mt_i2c_regs_v3[] = {
+ [OFFSET_DATA_PORT] = 0x0,
+ [OFFSET_SLAVE_ADDR] = 0x94,
+ [OFFSET_INTR_MASK] = 0x8,
+ [OFFSET_INTR_STAT] = 0xc,
+ [OFFSET_CONTROL] = 0x10,
+ [OFFSET_TRANSFER_LEN] = 0x14,
+ [OFFSET_TRANSAC_LEN] = 0x18,
+ [OFFSET_DELAY_LEN] = 0x1c,
+ [OFFSET_TIMING] = 0x20,
+ [OFFSET_START] = 0x24,
+ [OFFSET_EXT_CONF] = 0x28,
+ [OFFSET_LTIMING] = 0x2c,
+ [OFFSET_HS] = 0x30,
+ [OFFSET_IO_CONFIG] = 0x34,
+ [OFFSET_FIFO_ADDR_CLR] = 0x38,
+ [OFFSET_SDA_TIMING] = 0x3c,
+ [OFFSET_TRANSFER_LEN_AUX] = 0x44,
+ [OFFSET_CLOCK_DIV] = 0x48,
+ [OFFSET_SOFTRESET] = 0x50,
+ [OFFSET_MULTI_DMA] = 0x8c,
+ [OFFSET_SCL_MIS_COMP_POINT] = 0x90,
+ [OFFSET_DEBUGSTAT] = 0xe4,
+ [OFFSET_DEBUGCTRL] = 0xe8,
+ [OFFSET_FIFO_STAT] = 0xf4,
+ [OFFSET_FIFO_THRESH] = 0xf8,
+ [OFFSET_DCM_EN] = 0xf88,
+};
+
struct mtk_i2c_compatible {
const struct i2c_adapter_quirks *quirks;
const u16 *regs;
@@ -442,6 +471,19 @@ static const struct mtk_i2c_compatible mt8186_compat = {
.max_dma_support = 36,
};
+static const struct mtk_i2c_compatible mt8188_compat = {
+ .regs = mt_i2c_regs_v3,
+ .pmic_i2c = 0,
+ .dcm = 0,
+ .auto_restart = 1,
+ .aux_len_reg = 1,
+ .timing_adjust = 1,
+ .dma_sync = 0,
+ .ltiming_adjust = 1,
+ .apdma_sync = 1,
+ .max_dma_support = 36,
+};
+
static const struct mtk_i2c_compatible mt8192_compat = {
.quirks = &mt8183_i2c_quirks,
.regs = mt_i2c_regs_v2,
@@ -465,6 +507,7 @@ static const struct of_device_id mtk_i2c_of_match[] = {
{ .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
{ .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
{ .compatible = "mediatek,mt8186-i2c", .data = &mt8186_compat },
+ { .compatible = "mediatek,mt8188-i2c", .data = &mt8188_compat },
{ .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat },
{}
};
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188
2022-07-08 2:18 [PATCH V2 0/2] add i2c support for mt8188 Kewei Xu
@ 2022-07-08 2:18 ` Kewei Xu
0 siblings, 0 replies; 12+ messages in thread
From: Kewei Xu @ 2022-07-08 2:18 UTC (permalink / raw)
To: wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, srv_heupstream, leilk.liu,
qii.wang, liguo.zhang, caiyu.chen, housong.zhang, yuhan.wei,
kewei.xu, david-yh.chiu, liju-clr.chen
Add i2c compatible for MT8188. Compare to MT8192 i2c controller,
The MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to 0x94.
Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 43 +++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 8e6985354fd5..70aff42adf5d 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -229,6 +229,35 @@ static const u16 mt_i2c_regs_v2[] = {
[OFFSET_DCM_EN] = 0xf88,
};
+static const u16 mt_i2c_regs_v3[] = {
+ [OFFSET_DATA_PORT] = 0x0,
+ [OFFSET_SLAVE_ADDR] = 0x94,
+ [OFFSET_INTR_MASK] = 0x8,
+ [OFFSET_INTR_STAT] = 0xc,
+ [OFFSET_CONTROL] = 0x10,
+ [OFFSET_TRANSFER_LEN] = 0x14,
+ [OFFSET_TRANSAC_LEN] = 0x18,
+ [OFFSET_DELAY_LEN] = 0x1c,
+ [OFFSET_TIMING] = 0x20,
+ [OFFSET_START] = 0x24,
+ [OFFSET_EXT_CONF] = 0x28,
+ [OFFSET_LTIMING] = 0x2c,
+ [OFFSET_HS] = 0x30,
+ [OFFSET_IO_CONFIG] = 0x34,
+ [OFFSET_FIFO_ADDR_CLR] = 0x38,
+ [OFFSET_SDA_TIMING] = 0x3c,
+ [OFFSET_TRANSFER_LEN_AUX] = 0x44,
+ [OFFSET_CLOCK_DIV] = 0x48,
+ [OFFSET_SOFTRESET] = 0x50,
+ [OFFSET_MULTI_DMA] = 0x8c,
+ [OFFSET_SCL_MIS_COMP_POINT] = 0x90,
+ [OFFSET_DEBUGSTAT] = 0xe4,
+ [OFFSET_DEBUGCTRL] = 0xe8,
+ [OFFSET_FIFO_STAT] = 0xf4,
+ [OFFSET_FIFO_THRESH] = 0xf8,
+ [OFFSET_DCM_EN] = 0xf88,
+};
+
struct mtk_i2c_compatible {
const struct i2c_adapter_quirks *quirks;
const u16 *regs;
@@ -442,6 +471,19 @@ static const struct mtk_i2c_compatible mt8186_compat = {
.max_dma_support = 36,
};
+static const struct mtk_i2c_compatible mt8188_compat = {
+ .regs = mt_i2c_regs_v3,
+ .pmic_i2c = 0,
+ .dcm = 0,
+ .auto_restart = 1,
+ .aux_len_reg = 1,
+ .timing_adjust = 1,
+ .dma_sync = 0,
+ .ltiming_adjust = 1,
+ .apdma_sync = 1,
+ .max_dma_support = 36,
+};
+
static const struct mtk_i2c_compatible mt8192_compat = {
.quirks = &mt8183_i2c_quirks,
.regs = mt_i2c_regs_v2,
@@ -465,6 +507,7 @@ static const struct of_device_id mtk_i2c_of_match[] = {
{ .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
{ .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
{ .compatible = "mediatek,mt8186-i2c", .data = &mt8186_compat },
+ { .compatible = "mediatek,mt8188-i2c", .data = &mt8188_compat },
{ .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat },
{}
};
--
2.18.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188
@ 2022-07-08 2:18 ` Kewei Xu
0 siblings, 0 replies; 12+ messages in thread
From: Kewei Xu @ 2022-07-08 2:18 UTC (permalink / raw)
To: wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, srv_heupstream, leilk.liu,
qii.wang, liguo.zhang, caiyu.chen, housong.zhang, yuhan.wei,
kewei.xu, david-yh.chiu, liju-clr.chen
Add i2c compatible for MT8188. Compare to MT8192 i2c controller,
The MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to 0x94.
Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 43 +++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 8e6985354fd5..70aff42adf5d 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -229,6 +229,35 @@ static const u16 mt_i2c_regs_v2[] = {
[OFFSET_DCM_EN] = 0xf88,
};
+static const u16 mt_i2c_regs_v3[] = {
+ [OFFSET_DATA_PORT] = 0x0,
+ [OFFSET_SLAVE_ADDR] = 0x94,
+ [OFFSET_INTR_MASK] = 0x8,
+ [OFFSET_INTR_STAT] = 0xc,
+ [OFFSET_CONTROL] = 0x10,
+ [OFFSET_TRANSFER_LEN] = 0x14,
+ [OFFSET_TRANSAC_LEN] = 0x18,
+ [OFFSET_DELAY_LEN] = 0x1c,
+ [OFFSET_TIMING] = 0x20,
+ [OFFSET_START] = 0x24,
+ [OFFSET_EXT_CONF] = 0x28,
+ [OFFSET_LTIMING] = 0x2c,
+ [OFFSET_HS] = 0x30,
+ [OFFSET_IO_CONFIG] = 0x34,
+ [OFFSET_FIFO_ADDR_CLR] = 0x38,
+ [OFFSET_SDA_TIMING] = 0x3c,
+ [OFFSET_TRANSFER_LEN_AUX] = 0x44,
+ [OFFSET_CLOCK_DIV] = 0x48,
+ [OFFSET_SOFTRESET] = 0x50,
+ [OFFSET_MULTI_DMA] = 0x8c,
+ [OFFSET_SCL_MIS_COMP_POINT] = 0x90,
+ [OFFSET_DEBUGSTAT] = 0xe4,
+ [OFFSET_DEBUGCTRL] = 0xe8,
+ [OFFSET_FIFO_STAT] = 0xf4,
+ [OFFSET_FIFO_THRESH] = 0xf8,
+ [OFFSET_DCM_EN] = 0xf88,
+};
+
struct mtk_i2c_compatible {
const struct i2c_adapter_quirks *quirks;
const u16 *regs;
@@ -442,6 +471,19 @@ static const struct mtk_i2c_compatible mt8186_compat = {
.max_dma_support = 36,
};
+static const struct mtk_i2c_compatible mt8188_compat = {
+ .regs = mt_i2c_regs_v3,
+ .pmic_i2c = 0,
+ .dcm = 0,
+ .auto_restart = 1,
+ .aux_len_reg = 1,
+ .timing_adjust = 1,
+ .dma_sync = 0,
+ .ltiming_adjust = 1,
+ .apdma_sync = 1,
+ .max_dma_support = 36,
+};
+
static const struct mtk_i2c_compatible mt8192_compat = {
.quirks = &mt8183_i2c_quirks,
.regs = mt_i2c_regs_v2,
@@ -465,6 +507,7 @@ static const struct of_device_id mtk_i2c_of_match[] = {
{ .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
{ .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
{ .compatible = "mediatek,mt8186-i2c", .data = &mt8186_compat },
+ { .compatible = "mediatek,mt8188-i2c", .data = &mt8188_compat },
{ .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat },
{}
};
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188
2022-07-07 8:43 ` AngeloGioacchino Del Regno
@ 2022-07-08 1:24 ` Kewei Xu
-1 siblings, 0 replies; 12+ messages in thread
From: Kewei Xu @ 2022-07-08 1:24 UTC (permalink / raw)
To: AngeloGioacchino Del Regno, wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, srv_heupstream, leilk.liu,
qii.wang, liguo.zhang, caiyu.chen, housong.zhang, yuhan.wei,
david-yh.chiu, liju-clr.chen
On Thu, 2022-07-07 at 10:43 +0200, AngeloGioacchino Del Regno wrote:
> Il 07/07/22 07:46, Kewei Xu ha scritto:
> > Add i2c compatible for MT8188. Compare to MT8192 i2c controller,
> > The MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to
> > 0x94.
> >
> > Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
> > ---
> > drivers/i2c/busses/i2c-mt65xx.c | 41
> > +++++++++++++++++++++++++++++++--
> > 1 file changed, 39 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-mt65xx.c
> > b/drivers/i2c/busses/i2c-mt65xx.c
> > index 8e6985354fd5..aa2e1cb87420 100644
> > --- a/drivers/i2c/busses/i2c-mt65xx.c
> > +++ b/drivers/i2c/busses/i2c-mt65xx.c
> > @@ -135,6 +135,7 @@ enum mtk_trans_op {
> > enum I2C_REGS_OFFSET {
> > OFFSET_DATA_PORT,
> > OFFSET_SLAVE_ADDR,
> > + OFFSET_SLAVE_ADDR1,
> > OFFSET_INTR_MASK,
> > OFFSET_INTR_STAT,
> > OFFSET_CONTROL,
> > @@ -203,6 +204,7 @@ static const u16 mt_i2c_regs_v1[] = {
> > static const u16 mt_i2c_regs_v2[] = {
> > [OFFSET_DATA_PORT] = 0x0,
> > [OFFSET_SLAVE_ADDR] = 0x4,
> > + [OFFSET_SLAVE_ADDR1] = 0x94,
>
> Instead of adding a "slave addr version" entry... you can as well
> just define
> a new array here with an appropriate name.
>
> static const u16 mt_i2c_regs_v3[] = {
>
> .......
>
> }
>
> This way, you don't have to change all of the platform data entries
> and you
> also won't have to add checks in the do_transfer function, as that's
> one of
> the actual points of having these arrays of register offsets in here.
>
> Regards,
> Angelo
>
Hi Angelo,
Thank you very much for your suggestion, I will update the patch as
soon as possible.
Regards,
Kewei
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188
@ 2022-07-08 1:24 ` Kewei Xu
0 siblings, 0 replies; 12+ messages in thread
From: Kewei Xu @ 2022-07-08 1:24 UTC (permalink / raw)
To: AngeloGioacchino Del Regno, wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, srv_heupstream, leilk.liu,
qii.wang, liguo.zhang, caiyu.chen, housong.zhang, yuhan.wei,
david-yh.chiu, liju-clr.chen
On Thu, 2022-07-07 at 10:43 +0200, AngeloGioacchino Del Regno wrote:
> Il 07/07/22 07:46, Kewei Xu ha scritto:
> > Add i2c compatible for MT8188. Compare to MT8192 i2c controller,
> > The MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to
> > 0x94.
> >
> > Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
> > ---
> > drivers/i2c/busses/i2c-mt65xx.c | 41
> > +++++++++++++++++++++++++++++++--
> > 1 file changed, 39 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-mt65xx.c
> > b/drivers/i2c/busses/i2c-mt65xx.c
> > index 8e6985354fd5..aa2e1cb87420 100644
> > --- a/drivers/i2c/busses/i2c-mt65xx.c
> > +++ b/drivers/i2c/busses/i2c-mt65xx.c
> > @@ -135,6 +135,7 @@ enum mtk_trans_op {
> > enum I2C_REGS_OFFSET {
> > OFFSET_DATA_PORT,
> > OFFSET_SLAVE_ADDR,
> > + OFFSET_SLAVE_ADDR1,
> > OFFSET_INTR_MASK,
> > OFFSET_INTR_STAT,
> > OFFSET_CONTROL,
> > @@ -203,6 +204,7 @@ static const u16 mt_i2c_regs_v1[] = {
> > static const u16 mt_i2c_regs_v2[] = {
> > [OFFSET_DATA_PORT] = 0x0,
> > [OFFSET_SLAVE_ADDR] = 0x4,
> > + [OFFSET_SLAVE_ADDR1] = 0x94,
>
> Instead of adding a "slave addr version" entry... you can as well
> just define
> a new array here with an appropriate name.
>
> static const u16 mt_i2c_regs_v3[] = {
>
> .......
>
> }
>
> This way, you don't have to change all of the platform data entries
> and you
> also won't have to add checks in the do_transfer function, as that's
> one of
> the actual points of having these arrays of register offsets in here.
>
> Regards,
> Angelo
>
Hi Angelo,
Thank you very much for your suggestion, I will update the patch as
soon as possible.
Regards,
Kewei
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188
2022-07-07 5:46 ` Kewei Xu
@ 2022-07-07 8:43 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 12+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-07 8:43 UTC (permalink / raw)
To: Kewei Xu, wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, srv_heupstream, leilk.liu,
qii.wang, liguo.zhang, caiyu.chen, housong.zhang, yuhan.wei,
david-yh.chiu, liju-clr.chen
Il 07/07/22 07:46, Kewei Xu ha scritto:
> Add i2c compatible for MT8188. Compare to MT8192 i2c controller,
> The MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to 0x94.
>
> Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
> ---
> drivers/i2c/busses/i2c-mt65xx.c | 41 +++++++++++++++++++++++++++++++--
> 1 file changed, 39 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
> index 8e6985354fd5..aa2e1cb87420 100644
> --- a/drivers/i2c/busses/i2c-mt65xx.c
> +++ b/drivers/i2c/busses/i2c-mt65xx.c
> @@ -135,6 +135,7 @@ enum mtk_trans_op {
> enum I2C_REGS_OFFSET {
> OFFSET_DATA_PORT,
> OFFSET_SLAVE_ADDR,
> + OFFSET_SLAVE_ADDR1,
> OFFSET_INTR_MASK,
> OFFSET_INTR_STAT,
> OFFSET_CONTROL,
> @@ -203,6 +204,7 @@ static const u16 mt_i2c_regs_v1[] = {
> static const u16 mt_i2c_regs_v2[] = {
> [OFFSET_DATA_PORT] = 0x0,
> [OFFSET_SLAVE_ADDR] = 0x4,
> + [OFFSET_SLAVE_ADDR1] = 0x94,
Instead of adding a "slave addr version" entry... you can as well just define
a new array here with an appropriate name.
static const u16 mt_i2c_regs_v3[] = {
.......
}
This way, you don't have to change all of the platform data entries and you
also won't have to add checks in the do_transfer function, as that's one of
the actual points of having these arrays of register offsets in here.
Regards,
Angelo
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188
@ 2022-07-07 8:43 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 12+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-07 8:43 UTC (permalink / raw)
To: Kewei Xu, wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, srv_heupstream, leilk.liu,
qii.wang, liguo.zhang, caiyu.chen, housong.zhang, yuhan.wei,
david-yh.chiu, liju-clr.chen
Il 07/07/22 07:46, Kewei Xu ha scritto:
> Add i2c compatible for MT8188. Compare to MT8192 i2c controller,
> The MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to 0x94.
>
> Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
> ---
> drivers/i2c/busses/i2c-mt65xx.c | 41 +++++++++++++++++++++++++++++++--
> 1 file changed, 39 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
> index 8e6985354fd5..aa2e1cb87420 100644
> --- a/drivers/i2c/busses/i2c-mt65xx.c
> +++ b/drivers/i2c/busses/i2c-mt65xx.c
> @@ -135,6 +135,7 @@ enum mtk_trans_op {
> enum I2C_REGS_OFFSET {
> OFFSET_DATA_PORT,
> OFFSET_SLAVE_ADDR,
> + OFFSET_SLAVE_ADDR1,
> OFFSET_INTR_MASK,
> OFFSET_INTR_STAT,
> OFFSET_CONTROL,
> @@ -203,6 +204,7 @@ static const u16 mt_i2c_regs_v1[] = {
> static const u16 mt_i2c_regs_v2[] = {
> [OFFSET_DATA_PORT] = 0x0,
> [OFFSET_SLAVE_ADDR] = 0x4,
> + [OFFSET_SLAVE_ADDR1] = 0x94,
Instead of adding a "slave addr version" entry... you can as well just define
a new array here with an appropriate name.
static const u16 mt_i2c_regs_v3[] = {
.......
}
This way, you don't have to change all of the platform data entries and you
also won't have to add checks in the do_transfer function, as that's one of
the actual points of having these arrays of register offsets in here.
Regards,
Angelo
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188
2022-07-07 5:46 [PATCH V1 0/2] add i2c support for mt8188 Kewei Xu
@ 2022-07-07 5:46 ` Kewei Xu
0 siblings, 0 replies; 12+ messages in thread
From: Kewei Xu @ 2022-07-07 5:46 UTC (permalink / raw)
To: wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, srv_heupstream, leilk.liu,
qii.wang, liguo.zhang, caiyu.chen, housong.zhang, yuhan.wei,
kewei.xu, david-yh.chiu, liju-clr.chen
Add i2c compatible for MT8188. Compare to MT8192 i2c controller,
The MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to 0x94.
Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 41 +++++++++++++++++++++++++++++++--
1 file changed, 39 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 8e6985354fd5..aa2e1cb87420 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -135,6 +135,7 @@ enum mtk_trans_op {
enum I2C_REGS_OFFSET {
OFFSET_DATA_PORT,
OFFSET_SLAVE_ADDR,
+ OFFSET_SLAVE_ADDR1,
OFFSET_INTR_MASK,
OFFSET_INTR_STAT,
OFFSET_CONTROL,
@@ -203,6 +204,7 @@ static const u16 mt_i2c_regs_v1[] = {
static const u16 mt_i2c_regs_v2[] = {
[OFFSET_DATA_PORT] = 0x0,
[OFFSET_SLAVE_ADDR] = 0x4,
+ [OFFSET_SLAVE_ADDR1] = 0x94,
[OFFSET_INTR_MASK] = 0x8,
[OFFSET_INTR_STAT] = 0xc,
[OFFSET_CONTROL] = 0x10,
@@ -241,6 +243,7 @@ struct mtk_i2c_compatible {
unsigned char ltiming_adjust: 1;
unsigned char apdma_sync: 1;
unsigned char max_dma_support;
+ unsigned char slave_addr_ver;
};
struct mtk_i2c_ac_timing {
@@ -345,6 +348,7 @@ static const struct mtk_i2c_compatible mt2712_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 33,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt6577_compat = {
@@ -359,6 +363,7 @@ static const struct mtk_i2c_compatible mt6577_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 32,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt6589_compat = {
@@ -373,6 +378,7 @@ static const struct mtk_i2c_compatible mt6589_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 32,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt7622_compat = {
@@ -387,6 +393,7 @@ static const struct mtk_i2c_compatible mt7622_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 32,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt8168_compat = {
@@ -400,6 +407,7 @@ static const struct mtk_i2c_compatible mt8168_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 33,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt8173_compat = {
@@ -413,6 +421,7 @@ static const struct mtk_i2c_compatible mt8173_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 33,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt8183_compat = {
@@ -427,6 +436,7 @@ static const struct mtk_i2c_compatible mt8183_compat = {
.ltiming_adjust = 1,
.apdma_sync = 0,
.max_dma_support = 33,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt8186_compat = {
@@ -440,6 +450,21 @@ static const struct mtk_i2c_compatible mt8186_compat = {
.ltiming_adjust = 1,
.apdma_sync = 0,
.max_dma_support = 36,
+ .slave_addr_ver = 0,
+};
+
+static const struct mtk_i2c_compatible mt8188_compat = {
+ .regs = mt_i2c_regs_v2,
+ .pmic_i2c = 0,
+ .dcm = 0,
+ .auto_restart = 1,
+ .aux_len_reg = 1,
+ .timing_adjust = 1,
+ .dma_sync = 0,
+ .ltiming_adjust = 1,
+ .apdma_sync = 1,
+ .max_dma_support = 36,
+ .slave_addr_ver = 1,
};
static const struct mtk_i2c_compatible mt8192_compat = {
@@ -454,6 +479,7 @@ static const struct mtk_i2c_compatible mt8192_compat = {
.ltiming_adjust = 1,
.apdma_sync = 1,
.max_dma_support = 36,
+ .slave_addr_ver = 0,
};
static const struct of_device_id mtk_i2c_of_match[] = {
@@ -465,6 +491,7 @@ static const struct of_device_id mtk_i2c_of_match[] = {
{ .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
{ .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
{ .compatible = "mediatek,mt8186-i2c", .data = &mt8186_compat },
+ { .compatible = "mediatek,mt8188-i2c", .data = &mt8188_compat },
{ .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat },
{}
};
@@ -877,8 +904,15 @@ static int mtk_i2c_set_speed(struct mtk_i2c *i2c, unsigned int parent_clk)
static void i2c_dump_register(struct mtk_i2c *i2c)
{
+ enum I2C_REGS_OFFSET sla_addr_offset;
+
+ if (i2c->dev_comp->slave_addr_ver == 1)
+ sla_addr_offset = OFFSET_SLAVE_ADDR1;
+ else
+ sla_addr_offset = OFFSET_SLAVE_ADDR;
+
dev_dbg(i2c->dev, "SLAVE_ADDR: 0x%x, INTR_MASK: 0x%x\n",
- mtk_i2c_readw(i2c, OFFSET_SLAVE_ADDR),
+ mtk_i2c_readw(i2c, sla_addr_offset),
mtk_i2c_readw(i2c, OFFSET_INTR_MASK));
dev_dbg(i2c->dev, "INTR_STAT: 0x%x, CONTROL: 0x%x\n",
mtk_i2c_readw(i2c, OFFSET_INTR_STAT),
@@ -982,7 +1016,10 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs,
mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL);
addr_reg = i2c_8bit_addr_from_msg(msgs);
- mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR);
+ if (i2c->dev_comp->slave_addr_ver == 1)
+ mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR1);
+ else
+ mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR);
/* Clear interrupt status */
mtk_i2c_writew(i2c, restart_flag | I2C_HS_NACKERR | I2C_ACKERR |
--
2.18.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188
@ 2022-07-07 5:46 ` Kewei Xu
0 siblings, 0 replies; 12+ messages in thread
From: Kewei Xu @ 2022-07-07 5:46 UTC (permalink / raw)
To: wsa
Cc: matthias.bgg, robh+dt, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek, srv_heupstream, leilk.liu,
qii.wang, liguo.zhang, caiyu.chen, housong.zhang, yuhan.wei,
kewei.xu, david-yh.chiu, liju-clr.chen
Add i2c compatible for MT8188. Compare to MT8192 i2c controller,
The MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to 0x94.
Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 41 +++++++++++++++++++++++++++++++--
1 file changed, 39 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 8e6985354fd5..aa2e1cb87420 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -135,6 +135,7 @@ enum mtk_trans_op {
enum I2C_REGS_OFFSET {
OFFSET_DATA_PORT,
OFFSET_SLAVE_ADDR,
+ OFFSET_SLAVE_ADDR1,
OFFSET_INTR_MASK,
OFFSET_INTR_STAT,
OFFSET_CONTROL,
@@ -203,6 +204,7 @@ static const u16 mt_i2c_regs_v1[] = {
static const u16 mt_i2c_regs_v2[] = {
[OFFSET_DATA_PORT] = 0x0,
[OFFSET_SLAVE_ADDR] = 0x4,
+ [OFFSET_SLAVE_ADDR1] = 0x94,
[OFFSET_INTR_MASK] = 0x8,
[OFFSET_INTR_STAT] = 0xc,
[OFFSET_CONTROL] = 0x10,
@@ -241,6 +243,7 @@ struct mtk_i2c_compatible {
unsigned char ltiming_adjust: 1;
unsigned char apdma_sync: 1;
unsigned char max_dma_support;
+ unsigned char slave_addr_ver;
};
struct mtk_i2c_ac_timing {
@@ -345,6 +348,7 @@ static const struct mtk_i2c_compatible mt2712_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 33,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt6577_compat = {
@@ -359,6 +363,7 @@ static const struct mtk_i2c_compatible mt6577_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 32,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt6589_compat = {
@@ -373,6 +378,7 @@ static const struct mtk_i2c_compatible mt6589_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 32,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt7622_compat = {
@@ -387,6 +393,7 @@ static const struct mtk_i2c_compatible mt7622_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 32,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt8168_compat = {
@@ -400,6 +407,7 @@ static const struct mtk_i2c_compatible mt8168_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 33,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt8173_compat = {
@@ -413,6 +421,7 @@ static const struct mtk_i2c_compatible mt8173_compat = {
.ltiming_adjust = 0,
.apdma_sync = 0,
.max_dma_support = 33,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt8183_compat = {
@@ -427,6 +436,7 @@ static const struct mtk_i2c_compatible mt8183_compat = {
.ltiming_adjust = 1,
.apdma_sync = 0,
.max_dma_support = 33,
+ .slave_addr_ver = 0,
};
static const struct mtk_i2c_compatible mt8186_compat = {
@@ -440,6 +450,21 @@ static const struct mtk_i2c_compatible mt8186_compat = {
.ltiming_adjust = 1,
.apdma_sync = 0,
.max_dma_support = 36,
+ .slave_addr_ver = 0,
+};
+
+static const struct mtk_i2c_compatible mt8188_compat = {
+ .regs = mt_i2c_regs_v2,
+ .pmic_i2c = 0,
+ .dcm = 0,
+ .auto_restart = 1,
+ .aux_len_reg = 1,
+ .timing_adjust = 1,
+ .dma_sync = 0,
+ .ltiming_adjust = 1,
+ .apdma_sync = 1,
+ .max_dma_support = 36,
+ .slave_addr_ver = 1,
};
static const struct mtk_i2c_compatible mt8192_compat = {
@@ -454,6 +479,7 @@ static const struct mtk_i2c_compatible mt8192_compat = {
.ltiming_adjust = 1,
.apdma_sync = 1,
.max_dma_support = 36,
+ .slave_addr_ver = 0,
};
static const struct of_device_id mtk_i2c_of_match[] = {
@@ -465,6 +491,7 @@ static const struct of_device_id mtk_i2c_of_match[] = {
{ .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
{ .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
{ .compatible = "mediatek,mt8186-i2c", .data = &mt8186_compat },
+ { .compatible = "mediatek,mt8188-i2c", .data = &mt8188_compat },
{ .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat },
{}
};
@@ -877,8 +904,15 @@ static int mtk_i2c_set_speed(struct mtk_i2c *i2c, unsigned int parent_clk)
static void i2c_dump_register(struct mtk_i2c *i2c)
{
+ enum I2C_REGS_OFFSET sla_addr_offset;
+
+ if (i2c->dev_comp->slave_addr_ver == 1)
+ sla_addr_offset = OFFSET_SLAVE_ADDR1;
+ else
+ sla_addr_offset = OFFSET_SLAVE_ADDR;
+
dev_dbg(i2c->dev, "SLAVE_ADDR: 0x%x, INTR_MASK: 0x%x\n",
- mtk_i2c_readw(i2c, OFFSET_SLAVE_ADDR),
+ mtk_i2c_readw(i2c, sla_addr_offset),
mtk_i2c_readw(i2c, OFFSET_INTR_MASK));
dev_dbg(i2c->dev, "INTR_STAT: 0x%x, CONTROL: 0x%x\n",
mtk_i2c_readw(i2c, OFFSET_INTR_STAT),
@@ -982,7 +1016,10 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs,
mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL);
addr_reg = i2c_8bit_addr_from_msg(msgs);
- mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR);
+ if (i2c->dev_comp->slave_addr_ver == 1)
+ mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR1);
+ else
+ mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR);
/* Clear interrupt status */
mtk_i2c_writew(i2c, restart_flag | I2C_HS_NACKERR | I2C_ACKERR |
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2022-07-08 3:57 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
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2022-07-08 3:15 ` kewei.xu
2022-07-08 3:15 ` [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188 kewei.xu
2022-07-08 3:15 ` kewei.xu
-- strict thread matches above, loose matches on Subject: below --
2022-07-08 2:18 [PATCH V2 0/2] add i2c support for mt8188 Kewei Xu
2022-07-08 2:18 ` [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188 Kewei Xu
2022-07-08 2:18 ` Kewei Xu
2022-07-07 5:46 [PATCH V1 0/2] add i2c support for mt8188 Kewei Xu
2022-07-07 5:46 ` [PATCH 2/2] i2c: mediatek: Add i2c compatible for Mediatek MT8188 Kewei Xu
2022-07-07 5:46 ` Kewei Xu
2022-07-07 8:43 ` AngeloGioacchino Del Regno
2022-07-07 8:43 ` AngeloGioacchino Del Regno
2022-07-08 1:24 ` Kewei Xu
2022-07-08 1:24 ` Kewei Xu
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