[PATCH v2 0/3] Add Versal compatible string to Macb driver

[PATCH v2 0/3] Add Versal compatible string to Macb driver

[Harini Katakam]

Add Versal device support.

v2:
- Sort compatible strings alphabetically in DT bindings.
- Reorganize new config and CAPS order to be cleaner. 

Harini Katakam (2):
  net: macb: Sort CAPS flags by bit positions
  net: macb: Update tsu clk usage in runtime suspend/resume for Versal

Radhey Shyam Pandey (1):
  dt-bindings: net: cdns,macb: Add versal compatible string

 .../devicetree/bindings/net/cdns,macb.yaml      |  1 +
 drivers/net/ethernet/cadence/macb.h             |  5 +++--
 drivers/net/ethernet/cadence/macb_main.c        | 17 +++++++++++++++--
 3 files changed, 19 insertions(+), 4 deletions(-)

-- 
2.17.1

[PATCH v2 1/3] dt-bindings: net: cdns,macb: Add versal compatible string

[Harini Katakam]

From: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>

Add versal compatible string.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
---
v2:
Sort compatible string alphabetically.

 Documentation/devicetree/bindings/net/cdns,macb.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
index 9c92156869b2..762deccd3640 100644
--- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
+++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
@@ -20,6 +20,7 @@ properties:
 
       - items:
           - enum:
+              - cdns,versal-gem       # Xilinx Versal
               - cdns,zynq-gem         # Xilinx Zynq-7xxx SoC
               - cdns,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC
           - const: cdns,gem           # Generic
-- 
2.17.1

[PATCH v2 2/3] net: macb: Sort CAPS flags by bit positions

[Harini Katakam]

Sort capability flags by the bit position set.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
---
v2:
New patch to sort existing CAPS flags' bit order.

 drivers/net/ethernet/cadence/macb.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 7ca077b65eaa..583e860fdca8 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -717,14 +717,14 @@
 #define MACB_CAPS_BD_RD_PREFETCH		0x00000080
 #define MACB_CAPS_NEEDS_RSTONUBR		0x00000100
 #define MACB_CAPS_MIIONRGMII			0x00000200
+#define MACB_CAPS_PCS				0x01000000
+#define MACB_CAPS_HIGH_SPEED			0x02000000
 #define MACB_CAPS_CLK_HW_CHG			0x04000000
 #define MACB_CAPS_MACB_IS_EMAC			0x08000000
 #define MACB_CAPS_FIFO_MODE			0x10000000
 #define MACB_CAPS_GIGABIT_MODE_AVAILABLE	0x20000000
 #define MACB_CAPS_SG_DISABLED			0x40000000
 #define MACB_CAPS_MACB_IS_GEM			0x80000000
-#define MACB_CAPS_PCS				0x01000000
-#define MACB_CAPS_HIGH_SPEED			0x02000000
 
 /* LSO settings */
 #define MACB_LSO_UFO_ENABLE			0x01
-- 
2.17.1

[PATCH v2 3/3] net: macb: Update tsu clk usage in runtime suspend/resume for Versal

[Harini Katakam]

On Versal TSU clock cannot be disabled irrespective of whether PTP is
used. Hence introduce a new Versal config structure with a "need tsu"
caps flag and check the same in runtime_suspend/resume before cutting
off clocks.

More information on this for future reference:
This is an IP limitation on versions 1p11 and 1p12 when Qbv is enabled
(See designcfg1, bit 3). However it is better to rely on an SoC specific
check rather than the IP version because tsu clk property itself may not
represent actual HW tsu clock on some chip designs.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
v2:
- Add TSUCLK CAPS flag in correct sorted postion and use 0x400 instead
as that is available.
- Move config structure to the end, aligning with order in macb_dt_ids.

 drivers/net/ethernet/cadence/macb.h      |  1 +
 drivers/net/ethernet/cadence/macb_main.c | 17 +++++++++++++++--
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 583e860fdca8..9c410f93a103 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -717,6 +717,7 @@
 #define MACB_CAPS_BD_RD_PREFETCH		0x00000080
 #define MACB_CAPS_NEEDS_RSTONUBR		0x00000100
 #define MACB_CAPS_MIIONRGMII			0x00000200
+#define MACB_CAPS_NEED_TSUCLK			0x00000400
 #define MACB_CAPS_PCS				0x01000000
 #define MACB_CAPS_HIGH_SPEED			0x02000000
 #define MACB_CAPS_CLK_HW_CHG			0x04000000
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index 7eb7822cd184..4cd4f57ca2aa 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4773,6 +4773,16 @@ static const struct macb_config sama7g5_emac_config = {
 	.usrio = &sama7g5_usrio,
 };
 
+static const struct macb_config versal_config = {
+	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |
+		MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH | MACB_CAPS_NEED_TSUCLK,
+	.dma_burst_length = 16,
+	.clk_init = macb_clk_init,
+	.init = init_reset_optional,
+	.jumbo_max_len = 10240,
+	.usrio = &macb_default_usrio,
+};
+
 static const struct of_device_id macb_dt_ids[] = {
 	{ .compatible = "cdns,at32ap7000-macb" },
 	{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
@@ -4794,6 +4804,7 @@ static const struct of_device_id macb_dt_ids[] = {
 	{ .compatible = "microchip,mpfs-macb", .data = &mpfs_config },
 	{ .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config },
 	{ .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config },
+	{ .compatible = "cdns,versal-gem", .data = &versal_config},
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, macb_dt_ids);
@@ -5203,7 +5214,7 @@ static int __maybe_unused macb_runtime_suspend(struct device *dev)
 
 	if (!(device_may_wakeup(dev)))
 		macb_clks_disable(bp->pclk, bp->hclk, bp->tx_clk, bp->rx_clk, bp->tsu_clk);
-	else
+	else if (!(bp->caps & MACB_CAPS_NEED_TSUCLK))
 		macb_clks_disable(NULL, NULL, NULL, NULL, bp->tsu_clk);
 
 	return 0;
@@ -5219,8 +5230,10 @@ static int __maybe_unused macb_runtime_resume(struct device *dev)
 		clk_prepare_enable(bp->hclk);
 		clk_prepare_enable(bp->tx_clk);
 		clk_prepare_enable(bp->rx_clk);
+		clk_prepare_enable(bp->tsu_clk);
+	} else if (!(bp->caps & MACB_CAPS_NEED_TSUCLK)) {
+		clk_prepare_enable(bp->tsu_clk);
 	}
-	clk_prepare_enable(bp->tsu_clk);
 
 	return 0;
 }
-- 
2.17.1

Re: [PATCH v2 2/3] net: macb: Sort CAPS flags by bit positions

[Claudiu.Beznea]

On 22.07.2022 14:03, Harini Katakam wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Sort capability flags by the bit position set.
> 
> Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>


> ---
> v2:
> New patch to sort existing CAPS flags' bit order.
> 
>  drivers/net/ethernet/cadence/macb.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
> index 7ca077b65eaa..583e860fdca8 100644
> --- a/drivers/net/ethernet/cadence/macb.h
> +++ b/drivers/net/ethernet/cadence/macb.h
> @@ -717,14 +717,14 @@
>  #define MACB_CAPS_BD_RD_PREFETCH               0x00000080
>  #define MACB_CAPS_NEEDS_RSTONUBR               0x00000100
>  #define MACB_CAPS_MIIONRGMII                   0x00000200
> +#define MACB_CAPS_PCS                          0x01000000
> +#define MACB_CAPS_HIGH_SPEED                   0x02000000
>  #define MACB_CAPS_CLK_HW_CHG                   0x04000000
>  #define MACB_CAPS_MACB_IS_EMAC                 0x08000000
>  #define MACB_CAPS_FIFO_MODE                    0x10000000
>  #define MACB_CAPS_GIGABIT_MODE_AVAILABLE       0x20000000
>  #define MACB_CAPS_SG_DISABLED                  0x40000000
>  #define MACB_CAPS_MACB_IS_GEM                  0x80000000
> -#define MACB_CAPS_PCS                          0x01000000
> -#define MACB_CAPS_HIGH_SPEED                   0x02000000
> 
>  /* LSO settings */
>  #define MACB_LSO_UFO_ENABLE                    0x01
> --
> 2.17.1
> 

Re: [PATCH v2 1/3] dt-bindings: net: cdns,macb: Add versal compatible string

[Krzysztof Kozlowski]

On 22/07/2022 13:03, Harini Katakam wrote:
> From: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> 
> Add versal compatible string.


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

Re: [PATCH v2 0/3] Add Versal compatible string to Macb driver

[patchwork-bot+netdevbpf]

Hello:

This series was applied to netdev/net-next.git (master)
by David S. Miller <davem@davemloft.net>:

On Fri, 22 Jul 2022 16:33:27 +0530 you wrote:
> Add Versal device support.
> 
> v2:
> - Sort compatible strings alphabetically in DT bindings.
> - Reorganize new config and CAPS order to be cleaner.
> 
> Harini Katakam (2):
>   net: macb: Sort CAPS flags by bit positions
>   net: macb: Update tsu clk usage in runtime suspend/resume for Versal
> 
> [...]

Here is the summary with links:
  - [v2,1/3] dt-bindings: net: cdns,macb: Add versal compatible string
    https://git.kernel.org/netdev/net-next/c/f1fa61b04530
  - [v2,2/3] net: macb: Sort CAPS flags by bit positions
    https://git.kernel.org/netdev/net-next/c/1d3ded642535
  - [v2,3/3] net: macb: Update tsu clk usage in runtime suspend/resume for Versal
    https://git.kernel.org/netdev/net-next/c/8a1c9753f165

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html

Re: [PATCH v2 1/3] dt-bindings: net: cdns,macb: Add versal compatible string

[Rob Herring]

On Fri, Jul 22, 2022 at 04:33:28PM +0530, Harini Katakam wrote:
> From: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> 
> Add versal compatible string.
> 
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
> ---
> v2:
> Sort compatible string alphabetically.
> 
>  Documentation/devicetree/bindings/net/cdns,macb.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> index 9c92156869b2..762deccd3640 100644
> --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
> +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> @@ -20,6 +20,7 @@ properties:
>  
>        - items:
>            - enum:
> +              - cdns,versal-gem       # Xilinx Versal
>                - cdns,zynq-gem         # Xilinx Zynq-7xxx SoC
>                - cdns,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC

Uh, how did we start this pattern? The vendor here is Xilinx, not 
Cadence. It should be xlnx,versal-gem instead.

>            - const: cdns,gem           # Generic
> -- 
> 2.17.1
> 
> 

Re: [PATCH v2 1/3] dt-bindings: net: cdns,macb: Add versal compatible string

[Krzysztof Kozlowski]

On 25/07/2022 21:33, Rob Herring wrote:
> On Fri, Jul 22, 2022 at 04:33:28PM +0530, Harini Katakam wrote:
>> From: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
>>
>> Add versal compatible string.
>>
>> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
>> Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
>> ---
>> v2:
>> Sort compatible string alphabetically.
>>
>>  Documentation/devicetree/bindings/net/cdns,macb.yaml | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
>> index 9c92156869b2..762deccd3640 100644
>> --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
>> +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
>> @@ -20,6 +20,7 @@ properties:
>>  
>>        - items:
>>            - enum:
>> +              - cdns,versal-gem       # Xilinx Versal
>>                - cdns,zynq-gem         # Xilinx Zynq-7xxx SoC
>>                - cdns,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC
> 
> Uh, how did we start this pattern? The vendor here is Xilinx, not 
> Cadence. It should be xlnx,versal-gem instead.

I missed that piece entirely... Un-ack.

Best regards,
Krzysztof

RE: [PATCH v2 1/3] dt-bindings: net: cdns,macb: Add versal compatible string

[Katakam, Harini]

Hi Rob, Krzysztof,

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Tuesday, July 26, 2022 1:10 AM
> To: Rob Herring <robh@kernel.org>; Harini Katakam
> <harini.katakam@xilinx.com>
> Cc: nicolas.ferre@microchip.com; davem@davemloft.net;
> claudiu.beznea@microchip.com; kuba@kernel.org; edumazet@google.com;
> pabeni@redhat.com; krzysztof.kozlowski+dt@linaro.org;
> netdev@vger.kernel.org; linux-kernel@vger.kernel.org;
> michal.simek@xilinx.com; harinikatakamlinux@gmail.com; Katakam, Harini
> <harini.katakam@amd.com>; devicetree@vger.kernel.org;
> radhey.shyam.pandey@xilinx.com
> Subject: Re: [PATCH v2 1/3] dt-bindings: net: cdns,macb: Add versal
> compatible string
> 
> On 25/07/2022 21:33, Rob Herring wrote:
> > On Fri, Jul 22, 2022 at 04:33:28PM +0530, Harini Katakam wrote:
<snip>
> >>
> >>        - items:
> >>            - enum:
> >> +              - cdns,versal-gem       # Xilinx Versal
> >>                - cdns,zynq-gem         # Xilinx Zynq-7xxx SoC
> >>                - cdns,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC
> >
> > Uh, how did we start this pattern? The vendor here is Xilinx, not
> > Cadence. It should be xlnx,versal-gem instead.

I'm not sure how the pattern started but I see that all the early versions
of compatible strings added (Xilinx, Atmel, Microchip) has cdns prefix.
Links for reference:
https://lore.kernel.org/lkml/1432756728-6778-1-git-send-email-nathan.sullivan@ni.com/
https://lore.kernel.org/lkml/1432244845-29315-1-git-send-email-nathan.sullivan@ni.com/
https://lore.kernel.org/lkml/1430931438-32592-1-git-send-email-harinik@xilinx.com/

I can switch to xlnx,versal-gem now.

Regards,
Harini