From: Mayuresh Chitale <mchitale@ventanamicro.com>
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: Mayuresh Chitale <mchitale@ventanamicro.com>, alistair.francis@wdc.com
Subject: [PATCH v7 4/4] target/riscv: smstateen knobs
Date: Mon, 1 Aug 2022 22:48:43 +0530 [thread overview]
Message-ID: <20220801171843.72986-5-mchitale@ventanamicro.com> (raw)
In-Reply-To: <20220801171843.72986-1-mchitale@ventanamicro.com>
Add knobs to allow users to enable smstateen and also export it via the
ISA extension string.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d4635c7df4..d8a0f4e700 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -99,6 +99,7 @@ static const struct isa_ext_data isa_edata_arr[] = {
ISA_EXT_DATA_ENTRY(zve64f, true, PRIV_VERSION_1_12_0, ext_zve64f),
ISA_EXT_DATA_ENTRY(zhinx, true, PRIV_VERSION_1_12_0, ext_zhinx),
ISA_EXT_DATA_ENTRY(zhinxmin, true, PRIV_VERSION_1_12_0, ext_zhinxmin),
+ ISA_EXT_DATA_ENTRY(smstateen, true, PRIV_VERSION_1_12_0, ext_smstateen),
ISA_EXT_DATA_ENTRY(svinval, true, PRIV_VERSION_1_12_0, ext_svinval),
ISA_EXT_DATA_ENTRY(svnapot, true, PRIV_VERSION_1_12_0, ext_svnapot),
ISA_EXT_DATA_ENTRY(svpbmt, true, PRIV_VERSION_1_12_0, ext_svpbmt),
@@ -1001,6 +1002,7 @@ static Property riscv_cpu_extensions[] = {
DEFINE_PROP_UINT16("vlen", RISCVCPU, cfg.vlen, 128),
DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64),
+ DEFINE_PROP_BOOL("smstateen", RISCVCPU, cfg.ext_smstateen, false),
DEFINE_PROP_BOOL("svinval", RISCVCPU, cfg.ext_svinval, false),
DEFINE_PROP_BOOL("svnapot", RISCVCPU, cfg.ext_svnapot, false),
DEFINE_PROP_BOOL("svpbmt", RISCVCPU, cfg.ext_svpbmt, false),
--
2.25.1
prev parent reply other threads:[~2022-08-01 17:27 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-01 17:18 [PATCH v7 0/4] RISC-V Smstateen support Mayuresh Chitale
2022-08-01 17:18 ` [PATCH v7 1/4] target/riscv: Add smstateen support Mayuresh Chitale
2022-08-03 8:15 ` Weiwei Li
2022-08-04 3:35 ` Mayuresh Chitale
2022-08-01 17:18 ` [PATCH v7 2/4] target/riscv: smstateen check for h/senvcfg Mayuresh Chitale
2022-08-03 8:24 ` Weiwei Li
2022-08-04 3:36 ` Mayuresh Chitale
2022-08-01 17:18 ` [PATCH v7 3/4] target/riscv: smstateen check for fcsr Mayuresh Chitale
2022-08-03 8:32 ` Weiwei Li
2022-08-04 3:52 ` Mayuresh Chitale
2022-08-01 17:18 ` Mayuresh Chitale [this message]
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