From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AEA7EC00140 for ; Fri, 5 Aug 2022 20:10:42 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5DAC8848CA; Fri, 5 Aug 2022 22:10:32 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="dYqZReie"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 9982D848B4; Fri, 5 Aug 2022 22:10:29 +0200 (CEST) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 1EE8C841EE for ; Fri, 5 Aug 2022 22:10:27 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9683161A78; Fri, 5 Aug 2022 20:10:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CB2A1C433B5; Fri, 5 Aug 2022 20:10:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1659730225; bh=Riedzo7oWAgnLwaKFIPg9LyysBP3BJmVH8hNsUL6jeo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dYqZReiesfHrxH2pJvAHwzI8ckzDZWHLrGJrAbZ5tJxLgAy36kG9v5u84pqhqkHaj SqDNA4/akeyqNNr21oEcp/1yqOzxijECeO5T+be6EJbEBH2xTA1f6GPSaOt8FIdLc6 EFNbqK58nnxgKFNsLg167O5c0d3pdJqxkI00evNUDPC4dYrZ757D6bZXFEWLXJEV/K +nNVttUXWfhpZJtlgCvBMHgL2tLqCo14wL/rT/tCh4CzGsEHZeqamIeZF7vR/G9gv+ NtIH9nNwp4z8DBtFhlWT8TvxFslNOFMz3cjRGvBCvppG1wzSMN+jXgUT8gDdZj0zJj MT8QWB/CNW9cw== Received: by pali.im (Postfix) id 6908782D; Fri, 5 Aug 2022 22:10:21 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Jaehoon Chung , Peng Fan , =?UTF-8?q?Marek=20Beh=C3=BAn?= Cc: Sinan Akman , u-boot@lists.denx.de Subject: [PATCH v3 1/3] mmc: fsl_esdhc_spl: Add support for loading proper U-Boot from unaligned location Date: Fri, 5 Aug 2022 22:09:39 +0200 Message-Id: <20220805200941.22101-1-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220511183332.1362-1-pali@kernel.org> References: <20220511183332.1362-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean This allows to concatenate SPL and proper U-Boot without extra alignment. Signed-off-by: Pali Rohár Reviewed-by: Jaehoon Chung --- Changes in v3: * Fix compilation with CONFIG_FSL_CORENET Changes in v2: * Rebased on top of the U-Boot next branch, commit 98c4828740f4944462b7d9608b95d5b73850c7b0 --- drivers/mmc/fsl_esdhc_spl.c | 35 ++++++++++++++++++++++++++--------- 1 file changed, 26 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index 760f13d24018..dd6d5fa81ea6 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -58,10 +58,10 @@ void __noreturn mmc_boot(void) { __attribute__((noreturn)) void (*uboot)(void); uint blk_start, blk_cnt, err; -#ifndef CONFIG_FSL_CORENET uchar *tmp_buf; u32 blklen; u32 blk_off; +#ifndef CONFIG_FSL_CORENET uchar val; #ifndef CONFIG_SPL_FSL_PBL u32 val32; @@ -83,9 +83,6 @@ void __noreturn mmc_boot(void) hang(); } -#ifdef CONFIG_FSL_CORENET - offset = CONFIG_SYS_MMC_U_BOOT_OFFS; -#else blklen = mmc->read_bl_len; if (blklen < 512) blklen = 512; @@ -95,6 +92,9 @@ void __noreturn mmc_boot(void) hang(); } +#ifdef CONFIG_FSL_CORENET + offset = CONFIG_SYS_MMC_U_BOOT_OFFS; +#else sector = 0; again: memset(tmp_buf, 0, blklen); @@ -155,17 +155,34 @@ again: * Load U-Boot image from mmc into RAM */ code_len = CONFIG_SYS_MMC_U_BOOT_SIZE; - blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len; - blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len; + blk_start = offset / mmc->read_bl_len; + blk_off = offset % mmc->read_bl_len; + blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1; + if (blk_off) { + err = mmc->block_dev.block_read(&mmc->block_dev, + blk_start, 1, tmp_buf); + if (err != 1) { + puts("spl: mmc read failed!!\n"); + hang(); + } + blk_start++; + } err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt, - (uchar *)CONFIG_SYS_MMC_U_BOOT_DST); + (uchar *)CONFIG_SYS_MMC_U_BOOT_DST + + (blk_off ? (mmc->read_bl_len - blk_off) : 0)); if (err != blk_cnt) { puts("spl: mmc read failed!!\n"); -#ifndef CONFIG_FSL_CORENET free(tmp_buf); -#endif hang(); } + /* + * SDHC DMA may erase bytes at dst + bl_len - blk_off - 8 + * due to unaligned access. So copy leading bytes from tmp_buf + * after SDHC DMA transfer. + */ + if (blk_off) + memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST, + tmp_buf + blk_off, mmc->read_bl_len - blk_off); /* * Clean d-cache and invalidate i-cache, to -- 2.20.1