[PATCH 17/17] target/i386: add a8-af, b8-bf opcodes

[Paolo Bonzini <pbonzini@redhat.com>]

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/tcg/decode-new.c.inc | 16 +++++++++++++++
 target/i386/tcg/decode-old.c.inc |  2 +-
 target/i386/tcg/emit.c.inc       | 35 +++++++++++++++++++++++++++++++-
 3 files changed, 51 insertions(+), 2 deletions(-)

diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index 1e607b68fa..832a8d8d25 100644
--- a/target/i386/tcg/decode-new.c.inc
+++ b/target/i386/tcg/decode-new.c.inc
@@ -742,8 +742,24 @@ static X86OpEntry A2_08_FF[16][8] = {
         X86_OP_ENTRY0(LAHF),
     },
     {
+        X86_OP_ENTRY2(AND, 0,b, I,b, nowb),   /* AL, Ib */
+        X86_OP_ENTRY2(AND, 0,v, I,z, nowb),   /* rAX, Iz */
+        X86_OP_ENTRY2(STOS, Y,b, 0,b),
+        X86_OP_ENTRY2(STOS, Y,v, 0,v),
+        X86_OP_ENTRY2(LODS, 0,b, X,b, nowb),
+        X86_OP_ENTRY2(LODS, 0,v, X,v, nowb),
+        X86_OP_ENTRY2(SCAS, 0,b, Y,b, nowb),
+        X86_OP_ENTRY2(SCAS, 0,v, Y,v, nowb),
     },
     {
+        X86_OP_ENTRY3(MOV, LoBits,v, I,v, None, None),
+        X86_OP_ENTRY3(MOV, LoBits,v, I,v, None, None),
+        X86_OP_ENTRY3(MOV, LoBits,v, I,v, None, None),
+        X86_OP_ENTRY3(MOV, LoBits,v, I,v, None, None),
+        X86_OP_ENTRY3(MOV, LoBits,v, I,v, None, None),
+        X86_OP_ENTRY3(MOV, LoBits,v, I,v, None, None),
+        X86_OP_ENTRY3(MOV, LoBits,v, I,v, None, None),
+        X86_OP_ENTRY3(MOV, LoBits,v, I,v, None, None),
     },
     {
     },
diff --git a/target/i386/tcg/decode-old.c.inc b/target/i386/tcg/decode-old.c.inc
index 69ce70d141..d17671b8eb 100644
--- a/target/i386/tcg/decode-old.c.inc
+++ b/target/i386/tcg/decode-old.c.inc
@@ -1822,7 +1822,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 #else
         use_new &= b <= limit;
 #endif
-        if (use_new && b <= 0x7f) {
+        if (use_new && b <= 0xbf) {
             return disas_insn_new(s, cpu, b);
         }
     case 0x0f:
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index 22f2fbde79..1d4f63322e 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -229,7 +229,7 @@ static void gen_BOUND(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
 
 static void gen_CALLF(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
 {
-    MemOp ot = decode->op[1].ot;
+    MemOp ot = decode->op[2].ot;
     unsigned int selector, offset;
 
     if (CODE64(s)) {
@@ -237,6 +237,7 @@ static void gen_CALLF(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
         return;
     }
 
+    assert(ot >= MO_16);
     offset = insn_get(env, s, ot);
     selector = insn_get(env, s, MO_16);
     tcg_gen_movi_tl(s->T0, selector);
@@ -403,6 +404,16 @@ static void gen_LEA(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
     tcg_gen_mov_tl(s->T0, s->A0);
 }
 
+static void gen_LODS(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
+{
+    MemOp ot = decode->op[0].ot;
+    if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
+        gen_repz_lods(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base);
+    } else {
+        gen_lods(s, ot);
+    }
+}
+
 static void gen_MOV(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
 {
     /* nothing to do! */
@@ -564,6 +575,28 @@ static void gen_SBB(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
     gen_alu_op(s, OP_SBBL, decode->op[0].ot);
 }
 
+static void gen_SCAS(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
+{
+    MemOp ot = decode->op[0].ot;
+    if (s->prefix & PREFIX_REPNZ) {
+        gen_repz_scas(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base, 1);
+    } else if (s->prefix & PREFIX_REPZ) {
+        gen_repz_scas(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base, 0);
+    } else {
+        gen_scas(s, ot);
+    }
+}
+
+static void gen_STOS(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
+{
+    MemOp ot = decode->op[0].ot;
+    if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
+        gen_repz_stos(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base);
+    } else {
+        gen_stos(s, ot);
+    }
+}
+
 static void gen_SUB(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
 {
     gen_alu_op(s, OP_SUBL, decode->op[0].ot);
-- 
2.37.1