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([171.76.81.110]) by smtp.gmail.com with ESMTPSA id a6-20020a170902ecc600b0016ed5266a5csm7517607plh.170.2022.08.29.05.52.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Aug 2022 05:52:54 -0700 (PDT) From: Anup Patel To: Palmer Dabbelt , Paul Walmsley Cc: Atish Patra , Heiko Stuebner , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel , Mayuresh Chitale Subject: [PATCH 1/4] RISC-V: Fix ioremap_cache() and ioremap_wc() for systems with Svpbmt Date: Mon, 29 Aug 2022 18:22:23 +0530 Message-Id: <20220829125226.511564-2-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220829125226.511564-1-apatel@ventanamicro.com> References: <20220829125226.511564-1-apatel@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220829_055256_446716_A75D1124 X-CRM114-Status: UNSURE ( 9.41 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Currently, all flavors of ioremap_xyz() function maps to the generic ioremap() which means any ioremap_xyz() call will always map the target memory as IO using _PAGE_IOREMAP page attributes. This breaks ioremap_cache() and ioremap_wc() on systems with Svpbmt because memory remapped using ioremap_cache() and ioremap_wc() will use _PAGE_IOREMAP page attributes. To address above (just like other architectures), we implement RISC-V specific ioremap_cache() and ioremap_wc() which maps memory using page attributes as defined by the Svpbmt specification. Fixes: ff689fd21cb1 ("riscv: add RISC-V Svpbmt extension support") Co-developed-by: Mayuresh Chitale Signed-off-by: Mayuresh Chitale Signed-off-by: Anup Patel --- arch/riscv/include/asm/io.h | 10 ++++++++++ arch/riscv/include/asm/pgtable.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h index 69605a474270..07ac63999575 100644 --- a/arch/riscv/include/asm/io.h +++ b/arch/riscv/include/asm/io.h @@ -133,6 +133,16 @@ __io_writes_outs(outs, u64, q, __io_pbr(), __io_paw()) #define outsq(addr, buffer, count) __outsq((void __iomem *)addr, buffer, count) #endif +#ifdef CONFIG_MMU +#define ioremap_wc(addr, size) \ + ioremap_prot((addr), (size), _PAGE_IOREMAP_WC) +#endif + #include +#ifdef CONFIG_MMU +#define ioremap_cache(addr, size) \ + ioremap_prot((addr), (size), _PAGE_KERNEL) +#endif + #endif /* _ASM_RISCV_IO_H */ diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 7ec936910a96..346b7c1a3eeb 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -182,6 +182,8 @@ extern struct pt_alloc_ops pt_ops __initdata; #define PAGE_TABLE __pgprot(_PAGE_TABLE) #define _PAGE_IOREMAP ((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_IO) +#define _PAGE_IOREMAP_WC ((_PAGE_KERNEL & ~_PAGE_MTMASK) | \ + _PAGE_NOCACHE) #define PAGE_KERNEL_IO __pgprot(_PAGE_IOREMAP) extern pgd_t swapper_pg_dir[]; -- 2.34.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8751FECAAD2 for ; Mon, 29 Aug 2022 13:01:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230029AbiH2NBs (ORCPT ); Mon, 29 Aug 2022 09:01:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229990AbiH2NBV (ORCPT ); Mon, 29 Aug 2022 09:01:21 -0400 Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2901D16588 for ; Mon, 29 Aug 2022 05:52:55 -0700 (PDT) Received: by mail-pl1-x634.google.com with SMTP id m2so7890039pls.4 for ; Mon, 29 Aug 2022 05:52:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=DF3EHZACZLIxZm103wJfkyVVUnHhmNz4e84k34pg8iM=; b=VwwMibK4e1SGhbD7sfBq/VulE9XYXIwXhHxCTuKnLGjjKcyYtOU26SdNAy0JJLC328 OGsC0x7AUiU+rPHANfFbPQKXIrm9BPUlPQ+KLS2hnv/uHnFjNLNVCsIub5rusNcz8PaS 9ITaJBrp3LWW015hTkbf7G50YoCWhaNeKGQBGEcfbfe2SFMHn7uBZldruUZyDK2yoP1S nc0+t/oV2jnDFCK1IxcUqlHXx/zeLtYruOq/1VDzU7WDFU8YGTmelwo+1naw5PvIe6rl FQVuklwhjiugna99cpvtoiVQ3B1TnpSKwhBq/moEV0G4cBA2/9uvoYyZtF0EdJ0uXt08 jqqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=DF3EHZACZLIxZm103wJfkyVVUnHhmNz4e84k34pg8iM=; b=jokRXuIr5yW84NUiCh+lESQDSGFwDk3MHnngZ2jbYQCE3W3mXlQS/Tg3gktguS2u3r qdAhLBbPrJqLeW/UR3+z6HCB4SegfPn/h95bC6lGIsC/5QaChraIanZeXWpF/EuE3S2r QaQGiZzlOx5lwqo2VNlahgEiCnMB39yWbGAOGAmyM5Ur26p2RacB4uapWbHnkn1ZVyWN kqNgN6vNO+FQVcxqmmZu7a2QixHoxd8PtiTfGA/vOHFuWG2V1drJwLPK4WUBgJa9eLWn LKKdInSNJtopIUtFFLc7VYPq/NFqiuNY1q78MSAGM7R+PK6SDR4aaJ1M3stbvsG03qHX to4A== X-Gm-Message-State: ACgBeo33WMqstaalrlutAT+Go3vXpwEuCFb2mM9FM8CAsqrE9p2MVLKO p72yfjJmpD8sL7+/y0QxhvRX5A== X-Google-Smtp-Source: AA6agR5aA3lQRu1vS8qwSp/nS3Li+E+T9vQqImCN0tFjn0Mho9TQuefM6AnU7y3mkyQDlJtkWx7W4g== X-Received: by 2002:a17:903:2310:b0:173:10e1:3a76 with SMTP id d16-20020a170903231000b0017310e13a76mr16520555plh.160.1661777574577; Mon, 29 Aug 2022 05:52:54 -0700 (PDT) Received: from anup-ubuntu64-vm.. ([171.76.81.110]) by smtp.gmail.com with ESMTPSA id a6-20020a170902ecc600b0016ed5266a5csm7517607plh.170.2022.08.29.05.52.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Aug 2022 05:52:54 -0700 (PDT) From: Anup Patel To: Palmer Dabbelt , Paul Walmsley Cc: Atish Patra , Heiko Stuebner , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel , Mayuresh Chitale Subject: [PATCH 1/4] RISC-V: Fix ioremap_cache() and ioremap_wc() for systems with Svpbmt Date: Mon, 29 Aug 2022 18:22:23 +0530 Message-Id: <20220829125226.511564-2-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220829125226.511564-1-apatel@ventanamicro.com> References: <20220829125226.511564-1-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently, all flavors of ioremap_xyz() function maps to the generic ioremap() which means any ioremap_xyz() call will always map the target memory as IO using _PAGE_IOREMAP page attributes. This breaks ioremap_cache() and ioremap_wc() on systems with Svpbmt because memory remapped using ioremap_cache() and ioremap_wc() will use _PAGE_IOREMAP page attributes. To address above (just like other architectures), we implement RISC-V specific ioremap_cache() and ioremap_wc() which maps memory using page attributes as defined by the Svpbmt specification. Fixes: ff689fd21cb1 ("riscv: add RISC-V Svpbmt extension support") Co-developed-by: Mayuresh Chitale Signed-off-by: Mayuresh Chitale Signed-off-by: Anup Patel --- arch/riscv/include/asm/io.h | 10 ++++++++++ arch/riscv/include/asm/pgtable.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h index 69605a474270..07ac63999575 100644 --- a/arch/riscv/include/asm/io.h +++ b/arch/riscv/include/asm/io.h @@ -133,6 +133,16 @@ __io_writes_outs(outs, u64, q, __io_pbr(), __io_paw()) #define outsq(addr, buffer, count) __outsq((void __iomem *)addr, buffer, count) #endif +#ifdef CONFIG_MMU +#define ioremap_wc(addr, size) \ + ioremap_prot((addr), (size), _PAGE_IOREMAP_WC) +#endif + #include +#ifdef CONFIG_MMU +#define ioremap_cache(addr, size) \ + ioremap_prot((addr), (size), _PAGE_KERNEL) +#endif + #endif /* _ASM_RISCV_IO_H */ diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 7ec936910a96..346b7c1a3eeb 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -182,6 +182,8 @@ extern struct pt_alloc_ops pt_ops __initdata; #define PAGE_TABLE __pgprot(_PAGE_TABLE) #define _PAGE_IOREMAP ((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_IO) +#define _PAGE_IOREMAP_WC ((_PAGE_KERNEL & ~_PAGE_MTMASK) | \ + _PAGE_NOCACHE) #define PAGE_KERNEL_IO __pgprot(_PAGE_IOREMAP) extern pgd_t swapper_pg_dir[]; -- 2.34.1