Hi Masahiro, I love your patch! Perhaps something to improve: [auto build test WARNING on masahiroy-kbuild/for-next] [also build test WARNING on linus/master v6.0-rc4] [cannot apply to next-20220901] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Masahiro-Yamada/kbuild-move-Werror-from-KBUILD_CFLAGS-to-KBUILD_CPPFLAGS/20220905-164209 base: https://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild.git for-next config: arm-defconfig compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/2f8ee1865d7d00ad27460d94056c7752cad8481f git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Masahiro-Yamada/kbuild-move-Werror-from-KBUILD_CFLAGS-to-KBUILD_CPPFLAGS/20220905-164209 git checkout 2f8ee1865d7d00ad27460d94056c7752cad8481f # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash arch/arm/ If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot All warnings (new ones prefixed by >>): In file included from arch/arm/mm/cache-v7.S:17: >> arch/arm/mm/proc-macros.S:109:5: warning: "L_PTE_SHARED" is not defined, evaluates to 0 [-Wundef] 109 | #if L_PTE_SHARED != PTE_EXT_SHARED | ^~~~~~~~~~~~ >> arch/arm/mm/proc-macros.S:109:21: warning: "PTE_EXT_SHARED" is not defined, evaluates to 0 [-Wundef] 109 | #if L_PTE_SHARED != PTE_EXT_SHARED | ^~~~~~~~~~~~~~ >> arch/arm/mm/proc-macros.S:113:10: warning: "L_PTE_XN" is not defined, evaluates to 0 [-Wundef] 113 | (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\ | ^~~~~~~~ >> arch/arm/mm/proc-macros.S:113:19: warning: "L_PTE_USER" is not defined, evaluates to 0 [-Wundef] 113 | (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\ | ^~~~~~~~~~ >> arch/arm/mm/proc-macros.S:113:30: warning: "L_PTE_RDONLY" is not defined, evaluates to 0 [-Wundef] 113 | (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\ | ^~~~~~~~~~~~ >> arch/arm/mm/proc-macros.S:113:43: warning: "L_PTE_DIRTY" is not defined, evaluates to 0 [-Wundef] 113 | (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\ | ^~~~~~~~~~~ >> arch/arm/mm/proc-macros.S:113:55: warning: "L_PTE_YOUNG" is not defined, evaluates to 0 [-Wundef] 113 | (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\ | ^~~~~~~~~~~ >> arch/arm/mm/proc-macros.S:114:10: warning: "L_PTE_PRESENT" is not defined, evaluates to 0 [-Wundef] 114 | L_PTE_PRESENT) > L_PTE_SHARED | ^~~~~~~~~~~~~ arch/arm/mm/proc-macros.S:114:27: warning: "L_PTE_SHARED" is not defined, evaluates to 0 [-Wundef] 114 | L_PTE_PRESENT) > L_PTE_SHARED | ^~~~~~~~~~~~ vim +/L_PTE_SHARED +109 arch/arm/mm/proc-macros.S 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 14 ^1da177e4c3f41 Linus Torvalds 2005-04-16 15 /* ^1da177e4c3f41 Linus Torvalds 2005-04-16 16 * vma_vm_mm - get mm pointer from vma pointer (vma->vm_mm) ^1da177e4c3f41 Linus Torvalds 2005-04-16 17 */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 18 .macro vma_vm_mm, rd, rn ^1da177e4c3f41 Linus Torvalds 2005-04-16 19 ldr \rd, [\rn, #VMA_VM_MM] ^1da177e4c3f41 Linus Torvalds 2005-04-16 20 .endm ^1da177e4c3f41 Linus Torvalds 2005-04-16 21 ^1da177e4c3f41 Linus Torvalds 2005-04-16 22 /* ^1da177e4c3f41 Linus Torvalds 2005-04-16 23 * vma_vm_flags - get vma->vm_flags ^1da177e4c3f41 Linus Torvalds 2005-04-16 24 */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 25 .macro vma_vm_flags, rd, rn ^1da177e4c3f41 Linus Torvalds 2005-04-16 26 ldr \rd, [\rn, #VMA_VM_FLAGS] ^1da177e4c3f41 Linus Torvalds 2005-04-16 27 .endm ^1da177e4c3f41 Linus Torvalds 2005-04-16 28 ^1da177e4c3f41 Linus Torvalds 2005-04-16 29 /* ^1da177e4c3f41 Linus Torvalds 2005-04-16 30 * act_mm - get current->active_mm ^1da177e4c3f41 Linus Torvalds 2005-04-16 31 */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 32 .macro act_mm, rd 50596b7559bf22 Ard Biesheuvel 2021-09-18 33 get_current \rd ffa47aa678cfaa Arnd Bergmann 2017-06-30 34 .if (TSK_ACTIVE_MM > IMM12_MASK) ffa47aa678cfaa Arnd Bergmann 2017-06-30 35 add \rd, \rd, #TSK_ACTIVE_MM & ~IMM12_MASK ffa47aa678cfaa Arnd Bergmann 2017-06-30 36 .endif ffa47aa678cfaa Arnd Bergmann 2017-06-30 37 ldr \rd, [\rd, #TSK_ACTIVE_MM & IMM12_MASK] ^1da177e4c3f41 Linus Torvalds 2005-04-16 38 .endm ^1da177e4c3f41 Linus Torvalds 2005-04-16 39 ^1da177e4c3f41 Linus Torvalds 2005-04-16 40 /* ^1da177e4c3f41 Linus Torvalds 2005-04-16 41 * mmid - get context id from mm pointer (mm->context.id) 9520a5bece13b7 Ben Dooks 2013-02-11 42 * note, this field is 64bit, so in big-endian the two words are swapped too. ^1da177e4c3f41 Linus Torvalds 2005-04-16 43 */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 44 .macro mmid, rd, rn 9520a5bece13b7 Ben Dooks 2013-02-11 45 #ifdef __ARMEB__ 9520a5bece13b7 Ben Dooks 2013-02-11 46 ldr \rd, [\rn, #MM_CONTEXT_ID + 4 ] 9520a5bece13b7 Ben Dooks 2013-02-11 47 #else ^1da177e4c3f41 Linus Torvalds 2005-04-16 48 ldr \rd, [\rn, #MM_CONTEXT_ID] 9520a5bece13b7 Ben Dooks 2013-02-11 49 #endif ^1da177e4c3f41 Linus Torvalds 2005-04-16 50 .endm ^1da177e4c3f41 Linus Torvalds 2005-04-16 51 ^1da177e4c3f41 Linus Torvalds 2005-04-16 52 /* ^1da177e4c3f41 Linus Torvalds 2005-04-16 53 * mask_asid - mask the ASID from the context ID ^1da177e4c3f41 Linus Torvalds 2005-04-16 54 */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 55 .macro asid, rd, rn ^1da177e4c3f41 Linus Torvalds 2005-04-16 56 and \rd, \rn, #255 ^1da177e4c3f41 Linus Torvalds 2005-04-16 57 .endm 22b1908610dd7f Russell King 2006-06-29 58 22b1908610dd7f Russell King 2006-06-29 59 .macro crval, clear, mmuset, ucset 22b1908610dd7f Russell King 2006-06-29 60 #ifdef CONFIG_MMU 22b1908610dd7f Russell King 2006-06-29 61 .word \clear 22b1908610dd7f Russell King 2006-06-29 62 .word \mmuset 22b1908610dd7f Russell King 2006-06-29 63 #else 22b1908610dd7f Russell King 2006-06-29 64 .word \clear 22b1908610dd7f Russell King 2006-06-29 65 .word \ucset 22b1908610dd7f Russell King 2006-06-29 66 #endif 22b1908610dd7f Russell King 2006-06-29 67 .endm bbe888864ec324 Catalin Marinas 2007-05-08 68 bbe888864ec324 Catalin Marinas 2007-05-08 69 /* f91e2c3bd42723 Catalin Marinas 2010-12-07 70 * dcache_line_size - get the minimum D-cache line size from the CTR register f91e2c3bd42723 Catalin Marinas 2010-12-07 71 * on ARMv7. bbe888864ec324 Catalin Marinas 2007-05-08 72 */ bbe888864ec324 Catalin Marinas 2007-05-08 73 .macro dcache_line_size, reg, tmp 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 74 #ifdef CONFIG_CPU_V7M 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 75 movw \tmp, #:lower16:BASEADDR_V7M_SCB + V7M_SCB_CTR 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 76 movt \tmp, #:upper16:BASEADDR_V7M_SCB + V7M_SCB_CTR 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 77 ldr \tmp, [\tmp] 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 78 #else f91e2c3bd42723 Catalin Marinas 2010-12-07 79 mrc p15, 0, \tmp, c0, c0, 1 @ read ctr 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 80 #endif f91e2c3bd42723 Catalin Marinas 2010-12-07 81 lsr \tmp, \tmp, #16 f91e2c3bd42723 Catalin Marinas 2010-12-07 82 and \tmp, \tmp, #0xf @ cache line size encoding f91e2c3bd42723 Catalin Marinas 2010-12-07 83 mov \reg, #4 @ bytes per word bbe888864ec324 Catalin Marinas 2007-05-08 84 mov \reg, \reg, lsl \tmp @ actual cache line size bbe888864ec324 Catalin Marinas 2007-05-08 85 .endm da0916539d20f2 Russell King 2008-09-06 86 da30e0ac0f9a52 Catalin Marinas 2010-12-07 87 /* da30e0ac0f9a52 Catalin Marinas 2010-12-07 88 * icache_line_size - get the minimum I-cache line size from the CTR register da30e0ac0f9a52 Catalin Marinas 2010-12-07 89 * on ARMv7. da30e0ac0f9a52 Catalin Marinas 2010-12-07 90 */ da30e0ac0f9a52 Catalin Marinas 2010-12-07 91 .macro icache_line_size, reg, tmp 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 92 #ifdef CONFIG_CPU_V7M 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 93 movw \tmp, #:lower16:BASEADDR_V7M_SCB + V7M_SCB_CTR 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 94 movt \tmp, #:upper16:BASEADDR_V7M_SCB + V7M_SCB_CTR 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 95 ldr \tmp, [\tmp] 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 96 #else da30e0ac0f9a52 Catalin Marinas 2010-12-07 97 mrc p15, 0, \tmp, c0, c0, 1 @ read ctr 9a1af5f2206bd3 Vladimir Murzin 2016-08-30 98 #endif da30e0ac0f9a52 Catalin Marinas 2010-12-07 99 and \tmp, \tmp, #0xf @ cache line size encoding da30e0ac0f9a52 Catalin Marinas 2010-12-07 100 mov \reg, #4 @ bytes per word da30e0ac0f9a52 Catalin Marinas 2010-12-07 101 mov \reg, \reg, lsl \tmp @ actual cache line size da30e0ac0f9a52 Catalin Marinas 2010-12-07 102 .endm da0916539d20f2 Russell King 2008-09-06 103 da0916539d20f2 Russell King 2008-09-06 104 /* da0916539d20f2 Russell King 2008-09-06 105 * Sanity check the PTE configuration for the code below - which makes 25985edcedea63 Lucas De Marchi 2011-03-30 106 * certain assumptions about how these bits are laid out. da0916539d20f2 Russell King 2008-09-06 107 */ 8b79d5f217d7fc Catalin Marinas 2009-07-24 108 #ifdef CONFIG_MMU da0916539d20f2 Russell King 2008-09-06 @109 #if L_PTE_SHARED != PTE_EXT_SHARED da0916539d20f2 Russell King 2008-09-06 110 #error PTE shared bit mismatch da0916539d20f2 Russell King 2008-09-06 111 #endif 1b6ba46b7efa31 Catalin Marinas 2011-11-22 112 #if !defined (CONFIG_ARM_LPAE) && \ 1b6ba46b7efa31 Catalin Marinas 2011-11-22 @113 (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\ b007ea798f5c56 Kirill A. Shutemov 2015-02-10 @114 L_PTE_PRESENT) > L_PTE_SHARED da0916539d20f2 Russell King 2008-09-06 115 #error Invalid Linux PTE bit settings da0916539d20f2 Russell King 2008-09-06 116 #endif 8b79d5f217d7fc Catalin Marinas 2009-07-24 117 #endif /* CONFIG_MMU */ da0916539d20f2 Russell King 2008-09-06 118 -- 0-DAY CI Kernel Test Service https://01.org/lkp