From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, Mark Brown <broonie@kernel.org>
Subject: [PATCH v1 0/6] arm64/sysreg: More system register generation
Date: Sat, 10 Sep 2022 17:33:48 +0100 [thread overview]
Message-ID: <20220910163354.860255-1-broonie@kernel.org> (raw)
This series converts the last of the 64 bit ID registers to automatic
generation, James Morse has a pending series which will do the 32 bit
ones so we will soon be able to start taking advantage of the conversion
to simplify the CPU feature detection macros.
Mark Brown (6):
arm64/sysreg: Align field names in ID_AA64DFR0_EL1 with architecture
arm64/sysreg: Add _EL1 into ID_AA64DFR0_EL1 definition names
arm64/sysreg: Use feature numbering for PMU and SPE revisions
arm64/sysreg: Convert ID_AA64FDR0_EL1 to automatic generation
arm64/sysreg: Convert ID_AA64DFR1_EL1 to automatic generation
arm64/sysreg: Convert ID_AA64AFRn_EL1 to automatic generation
arch/arm64/include/asm/assembler.h | 2 +-
arch/arm64/include/asm/cpufeature.h | 2 +-
arch/arm64/include/asm/el2_setup.h | 8 +--
arch/arm64/include/asm/hw_breakpoint.h | 4 +-
arch/arm64/include/asm/sysreg.h | 29 ---------
arch/arm64/kernel/cpufeature.c | 14 ++---
arch/arm64/kernel/debug-monitors.c | 2 +-
arch/arm64/kernel/perf_event.c | 8 +--
arch/arm64/kvm/debug.c | 4 +-
arch/arm64/kvm/hyp/nvhe/pkvm.c | 12 ++--
arch/arm64/kvm/pmu-emul.c | 16 ++---
arch/arm64/kvm/sys_regs.c | 16 ++---
arch/arm64/tools/sysreg | 83 ++++++++++++++++++++++++++
13 files changed, 127 insertions(+), 73 deletions(-)
base-commit: 3e9ae1ce508b8d69762abd1b8b9d9f97d6715b9b
--
2.30.2
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next reply other threads:[~2022-09-10 16:36 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-10 16:33 Mark Brown [this message]
2022-09-10 16:33 ` [PATCH v1 1/6] arm64/sysreg: Align field names in ID_AA64DFR0_EL1 with architecture Mark Brown
2022-09-10 16:33 ` [PATCH v1 2/6] arm64/sysreg: Add _EL1 into ID_AA64DFR0_EL1 definition names Mark Brown
2022-09-10 16:33 ` [PATCH v1 3/6] arm64/sysreg: Use feature numbering for PMU and SPE revisions Mark Brown
2022-09-10 16:33 ` [PATCH v1 4/6] arm64/sysreg: Convert ID_AA64FDR0_EL1 to automatic generation Mark Brown
2022-09-10 16:33 ` [PATCH v1 5/6] arm64/sysreg: Convert ID_AA64DFR1_EL1 " Mark Brown
2022-09-10 16:33 ` [PATCH v1 6/6] arm64/sysreg: Convert ID_AA64AFRn_EL1 " Mark Brown
2022-09-16 17:47 ` [PATCH v1 0/6] arm64/sysreg: More system register generation Catalin Marinas
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