From: Siddharth Vadapalli <s-vadapalli@ti.com> To: <davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>, <robh+dt@kernel.org>, <krzysztof.kozlowski@linaro.org>, <krzysztof.kozlowski+dt@linaro.org>, <linux@armlinux.org.uk>, <vladimir.oltean@nxp.com>, <grygorii.strashko@ti.com>, <vigneshr@ti.com>, <nsekhar@ti.com> Cc: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <kishon@ti.com>, <s-vadapalli@ti.com> Subject: [PATCH 2/8] net: ethernet: ti: am65-cpsw: Add support for SERDES configuration Date: Wed, 14 Sep 2022 15:20:47 +0530 [thread overview] Message-ID: <20220914095053.189851-3-s-vadapalli@ti.com> (raw) In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> Use PHY framework APIs to initialize the SERDES connected to CPSW. Define the functions am65_cpsw_init_phy(), am65_cpsw_enable_phy() and am65_cpsw_disable_phy() and invoke in am65_cpsw_nuss_init_slave_ports(), am65_cpsw_mac_link_up() and am65_cpsw_mac_link_down() respectively. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 55 ++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 7ef5d8208a4e..4e06def3b0de 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -1404,6 +1404,50 @@ static const struct net_device_ops am65_cpsw_nuss_netdev_ops = { .ndo_get_devlink_port = am65_cpsw_ndo_get_devlink_port, }; +static void am65_cpsw_disable_phy(struct phy *phy) +{ + phy_power_off(phy); + phy_exit(phy); +} + +static int am65_cpsw_enable_phy(struct phy *phy) +{ + int ret; + + ret = phy_init(phy); + if (ret < 0) + return ret; + + ret = phy_power_on(phy); + if (ret < 0) { + phy_exit(phy); + return ret; + } + + return 0; +} + +static int am65_cpsw_init_phy(struct device *dev, struct device_node *port_np) +{ + const char *name = "serdes-phy"; + struct phy *phy; + int ret; + + phy = devm_of_phy_get(dev, port_np, name); + if (PTR_ERR(phy) == -ENODEV) + return 0; + + ret = am65_cpsw_enable_phy(phy); + if (ret < 0) + goto err_phy; + + return 0; + +err_phy: + devm_phy_put(dev, phy); + return ret; +} + static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned int mode, const struct phylink_link_state *state) { @@ -1427,6 +1471,9 @@ static void am65_cpsw_nuss_mac_link_down(struct phylink_config *config, unsigned struct net_device *ndev = port->ndev; int tmo; + /* disable phy */ + am65_cpsw_disable_phy(port->slave.ifphy); + /* disable forwarding */ cpsw_ale_control_set(common->ale, port->port_id, ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); @@ -1472,6 +1519,9 @@ static void am65_cpsw_nuss_mac_link_up(struct phylink_config *config, struct phy cpsw_sl_ctl_set(port->slave.mac_sl, mac_control); + /* enable phy */ + am65_cpsw_enable_phy(port->slave.ifphy); + /* enable forwarding */ cpsw_ale_control_set(common->ale, port->port_id, ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); @@ -1881,6 +1931,11 @@ static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common) goto of_node_put; } + /* Initialize the phy for the port */ + ret = am65_cpsw_init_phy(dev, port_np); + if (ret) + return ret; + port->slave.mac_only = of_property_read_bool(port_np, "ti,mac-only"); -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Siddharth Vadapalli <s-vadapalli@ti.com> To: <davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>, <robh+dt@kernel.org>, <krzysztof.kozlowski@linaro.org>, <krzysztof.kozlowski+dt@linaro.org>, <linux@armlinux.org.uk>, <vladimir.oltean@nxp.com>, <grygorii.strashko@ti.com>, <vigneshr@ti.com>, <nsekhar@ti.com> Cc: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <kishon@ti.com>, <s-vadapalli@ti.com> Subject: [PATCH 2/8] net: ethernet: ti: am65-cpsw: Add support for SERDES configuration Date: Wed, 14 Sep 2022 15:20:47 +0530 [thread overview] Message-ID: <20220914095053.189851-3-s-vadapalli@ti.com> (raw) In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> Use PHY framework APIs to initialize the SERDES connected to CPSW. Define the functions am65_cpsw_init_phy(), am65_cpsw_enable_phy() and am65_cpsw_disable_phy() and invoke in am65_cpsw_nuss_init_slave_ports(), am65_cpsw_mac_link_up() and am65_cpsw_mac_link_down() respectively. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 55 ++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 7ef5d8208a4e..4e06def3b0de 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -1404,6 +1404,50 @@ static const struct net_device_ops am65_cpsw_nuss_netdev_ops = { .ndo_get_devlink_port = am65_cpsw_ndo_get_devlink_port, }; +static void am65_cpsw_disable_phy(struct phy *phy) +{ + phy_power_off(phy); + phy_exit(phy); +} + +static int am65_cpsw_enable_phy(struct phy *phy) +{ + int ret; + + ret = phy_init(phy); + if (ret < 0) + return ret; + + ret = phy_power_on(phy); + if (ret < 0) { + phy_exit(phy); + return ret; + } + + return 0; +} + +static int am65_cpsw_init_phy(struct device *dev, struct device_node *port_np) +{ + const char *name = "serdes-phy"; + struct phy *phy; + int ret; + + phy = devm_of_phy_get(dev, port_np, name); + if (PTR_ERR(phy) == -ENODEV) + return 0; + + ret = am65_cpsw_enable_phy(phy); + if (ret < 0) + goto err_phy; + + return 0; + +err_phy: + devm_phy_put(dev, phy); + return ret; +} + static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned int mode, const struct phylink_link_state *state) { @@ -1427,6 +1471,9 @@ static void am65_cpsw_nuss_mac_link_down(struct phylink_config *config, unsigned struct net_device *ndev = port->ndev; int tmo; + /* disable phy */ + am65_cpsw_disable_phy(port->slave.ifphy); + /* disable forwarding */ cpsw_ale_control_set(common->ale, port->port_id, ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); @@ -1472,6 +1519,9 @@ static void am65_cpsw_nuss_mac_link_up(struct phylink_config *config, struct phy cpsw_sl_ctl_set(port->slave.mac_sl, mac_control); + /* enable phy */ + am65_cpsw_enable_phy(port->slave.ifphy); + /* enable forwarding */ cpsw_ale_control_set(common->ale, port->port_id, ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); @@ -1881,6 +1931,11 @@ static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common) goto of_node_put; } + /* Initialize the phy for the port */ + ret = am65_cpsw_init_phy(dev, port_np); + if (ret) + return ret; + port->slave.mac_only = of_property_read_bool(port_np, "ti,mac-only"); -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-09-14 9:51 UTC|newest] Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-14 9:50 [PATCH 0/8] Add support for J721e CPSW9G and SGMII mode Siddharth Vadapalli 2022-09-14 9:50 ` Siddharth Vadapalli 2022-09-14 9:50 ` [PATCH 1/8] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J721e CPSW9G Siddharth Vadapalli 2022-09-14 9:50 ` Siddharth Vadapalli 2022-09-14 16:20 ` Rob Herring 2022-09-14 16:20 ` Rob Herring 2022-09-15 7:28 ` Siddharth Vadapalli 2022-09-15 7:28 ` Siddharth Vadapalli 2022-09-14 16:23 ` Rob Herring 2022-09-14 16:23 ` Rob Herring 2022-09-15 7:40 ` Siddharth Vadapalli 2022-09-15 7:40 ` Siddharth Vadapalli 2022-09-14 9:50 ` Siddharth Vadapalli [this message] 2022-09-14 9:50 ` [PATCH 2/8] net: ethernet: ti: am65-cpsw: Add support for SERDES configuration Siddharth Vadapalli 2022-09-14 15:37 ` Russell King (Oracle) 2022-09-14 15:37 ` Russell King (Oracle) 2022-09-15 8:36 ` Siddharth Vadapalli 2022-09-15 8:36 ` Siddharth Vadapalli 2022-09-14 9:50 ` [PATCH 3/8] net: ethernet: ti: am65-cpsw: Add mac control function Siddharth Vadapalli 2022-09-14 9:50 ` Siddharth Vadapalli 2022-09-14 15:53 ` Russell King (Oracle) 2022-09-14 15:53 ` Russell King (Oracle) 2022-09-14 9:50 ` [PATCH 4/8] net: ethernet: ti: am65-cpsw: Add mac enable link function Siddharth Vadapalli 2022-09-14 9:50 ` Siddharth Vadapalli 2022-09-14 15:54 ` Russell King (Oracle) 2022-09-14 15:54 ` Russell King (Oracle) 2022-09-14 9:50 ` [PATCH 5/8] net: ethernet: ti: am65-cpsw: Add support for fixed-link configuration Siddharth Vadapalli 2022-09-14 9:50 ` Siddharth Vadapalli 2022-09-14 15:41 ` Russell King (Oracle) 2022-09-14 15:41 ` Russell King (Oracle) 2022-09-15 8:59 ` Siddharth Vadapalli 2022-09-15 8:59 ` Siddharth Vadapalli 2022-09-14 16:09 ` Russell King (Oracle) 2022-09-14 16:09 ` Russell King (Oracle) 2022-09-15 9:28 ` Siddharth Vadapalli 2022-09-15 9:28 ` Siddharth Vadapalli 2022-09-15 10:07 ` Russell King (Oracle) 2022-09-15 10:07 ` Russell King (Oracle) 2022-09-16 4:54 ` Siddharth Vadapalli 2022-09-16 4:54 ` Siddharth Vadapalli 2022-09-16 7:20 ` Russell King (Oracle) 2022-09-16 7:20 ` Russell King (Oracle) 2022-09-16 9:03 ` Siddharth Vadapalli 2022-09-16 9:03 ` Siddharth Vadapalli 2022-09-16 9:14 ` Russell King (Oracle) 2022-09-16 9:14 ` Russell King (Oracle) 2022-09-16 9:55 ` Siddharth Vadapalli 2022-09-16 9:55 ` Siddharth Vadapalli 2022-09-14 9:50 ` [PATCH 6/8] net: ethernet: ti: am65-cpsw: Add support for SGMII mode for J7200 CPSW5G Siddharth Vadapalli 2022-09-14 9:50 ` Siddharth Vadapalli 2022-09-14 15:44 ` Russell King (Oracle) 2022-09-14 15:44 ` Russell King (Oracle) 2022-09-15 9:35 ` Siddharth Vadapalli 2022-09-15 9:35 ` Siddharth Vadapalli 2022-09-14 16:04 ` Russell King (Oracle) 2022-09-14 16:04 ` Russell King (Oracle) 2022-09-15 9:40 ` Siddharth Vadapalli 2022-09-15 9:40 ` Siddharth Vadapalli 2022-09-14 9:50 ` [PATCH 7/8] net: ethernet: ti: am65-cpsw: Add support for J721e CPSW9G Siddharth Vadapalli 2022-09-14 9:50 ` Siddharth Vadapalli 2022-09-14 9:50 ` [PATCH 8/8] net: ethernet: ti: am65-cpsw: Enable SGMII mode " Siddharth Vadapalli 2022-09-14 9:50 ` Siddharth Vadapalli 2022-09-16 9:57 ` [PATCH 0/8] Add support for J721e CPSW9G and SGMII mode Krzysztof Kozlowski 2022-09-16 9:57 ` Krzysztof Kozlowski 2022-09-16 10:07 ` Siddharth Vadapalli 2022-09-16 10:07 ` Siddharth Vadapalli
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