* [PATCH v7 00/12] dt-bindings: display/msm: rework MDSS and DPU bindings
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
Create separate YAML schema for MDSS devicesd$ (both for MDP5 and DPU
devices). Cleanup DPU schema files, so that they do not contain schema
for both MDSS and DPU nodes. Apply misc small fixes to the DPU schema
afterwards. Add schema for the MDSS and DPU on sm8250 platform.
Changes since v6:
- Removed extra newlines (Krzysztof)
- Added $ref to dpu-common.yaml#/ports/port@foo to enforce schema
for the port nodes (Rob)
- Removed unused allOf's (Rob)
- Fixed repeated interconnects descriptions (Rob)
- Fixed dpu-common.yaml and mdss-common.yaml descriptions (Rob)
- Fixed intentation of examples (Krzysztof)
- Renamed MDSS and DPU schema to follow compat names (Rob)
Changes since v5:
- Dropped the core clock from mdss.yaml. It will be handled in a
separate patchset together with adding the clock itself.
- Fixed a typo in two commit subjects (mdm -> msm).
Changes since v4:
- Created separate mdss-common.yaml
- Rather than squashing everything into mdss.yaml, create individual
schema files for MDSS devices.
Changes since v3:
- Changed mdss->(dpu, dsi, etc.) relationship into the tight binding
depending on the mdss compatible string.
- Added sm8250 dpu schema and added qcom,sm8250-mdss to mdss.yaml
Changes since v2:
- Added a patch to allow opp-table under the dpu* nodes.
- Removed the c&p issue which allowed the @0 nodes under the MDSS
device node.
Changes since v1:
- Renamed DPU device nodes from mdp@ to display-controller@
- Described removal of mistakenly mentioned "lut" clock
- Switched mdss.yaml to use $ref instead of fixing compatible strings
- Dropped mdp-opp-table description (renamed by Krzysztof in his
patchset)
- Reworked DPU's ports definitions. Dropped description of individual
ports, left only /ports $ref and description in dpu-common.yaml.
Dmitry Baryshkov (12):
dt-bindings: display/msm: split qcom,mdss bindings
dt-bindings: display/msm: add gcc-bus clock to dpu-smd845
dt-bindings: display/msm: add interconnects property to
qcom,mdss-smd845
dt-bindings: display/msm: move common DPU properties to
dpu-common.yaml
dt-bindings: display/msm: move common MDSS properties to
mdss-common.yaml
dt-bindings: display/msm: split dpu-sc7180 into DPU and MDSS parts
dt-bindings: display/msm: split dpu-sc7280 into DPU and MDSS parts
dt-bindings: display/msm: split dpu-sdm845 into DPU and MDSS parts
dt-bindings: display/msm: split dpu-msm8998 into DPU and MDSS parts
dt-bindings: display/msm: split dpu-qcm2290 into DPU and MDSS parts
dt-bindings: display/msm: add missing device nodes to mdss-* schemas
dt-bindings: display/msm: add support for the display on SM8250
.../bindings/display/msm/dpu-common.yaml | 48 ++++
.../bindings/display/msm/dpu-msm8998.yaml | 223 ----------------
.../bindings/display/msm/dpu-qcm2290.yaml | 222 ----------------
.../bindings/display/msm/dpu-sc7180.yaml | 235 -----------------
.../bindings/display/msm/dpu-sc7280.yaml | 239 ------------------
.../bindings/display/msm/dpu-sdm845.yaml | 217 ----------------
.../devicetree/bindings/display/msm/mdp5.txt | 30 +--
.../bindings/display/msm/mdss-common.yaml | 83 ++++++
.../bindings/display/msm/qcom,mdss.yaml | 164 ++++++++++++
.../display/msm/qcom,msm8998-dpu.yaml | 95 +++++++
.../display/msm/qcom,msm8998-mdss.yaml | 87 +++++++
.../display/msm/qcom,qcm2290-dpu.yaml | 84 ++++++
.../display/msm/qcom,qcm2290-mdss.yaml | 91 +++++++
.../bindings/display/msm/qcom,sc7180-dpu.yaml | 95 +++++++
.../display/msm/qcom,sc7180-mdss.yaml | 102 ++++++++
.../bindings/display/msm/qcom,sc7280-dpu.yaml | 98 +++++++
.../display/msm/qcom,sc7280-mdss.yaml | 111 ++++++++
.../bindings/display/msm/qcom,sdm845-dpu.yaml | 90 +++++++
.../display/msm/qcom,sdm845-mdss.yaml | 91 +++++++
.../bindings/display/msm/qcom,sm8250-dpu.yaml | 92 +++++++
.../display/msm/qcom,sm8250-mdss.yaml | 103 ++++++++
21 files changed, 1435 insertions(+), 1165 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-common.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
--
2.35.1
^ permalink raw reply [flat|nested] 64+ messages in thread
* [PATCH v7 00/12] dt-bindings: display/msm: rework MDSS and DPU bindings
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Create separate YAML schema for MDSS devicesd$ (both for MDP5 and DPU
devices). Cleanup DPU schema files, so that they do not contain schema
for both MDSS and DPU nodes. Apply misc small fixes to the DPU schema
afterwards. Add schema for the MDSS and DPU on sm8250 platform.
Changes since v6:
- Removed extra newlines (Krzysztof)
- Added $ref to dpu-common.yaml#/ports/port@foo to enforce schema
for the port nodes (Rob)
- Removed unused allOf's (Rob)
- Fixed repeated interconnects descriptions (Rob)
- Fixed dpu-common.yaml and mdss-common.yaml descriptions (Rob)
- Fixed intentation of examples (Krzysztof)
- Renamed MDSS and DPU schema to follow compat names (Rob)
Changes since v5:
- Dropped the core clock from mdss.yaml. It will be handled in a
separate patchset together with adding the clock itself.
- Fixed a typo in two commit subjects (mdm -> msm).
Changes since v4:
- Created separate mdss-common.yaml
- Rather than squashing everything into mdss.yaml, create individual
schema files for MDSS devices.
Changes since v3:
- Changed mdss->(dpu, dsi, etc.) relationship into the tight binding
depending on the mdss compatible string.
- Added sm8250 dpu schema and added qcom,sm8250-mdss to mdss.yaml
Changes since v2:
- Added a patch to allow opp-table under the dpu* nodes.
- Removed the c&p issue which allowed the @0 nodes under the MDSS
device node.
Changes since v1:
- Renamed DPU device nodes from mdp@ to display-controller@
- Described removal of mistakenly mentioned "lut" clock
- Switched mdss.yaml to use $ref instead of fixing compatible strings
- Dropped mdp-opp-table description (renamed by Krzysztof in his
patchset)
- Reworked DPU's ports definitions. Dropped description of individual
ports, left only /ports $ref and description in dpu-common.yaml.
Dmitry Baryshkov (12):
dt-bindings: display/msm: split qcom,mdss bindings
dt-bindings: display/msm: add gcc-bus clock to dpu-smd845
dt-bindings: display/msm: add interconnects property to
qcom,mdss-smd845
dt-bindings: display/msm: move common DPU properties to
dpu-common.yaml
dt-bindings: display/msm: move common MDSS properties to
mdss-common.yaml
dt-bindings: display/msm: split dpu-sc7180 into DPU and MDSS parts
dt-bindings: display/msm: split dpu-sc7280 into DPU and MDSS parts
dt-bindings: display/msm: split dpu-sdm845 into DPU and MDSS parts
dt-bindings: display/msm: split dpu-msm8998 into DPU and MDSS parts
dt-bindings: display/msm: split dpu-qcm2290 into DPU and MDSS parts
dt-bindings: display/msm: add missing device nodes to mdss-* schemas
dt-bindings: display/msm: add support for the display on SM8250
.../bindings/display/msm/dpu-common.yaml | 48 ++++
.../bindings/display/msm/dpu-msm8998.yaml | 223 ----------------
.../bindings/display/msm/dpu-qcm2290.yaml | 222 ----------------
.../bindings/display/msm/dpu-sc7180.yaml | 235 -----------------
.../bindings/display/msm/dpu-sc7280.yaml | 239 ------------------
.../bindings/display/msm/dpu-sdm845.yaml | 217 ----------------
.../devicetree/bindings/display/msm/mdp5.txt | 30 +--
.../bindings/display/msm/mdss-common.yaml | 83 ++++++
.../bindings/display/msm/qcom,mdss.yaml | 164 ++++++++++++
.../display/msm/qcom,msm8998-dpu.yaml | 95 +++++++
.../display/msm/qcom,msm8998-mdss.yaml | 87 +++++++
.../display/msm/qcom,qcm2290-dpu.yaml | 84 ++++++
.../display/msm/qcom,qcm2290-mdss.yaml | 91 +++++++
.../bindings/display/msm/qcom,sc7180-dpu.yaml | 95 +++++++
.../display/msm/qcom,sc7180-mdss.yaml | 102 ++++++++
.../bindings/display/msm/qcom,sc7280-dpu.yaml | 98 +++++++
.../display/msm/qcom,sc7280-mdss.yaml | 111 ++++++++
.../bindings/display/msm/qcom,sdm845-dpu.yaml | 90 +++++++
.../display/msm/qcom,sdm845-mdss.yaml | 91 +++++++
.../bindings/display/msm/qcom,sm8250-dpu.yaml | 92 +++++++
.../display/msm/qcom,sm8250-mdss.yaml | 103 ++++++++
21 files changed, 1435 insertions(+), 1165 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-common.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
--
2.35.1
^ permalink raw reply [flat|nested] 64+ messages in thread
* [PATCH v7 01/12] dt-bindings: display/msm: split qcom,mdss bindings
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno, Rob Herring
Split Mobile Display SubSystem (MDSS) root node bindings to the separate
yaml file. Changes to the existing (txt) schema:
- Added optional "vbif_nrt_phys" region used by msm8996
- Made "bus" and "vsync" clocks optional (they are not used by some
platforms)
- Added (optional) "core" clock added recently to the mdss driver
- Added optional resets property referencing MDSS reset
- Defined child nodes pointing to corresponding reference schema.
- Dropped the "lut" clock. It was added to the schema by mistake (it is
a part of mdp4 schema, not the mdss).
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/display/msm/mdp5.txt | 30 +---
.../bindings/display/msm/qcom,mdss.yaml | 164 ++++++++++++++++++
2 files changed, 165 insertions(+), 29 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/mdp5.txt b/Documentation/devicetree/bindings/display/msm/mdp5.txt
index 43d11279c925..65d03c58dee6 100644
--- a/Documentation/devicetree/bindings/display/msm/mdp5.txt
+++ b/Documentation/devicetree/bindings/display/msm/mdp5.txt
@@ -2,37 +2,9 @@ Qualcomm adreno/snapdragon MDP5 display controller
Description:
-This is the bindings documentation for the Mobile Display Subsytem(MDSS) that
-encapsulates sub-blocks like MDP5, DSI, HDMI, eDP etc, and the MDP5 display
+This is the bindings documentation for the MDP5 display
controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 and MSM8996.
-MDSS:
-Required properties:
-- compatible:
- * "qcom,mdss" - MDSS
-- reg: Physical base address and length of the controller's registers.
-- reg-names: The names of register regions. The following regions are required:
- * "mdss_phys"
- * "vbif_phys"
-- interrupts: The interrupt signal from MDSS.
-- interrupt-controller: identifies the node as an interrupt controller.
-- #interrupt-cells: specifies the number of cells needed to encode an interrupt
- source, should be 1.
-- power-domains: a power domain consumer specifier according to
- Documentation/devicetree/bindings/power/power_domain.txt
-- clocks: device clocks. See ../clocks/clock-bindings.txt for details.
-- clock-names: the following clocks are required.
- * "iface"
- * "bus"
- * "vsync"
-- #address-cells: number of address cells for the MDSS children. Should be 1.
-- #size-cells: Should be 1.
-- ranges: parent bus address space is the same as the child bus address space.
-
-Optional properties:
-- clock-names: the following clocks are optional:
- * "lut"
-
MDP5:
Required properties:
- compatible:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml
new file mode 100644
index 000000000000..f0462d0756aa
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml
@@ -0,0 +1,164 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Mobile Display SubSystem (MDSS)
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+ - Rob Clark <robdclark@gmail.com>
+
+description:
+ This is the bindings documentation for the Mobile Display Subsytem(MDSS) that
+ encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.
+
+properties:
+ compatible:
+ enum:
+ - qcom,mdss
+
+ reg:
+ minItems: 2
+ maxItems: 3
+
+ reg-names:
+ minItems: 2
+ items:
+ - const: mdss_phys
+ - const: vbif_phys
+ - const: vbif_nrt_phys
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+ const: 1
+
+ power-domains:
+ maxItems: 1
+ description: |
+ The MDSS power domain provided by GCC
+
+ clocks:
+ minItems: 1
+ items:
+ - description: Display abh clock
+ - description: Display axi clock
+ - description: Display vsync clock
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: iface
+ - const: bus
+ - const: vsync
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+ resets:
+ items:
+ - description: MDSS_CORE reset
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+ - power-domains
+ - clocks
+ - clock-names
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+patternProperties:
+ "^mdp@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdp5
+
+ "^dsi@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^dsi-phy@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,dsi-phy-14nm
+ - qcom,dsi-phy-14nm-660
+ - qcom,dsi-phy-14nm-8953
+ - qcom,dsi-phy-20nm
+ - qcom,dsi-phy-28nm-hpm
+ - qcom,dsi-phy-28nm-lp
+
+ "^hdmi-phy@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,hdmi-phy-8084
+ - qcom,hdmi-phy-8660
+ - qcom,hdmi-phy-8960
+ - qcom,hdmi-phy-8974
+ - qcom,hdmi-phy-8996
+
+ "^hdmi-tx@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,hdmi-tx-8084
+ - qcom,hdmi-tx-8660
+ - qcom,hdmi-tx-8960
+ - qcom,hdmi-tx-8974
+ - qcom,hdmi-tx-8994
+ - qcom,hdmi-tx-8996
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-msm8916.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ mdss@1a00000 {
+ compatible = "qcom,mdss";
+ reg = <0x1a00000 0x1000>,
+ <0x1ac8000 0x3000>;
+ reg-names = "mdss_phys", "vbif_phys";
+
+ power-domains = <&gcc MDSS_GDSC>;
+
+ clocks = <&gcc GCC_MDSS_AHB_CLK>,
+ <&gcc GCC_MDSS_AXI_CLK>,
+ <&gcc GCC_MDSS_VSYNC_CLK>;
+ clock-names = "iface",
+ "bus",
+ "vsync";
+
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 01/12] dt-bindings: display/msm: split qcom,mdss bindings
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Split Mobile Display SubSystem (MDSS) root node bindings to the separate
yaml file. Changes to the existing (txt) schema:
- Added optional "vbif_nrt_phys" region used by msm8996
- Made "bus" and "vsync" clocks optional (they are not used by some
platforms)
- Added (optional) "core" clock added recently to the mdss driver
- Added optional resets property referencing MDSS reset
- Defined child nodes pointing to corresponding reference schema.
- Dropped the "lut" clock. It was added to the schema by mistake (it is
a part of mdp4 schema, not the mdss).
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/display/msm/mdp5.txt | 30 +---
.../bindings/display/msm/qcom,mdss.yaml | 164 ++++++++++++++++++
2 files changed, 165 insertions(+), 29 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/mdp5.txt b/Documentation/devicetree/bindings/display/msm/mdp5.txt
index 43d11279c925..65d03c58dee6 100644
--- a/Documentation/devicetree/bindings/display/msm/mdp5.txt
+++ b/Documentation/devicetree/bindings/display/msm/mdp5.txt
@@ -2,37 +2,9 @@ Qualcomm adreno/snapdragon MDP5 display controller
Description:
-This is the bindings documentation for the Mobile Display Subsytem(MDSS) that
-encapsulates sub-blocks like MDP5, DSI, HDMI, eDP etc, and the MDP5 display
+This is the bindings documentation for the MDP5 display
controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 and MSM8996.
-MDSS:
-Required properties:
-- compatible:
- * "qcom,mdss" - MDSS
-- reg: Physical base address and length of the controller's registers.
-- reg-names: The names of register regions. The following regions are required:
- * "mdss_phys"
- * "vbif_phys"
-- interrupts: The interrupt signal from MDSS.
-- interrupt-controller: identifies the node as an interrupt controller.
-- #interrupt-cells: specifies the number of cells needed to encode an interrupt
- source, should be 1.
-- power-domains: a power domain consumer specifier according to
- Documentation/devicetree/bindings/power/power_domain.txt
-- clocks: device clocks. See ../clocks/clock-bindings.txt for details.
-- clock-names: the following clocks are required.
- * "iface"
- * "bus"
- * "vsync"
-- #address-cells: number of address cells for the MDSS children. Should be 1.
-- #size-cells: Should be 1.
-- ranges: parent bus address space is the same as the child bus address space.
-
-Optional properties:
-- clock-names: the following clocks are optional:
- * "lut"
-
MDP5:
Required properties:
- compatible:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml
new file mode 100644
index 000000000000..f0462d0756aa
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml
@@ -0,0 +1,164 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Mobile Display SubSystem (MDSS)
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+ - Rob Clark <robdclark@gmail.com>
+
+description:
+ This is the bindings documentation for the Mobile Display Subsytem(MDSS) that
+ encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.
+
+properties:
+ compatible:
+ enum:
+ - qcom,mdss
+
+ reg:
+ minItems: 2
+ maxItems: 3
+
+ reg-names:
+ minItems: 2
+ items:
+ - const: mdss_phys
+ - const: vbif_phys
+ - const: vbif_nrt_phys
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+ const: 1
+
+ power-domains:
+ maxItems: 1
+ description: |
+ The MDSS power domain provided by GCC
+
+ clocks:
+ minItems: 1
+ items:
+ - description: Display abh clock
+ - description: Display axi clock
+ - description: Display vsync clock
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: iface
+ - const: bus
+ - const: vsync
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+ resets:
+ items:
+ - description: MDSS_CORE reset
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+ - power-domains
+ - clocks
+ - clock-names
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+patternProperties:
+ "^mdp@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdp5
+
+ "^dsi@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^dsi-phy@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,dsi-phy-14nm
+ - qcom,dsi-phy-14nm-660
+ - qcom,dsi-phy-14nm-8953
+ - qcom,dsi-phy-20nm
+ - qcom,dsi-phy-28nm-hpm
+ - qcom,dsi-phy-28nm-lp
+
+ "^hdmi-phy@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,hdmi-phy-8084
+ - qcom,hdmi-phy-8660
+ - qcom,hdmi-phy-8960
+ - qcom,hdmi-phy-8974
+ - qcom,hdmi-phy-8996
+
+ "^hdmi-tx@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,hdmi-tx-8084
+ - qcom,hdmi-tx-8660
+ - qcom,hdmi-tx-8960
+ - qcom,hdmi-tx-8974
+ - qcom,hdmi-tx-8994
+ - qcom,hdmi-tx-8996
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-msm8916.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ mdss@1a00000 {
+ compatible = "qcom,mdss";
+ reg = <0x1a00000 0x1000>,
+ <0x1ac8000 0x3000>;
+ reg-names = "mdss_phys", "vbif_phys";
+
+ power-domains = <&gcc MDSS_GDSC>;
+
+ clocks = <&gcc GCC_MDSS_AHB_CLK>,
+ <&gcc GCC_MDSS_AXI_CLK>,
+ <&gcc GCC_MDSS_VSYNC_CLK>;
+ clock-names = "iface",
+ "bus",
+ "vsync";
+
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 02/12] dt-bindings: display/msm: add gcc-bus clock to dpu-smd845
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno, Rob Herring
Add gcc-bus clock required for the SDM845 DPU device tree node. This
change was made in the commit 111c52854102 ("arm64: dts: qcom: sdm845:
move bus clock to mdp node for sdm845 target"), but was not reflected in
the schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/display/msm/dpu-sdm845.yaml | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index 7d1037373175..3cb2ae336996 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -84,6 +84,7 @@ patternProperties:
clocks:
items:
+ - description: Display GCC bus clock
- description: Display ahb clock
- description: Display axi clock
- description: Display core clock
@@ -91,6 +92,7 @@ patternProperties:
clock-names:
items:
+ - const: gcc-bus
- const: iface
- const: bus
- const: core
@@ -183,11 +185,12 @@ examples:
<0x0aeb0000 0x2008>;
reg-names = "mdp", "vbif";
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ clocks = <&gcc GCC_DISP_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "iface", "bus", "core", "vsync";
+ clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
interrupt-parent = <&mdss>;
interrupts = <0>;
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 02/12] dt-bindings: display/msm: add gcc-bus clock to dpu-smd845
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Add gcc-bus clock required for the SDM845 DPU device tree node. This
change was made in the commit 111c52854102 ("arm64: dts: qcom: sdm845:
move bus clock to mdp node for sdm845 target"), but was not reflected in
the schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/display/msm/dpu-sdm845.yaml | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index 7d1037373175..3cb2ae336996 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -84,6 +84,7 @@ patternProperties:
clocks:
items:
+ - description: Display GCC bus clock
- description: Display ahb clock
- description: Display axi clock
- description: Display core clock
@@ -91,6 +92,7 @@ patternProperties:
clock-names:
items:
+ - const: gcc-bus
- const: iface
- const: bus
- const: core
@@ -183,11 +185,12 @@ examples:
<0x0aeb0000 0x2008>;
reg-names = "mdp", "vbif";
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ clocks = <&gcc GCC_DISP_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "iface", "bus", "core", "vsync";
+ clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
interrupt-parent = <&mdss>;
interrupts = <0>;
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 03/12] dt-bindings: display/msm: add interconnects property to qcom,mdss-smd845
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
Add interconnects required for the SDM845 MDSS device tree node. This
change was made in the commit c8c61c09e38b ("arm64: dts: qcom: sdm845:
Add interconnects property for display"), but was not reflected in the
schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/display/msm/dpu-sdm845.yaml | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index 3cb2ae336996..a87deea8e9bc 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -57,6 +57,16 @@ properties:
ranges: true
+ interconnects:
+ items:
+ - description: Interconnect path from mdp0 port to the data bus
+ - description: Interconnect path from mdp1 port to the data bus
+
+ interconnect-names:
+ items:
+ - const: mdp0-mem
+ - const: mdp1-mem
+
resets:
items:
- description: MDSS_CORE reset
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 03/12] dt-bindings: display/msm: add interconnects property to qcom, mdss-smd845
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Add interconnects required for the SDM845 MDSS device tree node. This
change was made in the commit c8c61c09e38b ("arm64: dts: qcom: sdm845:
Add interconnects property for display"), but was not reflected in the
schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/display/msm/dpu-sdm845.yaml | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index 3cb2ae336996..a87deea8e9bc 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -57,6 +57,16 @@ properties:
ranges: true
+ interconnects:
+ items:
+ - description: Interconnect path from mdp0 port to the data bus
+ - description: Interconnect path from mdp1 port to the data bus
+
+ interconnect-names:
+ items:
+ - const: mdp0-mem
+ - const: mdp1-mem
+
resets:
items:
- description: MDSS_CORE reset
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 04/12] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
Move properties common to all DPU DT nodes to the dpu-common.yaml.
Note, this removes description of individual DPU port@ nodes. However
such definitions add no additional value. The reg values do not
correspond to hardware INTF indices. The driver discovers and binds
these ports not paying any care for the order of these items. Thus just
leave the reference to graph.yaml#/properties/ports and the description.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-common.yaml | 48 +++++++++++++++++++
.../bindings/display/msm/dpu-msm8998.yaml | 44 +----------------
.../bindings/display/msm/dpu-qcm2290.yaml | 39 +--------------
.../bindings/display/msm/dpu-sc7180.yaml | 43 +----------------
.../bindings/display/msm/dpu-sc7280.yaml | 43 +----------------
.../bindings/display/msm/dpu-sdm845.yaml | 44 +----------------
6 files changed, 58 insertions(+), 203 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-common.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
new file mode 100644
index 000000000000..a39799115640
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
@@ -0,0 +1,48 @@
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/dpu-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU common properties
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+ - Rob Clark <robdclark@gmail.com>
+
+description: |
+ Common properties for QCom DPU display controller.
+
+properties:
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ operating-points-v2: true
+ opp-table:
+ type: object
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc.
+
+ patternProperties:
+ "^port@[0-9a-f]+$":
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - interrupts
+ - power-domains
+ - operating-points-v2
+ - ports
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
index 253665c693e6..200eeace1c71 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
@@ -61,8 +61,9 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
+ $ref: /schemas/display/msm/dpu-common.yaml#
description: Node containing the properties of DPU.
- additionalProperties: false
+ unevaluatedProperties: false
properties:
compatible:
@@ -99,47 +100,6 @@ patternProperties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- opp-table:
- type: object
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
-
- required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
index c5824e1d2382..d5f1d16b13d3 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
@@ -73,8 +73,9 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
+ $ref: /schemas/display/msm/dpu-common.yaml#
description: Node containing the properties of DPU.
- additionalProperties: false
+ unevaluatedProperties: false
properties:
compatible:
@@ -107,42 +108,6 @@ patternProperties:
- const: lut
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- opp-table:
- type: object
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- required:
- - port@0
-
- required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
index 4890bc25f3fd..2ac10664d79a 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
@@ -72,8 +72,9 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
+ $ref: /schemas/display/msm/dpu-common.yaml#
description: Node containing the properties of DPU.
- additionalProperties: false
+ unevaluatedProperties: false
properties:
compatible:
@@ -108,46 +109,6 @@ patternProperties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- opp-table:
- type: object
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@2:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF0 (DP)
-
- required:
- - port@0
-
- required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
index 584d646021d5..4ca7bc7f0185 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
@@ -71,8 +71,9 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
+ $ref: /schemas/display/msm/dpu-common.yaml#
description: Node containing the properties of DPU.
- additionalProperties: false
+ unevaluatedProperties: false
properties:
compatible:
@@ -106,46 +107,6 @@ patternProperties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- opp-table:
- type: object
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF5 (EDP)
-
- required:
- - port@0
-
- required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index a87deea8e9bc..de193ca11265 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -74,8 +74,9 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
+ $ref: /schemas/display/msm/dpu-common.yaml#
description: Node containing the properties of DPU.
- additionalProperties: false
+ unevaluatedProperties: false
properties:
compatible:
@@ -108,47 +109,6 @@ patternProperties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- opp-table:
- type: object
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
-
- required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
required:
- compatible
- reg
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 04/12] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Move properties common to all DPU DT nodes to the dpu-common.yaml.
Note, this removes description of individual DPU port@ nodes. However
such definitions add no additional value. The reg values do not
correspond to hardware INTF indices. The driver discovers and binds
these ports not paying any care for the order of these items. Thus just
leave the reference to graph.yaml#/properties/ports and the description.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-common.yaml | 48 +++++++++++++++++++
.../bindings/display/msm/dpu-msm8998.yaml | 44 +----------------
.../bindings/display/msm/dpu-qcm2290.yaml | 39 +--------------
.../bindings/display/msm/dpu-sc7180.yaml | 43 +----------------
.../bindings/display/msm/dpu-sc7280.yaml | 43 +----------------
.../bindings/display/msm/dpu-sdm845.yaml | 44 +----------------
6 files changed, 58 insertions(+), 203 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-common.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
new file mode 100644
index 000000000000..a39799115640
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
@@ -0,0 +1,48 @@
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/dpu-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU common properties
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+ - Rob Clark <robdclark@gmail.com>
+
+description: |
+ Common properties for QCom DPU display controller.
+
+properties:
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ operating-points-v2: true
+ opp-table:
+ type: object
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc.
+
+ patternProperties:
+ "^port@[0-9a-f]+$":
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - interrupts
+ - power-domains
+ - operating-points-v2
+ - ports
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
index 253665c693e6..200eeace1c71 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
@@ -61,8 +61,9 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
+ $ref: /schemas/display/msm/dpu-common.yaml#
description: Node containing the properties of DPU.
- additionalProperties: false
+ unevaluatedProperties: false
properties:
compatible:
@@ -99,47 +100,6 @@ patternProperties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- opp-table:
- type: object
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
-
- required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
index c5824e1d2382..d5f1d16b13d3 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
@@ -73,8 +73,9 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
+ $ref: /schemas/display/msm/dpu-common.yaml#
description: Node containing the properties of DPU.
- additionalProperties: false
+ unevaluatedProperties: false
properties:
compatible:
@@ -107,42 +108,6 @@ patternProperties:
- const: lut
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- opp-table:
- type: object
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- required:
- - port@0
-
- required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
index 4890bc25f3fd..2ac10664d79a 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
@@ -72,8 +72,9 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
+ $ref: /schemas/display/msm/dpu-common.yaml#
description: Node containing the properties of DPU.
- additionalProperties: false
+ unevaluatedProperties: false
properties:
compatible:
@@ -108,46 +109,6 @@ patternProperties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- opp-table:
- type: object
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@2:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF0 (DP)
-
- required:
- - port@0
-
- required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
index 584d646021d5..4ca7bc7f0185 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
@@ -71,8 +71,9 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
+ $ref: /schemas/display/msm/dpu-common.yaml#
description: Node containing the properties of DPU.
- additionalProperties: false
+ unevaluatedProperties: false
properties:
compatible:
@@ -106,46 +107,6 @@ patternProperties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- opp-table:
- type: object
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF5 (EDP)
-
- required:
- - port@0
-
- required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index a87deea8e9bc..de193ca11265 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -74,8 +74,9 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
+ $ref: /schemas/display/msm/dpu-common.yaml#
description: Node containing the properties of DPU.
- additionalProperties: false
+ unevaluatedProperties: false
properties:
compatible:
@@ -108,47 +109,6 @@ patternProperties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- opp-table:
- type: object
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
-
- required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
required:
- compatible
- reg
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
Move properties common to all MDSS DT nodes to the mdss-common.yaml.
This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
will be added later, once msm8998 gains interconnect support.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-msm8998.yaml | 41 +--------
.../bindings/display/msm/dpu-qcm2290.yaml | 51 ++----------
.../bindings/display/msm/dpu-sc7180.yaml | 50 ++---------
.../bindings/display/msm/dpu-sc7280.yaml | 50 ++---------
.../bindings/display/msm/dpu-sdm845.yaml | 54 ++----------
.../bindings/display/msm/mdss-common.yaml | 83 +++++++++++++++++++
6 files changed, 111 insertions(+), 218 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
index 200eeace1c71..67791dbc3b5d 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
@@ -14,20 +14,13 @@ description: |
sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
bindings of MDSS and DPU are mentioned for MSM8998 target.
+$ref: /schemas/display/msm/mdss-common.yaml#
+
properties:
compatible:
items:
- const: qcom,msm8998-mdss
- reg:
- maxItems: 1
-
- reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
-
clocks:
items:
- description: Display AHB clock
@@ -40,23 +33,8 @@ properties:
- const: bus
- const: core
- interrupts:
- maxItems: 1
-
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
+ maxItems: 1
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -100,18 +78,7 @@ patternProperties:
- const: core
- const: vsync
-required:
- - compatible
- - reg
- - reg-names
- - power-domains
- - clocks
- - interrupts
- - interrupt-controller
- - iommus
- - ranges
-
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
index d5f1d16b13d3..42e676bdda4e 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
@@ -14,20 +14,13 @@ description: |
sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
and DPU are mentioned for QCM2290 target.
+$ref: /schemas/display/msm/mdss-common.yaml#
+
properties:
compatible:
items:
- const: qcom,qcm2290-mdss
- reg:
- maxItems: 1
-
- reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
-
clocks:
items:
- description: Display AHB clock from gcc
@@ -40,35 +33,14 @@ properties:
- const: bus
- const: core
- interrupts:
- maxItems: 1
-
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
-
- ranges: true
+ maxItems: 2
interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
+ maxItems: 1
interconnect-names:
- const: mdp0-mem
-
- resets:
- items:
- - description: MDSS_CORE reset
+ maxItems: 1
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -108,18 +80,7 @@ patternProperties:
- const: lut
- const: vsync
-required:
- - compatible
- - reg
- - reg-names
- - power-domains
- - clocks
- - interrupts
- - interrupt-controller
- - iommus
- - ranges
-
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
index 2ac10664d79a..99d6bbd45faf 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
@@ -14,20 +14,13 @@ description: |
sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
bindings of MDSS and DPU are mentioned for SC7180 target.
+$ref: /schemas/display/msm/mdss-common.yaml#
+
properties:
compatible:
items:
- const: qcom,sc7180-mdss
- reg:
- maxItems: 1
-
- reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
-
clocks:
items:
- description: Display AHB clock from gcc
@@ -40,34 +33,14 @@ properties:
- const: ahb
- const: core
- interrupts:
- maxItems: 1
-
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
+ maxItems: 1
interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
+ maxItems: 1
interconnect-names:
- const: mdp0-mem
-
- resets:
- items:
- - description: MDSS_CORE reset
+ maxItems: 1
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -109,18 +82,7 @@ patternProperties:
- const: core
- const: vsync
-required:
- - compatible
- - reg
- - reg-names
- - power-domains
- - clocks
- - interrupts
- - interrupt-controller
- - iommus
- - ranges
-
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
index 4ca7bc7f0185..01ff88c06c51 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
@@ -14,19 +14,12 @@ description: |
sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
bindings of MDSS and DPU are mentioned for SC7280.
+$ref: /schemas/display/msm/mdss-common.yaml#
+
properties:
compatible:
const: qcom,sc7280-mdss
- reg:
- maxItems: 1
-
- reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
-
clocks:
items:
- description: Display AHB clock from gcc
@@ -39,34 +32,14 @@ properties:
- const: ahb
- const: core
- interrupts:
- maxItems: 1
-
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
+ maxItems: 1
interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
+ maxItems: 1
interconnect-names:
- const: mdp0-mem
-
- resets:
- items:
- - description: MDSS_CORE reset
+ maxItems: 1
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -107,18 +80,7 @@ patternProperties:
- const: core
- const: vsync
-required:
- - compatible
- - reg
- - reg-names
- - power-domains
- - clocks
- - interrupts
- - interrupt-controller
- - iommus
- - ranges
-
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index de193ca11265..ae649bb6aa81 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -14,20 +14,13 @@ description: |
sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
bindings of MDSS and DPU are mentioned for SDM845 target.
+$ref: /schemas/display/msm/mdss-common.yaml#
+
properties:
compatible:
items:
- const: qcom,sdm845-mdss
- reg:
- maxItems: 1
-
- reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
-
clocks:
items:
- description: Display AHB clock from gcc
@@ -38,38 +31,14 @@ properties:
- const: iface
- const: core
- interrupts:
- maxItems: 1
-
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
-
- ranges: true
+ maxItems: 2
interconnects:
- items:
- - description: Interconnect path from mdp0 port to the data bus
- - description: Interconnect path from mdp1 port to the data bus
+ maxItems: 2
interconnect-names:
- items:
- - const: mdp0-mem
- - const: mdp1-mem
-
- resets:
- items:
- - description: MDSS_CORE reset
+ maxItems: 2
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -109,18 +78,7 @@ patternProperties:
- const: core
- const: vsync
-required:
- - compatible
- - reg
- - reg-names
- - power-domains
- - clocks
- - interrupts
- - interrupt-controller
- - iommus
- - ranges
-
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
new file mode 100644
index 000000000000..2a476bd0215e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/mdss-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display MDSS common properties
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+ - Rob Clark <robdclark@gmail.com>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc.
+
+properties:
+ reg:
+ maxItems: 1
+
+ reg-names:
+ const: mdss
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ minItems: 2
+ maxItems: 3
+
+ clock-names:
+ minItems: 2
+ maxItems: 3
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ "#address-cells": true
+
+ "#size-cells": true
+
+ "#interrupt-cells":
+ const: 1
+
+ iommus:
+ minItems: 1
+ items:
+ - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
+ - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
+
+ ranges: true
+
+ interconnects:
+ minItems: 1
+ items:
+ - description: Interconnect path from mdp0 (or a single mdp) port to the data bus
+ - description: Interconnect path from mdp1 port to the data bus
+
+ interconnect-names:
+ minItems: 1
+ items:
+ - const: mdp0-mem
+ - const: mdp1-mem
+
+ resets:
+ items:
+ - description: MDSS_CORE reset
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - power-domains
+ - clocks
+ - interrupts
+ - interrupt-controller
+ - iommus
+ - ranges
+
+additionalProperties: true
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Move properties common to all MDSS DT nodes to the mdss-common.yaml.
This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
will be added later, once msm8998 gains interconnect support.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-msm8998.yaml | 41 +--------
.../bindings/display/msm/dpu-qcm2290.yaml | 51 ++----------
.../bindings/display/msm/dpu-sc7180.yaml | 50 ++---------
.../bindings/display/msm/dpu-sc7280.yaml | 50 ++---------
.../bindings/display/msm/dpu-sdm845.yaml | 54 ++----------
.../bindings/display/msm/mdss-common.yaml | 83 +++++++++++++++++++
6 files changed, 111 insertions(+), 218 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
index 200eeace1c71..67791dbc3b5d 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
@@ -14,20 +14,13 @@ description: |
sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
bindings of MDSS and DPU are mentioned for MSM8998 target.
+$ref: /schemas/display/msm/mdss-common.yaml#
+
properties:
compatible:
items:
- const: qcom,msm8998-mdss
- reg:
- maxItems: 1
-
- reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
-
clocks:
items:
- description: Display AHB clock
@@ -40,23 +33,8 @@ properties:
- const: bus
- const: core
- interrupts:
- maxItems: 1
-
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
+ maxItems: 1
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -100,18 +78,7 @@ patternProperties:
- const: core
- const: vsync
-required:
- - compatible
- - reg
- - reg-names
- - power-domains
- - clocks
- - interrupts
- - interrupt-controller
- - iommus
- - ranges
-
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
index d5f1d16b13d3..42e676bdda4e 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
@@ -14,20 +14,13 @@ description: |
sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
and DPU are mentioned for QCM2290 target.
+$ref: /schemas/display/msm/mdss-common.yaml#
+
properties:
compatible:
items:
- const: qcom,qcm2290-mdss
- reg:
- maxItems: 1
-
- reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
-
clocks:
items:
- description: Display AHB clock from gcc
@@ -40,35 +33,14 @@ properties:
- const: bus
- const: core
- interrupts:
- maxItems: 1
-
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
-
- ranges: true
+ maxItems: 2
interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
+ maxItems: 1
interconnect-names:
- const: mdp0-mem
-
- resets:
- items:
- - description: MDSS_CORE reset
+ maxItems: 1
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -108,18 +80,7 @@ patternProperties:
- const: lut
- const: vsync
-required:
- - compatible
- - reg
- - reg-names
- - power-domains
- - clocks
- - interrupts
- - interrupt-controller
- - iommus
- - ranges
-
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
index 2ac10664d79a..99d6bbd45faf 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
@@ -14,20 +14,13 @@ description: |
sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
bindings of MDSS and DPU are mentioned for SC7180 target.
+$ref: /schemas/display/msm/mdss-common.yaml#
+
properties:
compatible:
items:
- const: qcom,sc7180-mdss
- reg:
- maxItems: 1
-
- reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
-
clocks:
items:
- description: Display AHB clock from gcc
@@ -40,34 +33,14 @@ properties:
- const: ahb
- const: core
- interrupts:
- maxItems: 1
-
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
+ maxItems: 1
interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
+ maxItems: 1
interconnect-names:
- const: mdp0-mem
-
- resets:
- items:
- - description: MDSS_CORE reset
+ maxItems: 1
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -109,18 +82,7 @@ patternProperties:
- const: core
- const: vsync
-required:
- - compatible
- - reg
- - reg-names
- - power-domains
- - clocks
- - interrupts
- - interrupt-controller
- - iommus
- - ranges
-
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
index 4ca7bc7f0185..01ff88c06c51 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
@@ -14,19 +14,12 @@ description: |
sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
bindings of MDSS and DPU are mentioned for SC7280.
+$ref: /schemas/display/msm/mdss-common.yaml#
+
properties:
compatible:
const: qcom,sc7280-mdss
- reg:
- maxItems: 1
-
- reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
-
clocks:
items:
- description: Display AHB clock from gcc
@@ -39,34 +32,14 @@ properties:
- const: ahb
- const: core
- interrupts:
- maxItems: 1
-
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
+ maxItems: 1
interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
+ maxItems: 1
interconnect-names:
- const: mdp0-mem
-
- resets:
- items:
- - description: MDSS_CORE reset
+ maxItems: 1
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -107,18 +80,7 @@ patternProperties:
- const: core
- const: vsync
-required:
- - compatible
- - reg
- - reg-names
- - power-domains
- - clocks
- - interrupts
- - interrupt-controller
- - iommus
- - ranges
-
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index de193ca11265..ae649bb6aa81 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -14,20 +14,13 @@ description: |
sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
bindings of MDSS and DPU are mentioned for SDM845 target.
+$ref: /schemas/display/msm/mdss-common.yaml#
+
properties:
compatible:
items:
- const: qcom,sdm845-mdss
- reg:
- maxItems: 1
-
- reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
-
clocks:
items:
- description: Display AHB clock from gcc
@@ -38,38 +31,14 @@ properties:
- const: iface
- const: core
- interrupts:
- maxItems: 1
-
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
-
- ranges: true
+ maxItems: 2
interconnects:
- items:
- - description: Interconnect path from mdp0 port to the data bus
- - description: Interconnect path from mdp1 port to the data bus
+ maxItems: 2
interconnect-names:
- items:
- - const: mdp0-mem
- - const: mdp1-mem
-
- resets:
- items:
- - description: MDSS_CORE reset
+ maxItems: 2
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -109,18 +78,7 @@ patternProperties:
- const: core
- const: vsync
-required:
- - compatible
- - reg
- - reg-names
- - power-domains
- - clocks
- - interrupts
- - interrupt-controller
- - iommus
- - ranges
-
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
new file mode 100644
index 000000000000..2a476bd0215e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/mdss-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display MDSS common properties
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+ - Rob Clark <robdclark@gmail.com>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc.
+
+properties:
+ reg:
+ maxItems: 1
+
+ reg-names:
+ const: mdss
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ minItems: 2
+ maxItems: 3
+
+ clock-names:
+ minItems: 2
+ maxItems: 3
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ "#address-cells": true
+
+ "#size-cells": true
+
+ "#interrupt-cells":
+ const: 1
+
+ iommus:
+ minItems: 1
+ items:
+ - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
+ - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
+
+ ranges: true
+
+ interconnects:
+ minItems: 1
+ items:
+ - description: Interconnect path from mdp0 (or a single mdp) port to the data bus
+ - description: Interconnect path from mdp1 port to the data bus
+
+ interconnect-names:
+ minItems: 1
+ items:
+ - const: mdp0-mem
+ - const: mdp1-mem
+
+ resets:
+ items:
+ - description: MDSS_CORE reset
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - power-domains
+ - clocks
+ - interrupts
+ - interrupt-controller
+ - iommus
+ - ranges
+
+additionalProperties: true
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 06/12] dt-bindings: display/msm: split dpu-sc7180 into DPU and MDSS parts
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
In order to make the schema more readable, split dpu-sc7180 into the DPU
and MDSS parts, each one describing just a single device binding.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sc7180.yaml | 158 ------------------
.../bindings/display/msm/qcom,sc7180-dpu.yaml | 95 +++++++++++
.../display/msm/qcom,sc7180-mdss.yaml | 84 ++++++++++
3 files changed, 179 insertions(+), 158 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
deleted file mode 100644
index 99d6bbd45faf..000000000000
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
+++ /dev/null
@@ -1,158 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/display/msm/dpu-sc7180.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Display DPU dt properties for SC7180 target
-
-maintainers:
- - Krishna Manikandan <quic_mkrishn@quicinc.com>
-
-description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SC7180 target.
-
-$ref: /schemas/display/msm/mdss-common.yaml#
-
-properties:
- compatible:
- items:
- - const: qcom,sc7180-mdss
-
- clocks:
- items:
- - description: Display AHB clock from gcc
- - description: Display AHB clock from dispcc
- - description: Display core clock
-
- clock-names:
- items:
- - const: iface
- - const: ahb
- - const: core
-
- iommus:
- maxItems: 1
-
- interconnects:
- maxItems: 1
-
- interconnect-names:
- maxItems: 1
-
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- $ref: /schemas/display/msm/dpu-common.yaml#
- description: Node containing the properties of DPU.
- unevaluatedProperties: false
-
- properties:
- compatible:
- items:
- - const: qcom,sc7180-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display hf axi clock
- - description: Display ahb clock
- - description: Display rotator clock
- - description: Display lut clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: bus
- - const: iface
- - const: rot
- - const: lut
- - const: core
- - const: vsync
-
-unevaluatedProperties: false
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
- #include <dt-bindings/clock/qcom,gcc-sc7180.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interconnect/qcom,sdm845.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
-
- display-subsystem@ae00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "qcom,sc7180-mdss";
- reg = <0xae00000 0x1000>;
- reg-names = "mdss";
- power-domains = <&dispcc MDSS_GDSC>;
- clocks = <&gcc GCC_DISP_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface", "ahb", "core";
-
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
- interconnect-names = "mdp0-mem";
-
- iommus = <&apps_smmu 0x800 0x2>;
- ranges;
-
- display-controller@ae01000 {
- compatible = "qcom,sc7180-dpu";
- reg = <0x0ae01000 0x8f000>,
- <0x0aeb0000 0x2008>;
-
- reg-names = "mdp", "vbif";
-
- clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_ROT_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "bus", "iface", "rot", "lut", "core",
- "vsync";
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
- power-domains = <&rpmhpd SC7180_CX>;
- operating-points-v2 = <&mdp_opp_table>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
- };
- };
-
- port@2 {
- reg = <2>;
- dpu_intf0_out: endpoint {
- remote-endpoint = <&dp_in>;
- };
- };
- };
- };
- };
-...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
new file mode 100644
index 000000000000..bd590a6b5b96
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties for SC7180 target
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,sc7180-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+ items:
+ - description: Display hf axi clock
+ - description: Display ahb clock
+ - description: Display rotator clock
+ - description: Display lut clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+ items:
+ - const: bus
+ - const: iface
+ - const: rot
+ - const: lut
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7180.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@ae01000 {
+ compatible = "qcom,sc7180-dpu";
+ reg = <0x0ae01000 0x8f000>,
+ <0x0aeb0000 0x2008>;
+
+ reg-names = "mdp", "vbif";
+
+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_ROT_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "bus", "iface", "rot", "lut", "core",
+ "vsync";
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+ power-domains = <&rpmhpd SC7180_CX>;
+ operating-points-v2 = <&mdp_opp_table>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ endpoint {
+ remote-endpoint = <&dp_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
new file mode 100644
index 000000000000..e507c091b60f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SC7180 Display MDSS
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
+ bindings of MDSS are mentioned for SC7180 target.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,sc7180-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display AHB clock from dispcc
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: ahb
+ - const: core
+
+ iommus:
+ maxItems: 1
+
+ interconnects:
+ maxItems: 1
+
+ interconnect-names:
+ maxItems: 1
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sc7180-dpu
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7180.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interconnect/qcom,sdm845.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-subsystem@ae00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,sc7180-mdss";
+ reg = <0xae00000 0x1000>;
+ reg-names = "mdss";
+ power-domains = <&dispcc MDSS_GDSC>;
+ clocks = <&gcc GCC_DISP_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+ clock-names = "iface", "ahb", "core";
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
+ interconnect-names = "mdp0-mem";
+
+ iommus = <&apps_smmu 0x800 0x2>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 06/12] dt-bindings: display/msm: split dpu-sc7180 into DPU and MDSS parts
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
In order to make the schema more readable, split dpu-sc7180 into the DPU
and MDSS parts, each one describing just a single device binding.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sc7180.yaml | 158 ------------------
.../bindings/display/msm/qcom,sc7180-dpu.yaml | 95 +++++++++++
.../display/msm/qcom,sc7180-mdss.yaml | 84 ++++++++++
3 files changed, 179 insertions(+), 158 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
deleted file mode 100644
index 99d6bbd45faf..000000000000
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
+++ /dev/null
@@ -1,158 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/display/msm/dpu-sc7180.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Display DPU dt properties for SC7180 target
-
-maintainers:
- - Krishna Manikandan <quic_mkrishn@quicinc.com>
-
-description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SC7180 target.
-
-$ref: /schemas/display/msm/mdss-common.yaml#
-
-properties:
- compatible:
- items:
- - const: qcom,sc7180-mdss
-
- clocks:
- items:
- - description: Display AHB clock from gcc
- - description: Display AHB clock from dispcc
- - description: Display core clock
-
- clock-names:
- items:
- - const: iface
- - const: ahb
- - const: core
-
- iommus:
- maxItems: 1
-
- interconnects:
- maxItems: 1
-
- interconnect-names:
- maxItems: 1
-
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- $ref: /schemas/display/msm/dpu-common.yaml#
- description: Node containing the properties of DPU.
- unevaluatedProperties: false
-
- properties:
- compatible:
- items:
- - const: qcom,sc7180-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display hf axi clock
- - description: Display ahb clock
- - description: Display rotator clock
- - description: Display lut clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: bus
- - const: iface
- - const: rot
- - const: lut
- - const: core
- - const: vsync
-
-unevaluatedProperties: false
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
- #include <dt-bindings/clock/qcom,gcc-sc7180.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interconnect/qcom,sdm845.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
-
- display-subsystem@ae00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "qcom,sc7180-mdss";
- reg = <0xae00000 0x1000>;
- reg-names = "mdss";
- power-domains = <&dispcc MDSS_GDSC>;
- clocks = <&gcc GCC_DISP_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface", "ahb", "core";
-
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
- interconnect-names = "mdp0-mem";
-
- iommus = <&apps_smmu 0x800 0x2>;
- ranges;
-
- display-controller@ae01000 {
- compatible = "qcom,sc7180-dpu";
- reg = <0x0ae01000 0x8f000>,
- <0x0aeb0000 0x2008>;
-
- reg-names = "mdp", "vbif";
-
- clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_ROT_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "bus", "iface", "rot", "lut", "core",
- "vsync";
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
- power-domains = <&rpmhpd SC7180_CX>;
- operating-points-v2 = <&mdp_opp_table>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
- };
- };
-
- port@2 {
- reg = <2>;
- dpu_intf0_out: endpoint {
- remote-endpoint = <&dp_in>;
- };
- };
- };
- };
- };
-...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
new file mode 100644
index 000000000000..bd590a6b5b96
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties for SC7180 target
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,sc7180-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+ items:
+ - description: Display hf axi clock
+ - description: Display ahb clock
+ - description: Display rotator clock
+ - description: Display lut clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+ items:
+ - const: bus
+ - const: iface
+ - const: rot
+ - const: lut
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7180.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@ae01000 {
+ compatible = "qcom,sc7180-dpu";
+ reg = <0x0ae01000 0x8f000>,
+ <0x0aeb0000 0x2008>;
+
+ reg-names = "mdp", "vbif";
+
+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_ROT_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "bus", "iface", "rot", "lut", "core",
+ "vsync";
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+ power-domains = <&rpmhpd SC7180_CX>;
+ operating-points-v2 = <&mdp_opp_table>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ endpoint {
+ remote-endpoint = <&dp_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
new file mode 100644
index 000000000000..e507c091b60f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SC7180 Display MDSS
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
+ bindings of MDSS are mentioned for SC7180 target.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,sc7180-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display AHB clock from dispcc
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: ahb
+ - const: core
+
+ iommus:
+ maxItems: 1
+
+ interconnects:
+ maxItems: 1
+
+ interconnect-names:
+ maxItems: 1
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sc7180-dpu
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7180.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interconnect/qcom,sdm845.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-subsystem@ae00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,sc7180-mdss";
+ reg = <0xae00000 0x1000>;
+ reg-names = "mdss";
+ power-domains = <&dispcc MDSS_GDSC>;
+ clocks = <&gcc GCC_DISP_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+ clock-names = "iface", "ahb", "core";
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
+ interconnect-names = "mdp0-mem";
+
+ iommus = <&apps_smmu 0x800 0x2>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 07/12] dt-bindings: display/msm: split dpu-sc7280 into DPU and MDSS parts
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
In order to make the schema more readable, split dpu-sc7280 into the DPU
and MDSS parts, each one describing just a single device binding.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sc7280.yaml | 162 ------------------
.../bindings/display/msm/qcom,sc7280-dpu.yaml | 98 +++++++++++
.../display/msm/qcom,sc7280-mdss.yaml | 85 +++++++++
3 files changed, 183 insertions(+), 162 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
deleted file mode 100644
index 01ff88c06c51..000000000000
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
+++ /dev/null
@@ -1,162 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/display/msm/dpu-sc7280.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Display DPU dt properties for SC7280
-
-maintainers:
- - Krishna Manikandan <quic_mkrishn@quicinc.com>
-
-description: |
- Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SC7280.
-
-$ref: /schemas/display/msm/mdss-common.yaml#
-
-properties:
- compatible:
- const: qcom,sc7280-mdss
-
- clocks:
- items:
- - description: Display AHB clock from gcc
- - description: Display AHB clock from dispcc
- - description: Display core clock
-
- clock-names:
- items:
- - const: iface
- - const: ahb
- - const: core
-
- iommus:
- maxItems: 1
-
- interconnects:
- maxItems: 1
-
- interconnect-names:
- maxItems: 1
-
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- $ref: /schemas/display/msm/dpu-common.yaml#
- description: Node containing the properties of DPU.
- unevaluatedProperties: false
-
- properties:
- compatible:
- const: qcom,sc7280-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display hf axi clock
- - description: Display sf axi clock
- - description: Display ahb clock
- - description: Display lut clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: bus
- - const: nrt_bus
- - const: iface
- - const: lut
- - const: core
- - const: vsync
-
-unevaluatedProperties: false
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
- #include <dt-bindings/clock/qcom,gcc-sc7280.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interconnect/qcom,sc7280.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
-
- display-subsystem@ae00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "qcom,sc7280-mdss";
- reg = <0xae00000 0x1000>;
- reg-names = "mdss";
- power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>;
- clocks = <&gcc GCC_DISP_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface",
- "ahb",
- "core";
-
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
- interconnect-names = "mdp0-mem";
-
- iommus = <&apps_smmu 0x900 0x402>;
- ranges;
-
- display-controller@ae01000 {
- compatible = "qcom,sc7280-dpu";
- reg = <0x0ae01000 0x8f000>,
- <0x0aeb0000 0x2008>;
-
- reg-names = "mdp", "vbif";
-
- clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
- <&gcc GCC_DISP_SF_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "bus",
- "nrt_bus",
- "iface",
- "lut",
- "core",
- "vsync";
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
- power-domains = <&rpmhpd SC7280_CX>;
- operating-points-v2 = <&mdp_opp_table>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
- };
- };
-
- port@1 {
- reg = <1>;
- dpu_intf5_out: endpoint {
- remote-endpoint = <&edp_in>;
- };
- };
- };
- };
- };
-...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml
new file mode 100644
index 000000000000..924059b387b6
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml
@@ -0,0 +1,98 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sc7280-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties for SC7280
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ const: qcom,sc7280-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+ items:
+ - description: Display hf axi clock
+ - description: Display sf axi clock
+ - description: Display ahb clock
+ - description: Display lut clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+ items:
+ - const: bus
+ - const: nrt_bus
+ - const: iface
+ - const: lut
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@ae01000 {
+ compatible = "qcom,sc7280-dpu";
+ reg = <0x0ae01000 0x8f000>,
+ <0x0aeb0000 0x2008>;
+
+ reg-names = "mdp", "vbif";
+
+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&gcc GCC_DISP_SF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "bus",
+ "nrt_bus",
+ "iface",
+ "lut",
+ "core",
+ "vsync";
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+ power-domains = <&rpmhpd SC7280_CX>;
+ operating-points-v2 = <&mdp_opp_table>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ endpoint {
+ remote-endpoint = <&edp_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
new file mode 100644
index 000000000000..15c01935ac28
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sc7280-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SC7280 Display MDSS
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
+ bindings of MDSS are mentioned for SC7280.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ const: qcom,sc7280-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display AHB clock from dispcc
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: ahb
+ - const: core
+
+ iommus:
+ maxItems: 1
+
+ interconnects:
+ maxItems: 1
+
+ interconnect-names:
+ maxItems: 1
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sc7280-dpu
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interconnect/qcom,sc7280.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-subsystem@ae00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,sc7280-mdss";
+ reg = <0xae00000 0x1000>;
+ reg-names = "mdss";
+ power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>;
+ clocks = <&gcc GCC_DISP_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+ clock-names = "iface",
+ "ahb",
+ "core";
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
+ interconnect-names = "mdp0-mem";
+
+ iommus = <&apps_smmu 0x900 0x402>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 07/12] dt-bindings: display/msm: split dpu-sc7280 into DPU and MDSS parts
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
In order to make the schema more readable, split dpu-sc7280 into the DPU
and MDSS parts, each one describing just a single device binding.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sc7280.yaml | 162 ------------------
.../bindings/display/msm/qcom,sc7280-dpu.yaml | 98 +++++++++++
.../display/msm/qcom,sc7280-mdss.yaml | 85 +++++++++
3 files changed, 183 insertions(+), 162 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
deleted file mode 100644
index 01ff88c06c51..000000000000
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
+++ /dev/null
@@ -1,162 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/display/msm/dpu-sc7280.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Display DPU dt properties for SC7280
-
-maintainers:
- - Krishna Manikandan <quic_mkrishn@quicinc.com>
-
-description: |
- Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SC7280.
-
-$ref: /schemas/display/msm/mdss-common.yaml#
-
-properties:
- compatible:
- const: qcom,sc7280-mdss
-
- clocks:
- items:
- - description: Display AHB clock from gcc
- - description: Display AHB clock from dispcc
- - description: Display core clock
-
- clock-names:
- items:
- - const: iface
- - const: ahb
- - const: core
-
- iommus:
- maxItems: 1
-
- interconnects:
- maxItems: 1
-
- interconnect-names:
- maxItems: 1
-
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- $ref: /schemas/display/msm/dpu-common.yaml#
- description: Node containing the properties of DPU.
- unevaluatedProperties: false
-
- properties:
- compatible:
- const: qcom,sc7280-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display hf axi clock
- - description: Display sf axi clock
- - description: Display ahb clock
- - description: Display lut clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: bus
- - const: nrt_bus
- - const: iface
- - const: lut
- - const: core
- - const: vsync
-
-unevaluatedProperties: false
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
- #include <dt-bindings/clock/qcom,gcc-sc7280.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interconnect/qcom,sc7280.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
-
- display-subsystem@ae00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "qcom,sc7280-mdss";
- reg = <0xae00000 0x1000>;
- reg-names = "mdss";
- power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>;
- clocks = <&gcc GCC_DISP_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface",
- "ahb",
- "core";
-
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
- interconnect-names = "mdp0-mem";
-
- iommus = <&apps_smmu 0x900 0x402>;
- ranges;
-
- display-controller@ae01000 {
- compatible = "qcom,sc7280-dpu";
- reg = <0x0ae01000 0x8f000>,
- <0x0aeb0000 0x2008>;
-
- reg-names = "mdp", "vbif";
-
- clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
- <&gcc GCC_DISP_SF_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "bus",
- "nrt_bus",
- "iface",
- "lut",
- "core",
- "vsync";
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
- power-domains = <&rpmhpd SC7280_CX>;
- operating-points-v2 = <&mdp_opp_table>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
- };
- };
-
- port@1 {
- reg = <1>;
- dpu_intf5_out: endpoint {
- remote-endpoint = <&edp_in>;
- };
- };
- };
- };
- };
-...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml
new file mode 100644
index 000000000000..924059b387b6
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml
@@ -0,0 +1,98 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sc7280-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties for SC7280
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ const: qcom,sc7280-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+ items:
+ - description: Display hf axi clock
+ - description: Display sf axi clock
+ - description: Display ahb clock
+ - description: Display lut clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+ items:
+ - const: bus
+ - const: nrt_bus
+ - const: iface
+ - const: lut
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@ae01000 {
+ compatible = "qcom,sc7280-dpu";
+ reg = <0x0ae01000 0x8f000>,
+ <0x0aeb0000 0x2008>;
+
+ reg-names = "mdp", "vbif";
+
+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&gcc GCC_DISP_SF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "bus",
+ "nrt_bus",
+ "iface",
+ "lut",
+ "core",
+ "vsync";
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+ power-domains = <&rpmhpd SC7280_CX>;
+ operating-points-v2 = <&mdp_opp_table>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ endpoint {
+ remote-endpoint = <&edp_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
new file mode 100644
index 000000000000..15c01935ac28
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sc7280-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SC7280 Display MDSS
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
+ bindings of MDSS are mentioned for SC7280.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ const: qcom,sc7280-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display AHB clock from dispcc
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: ahb
+ - const: core
+
+ iommus:
+ maxItems: 1
+
+ interconnects:
+ maxItems: 1
+
+ interconnect-names:
+ maxItems: 1
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sc7280-dpu
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interconnect/qcom,sc7280.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-subsystem@ae00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,sc7280-mdss";
+ reg = <0xae00000 0x1000>;
+ reg-names = "mdss";
+ power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>;
+ clocks = <&gcc GCC_DISP_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+ clock-names = "iface",
+ "ahb",
+ "core";
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
+ interconnect-names = "mdp0-mem";
+
+ iommus = <&apps_smmu 0x900 0x402>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 08/12] dt-bindings: display/msm: split dpu-sdm845 into DPU and MDSS parts
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
In order to make the schema more readable, split dpu-sdm845 into the DPU
and MDSS parts, each one describing just a single device binding.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sdm845.yaml | 148 ------------------
.../bindings/display/msm/qcom,sdm845-dpu.yaml | 90 +++++++++++
.../display/msm/qcom,sdm845-mdss.yaml | 79 ++++++++++
3 files changed, 169 insertions(+), 148 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
deleted file mode 100644
index ae649bb6aa81..000000000000
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ /dev/null
@@ -1,148 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/display/msm/dpu-sdm845.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Display DPU dt properties for SDM845 target
-
-maintainers:
- - Krishna Manikandan <quic_mkrishn@quicinc.com>
-
-description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SDM845 target.
-
-$ref: /schemas/display/msm/mdss-common.yaml#
-
-properties:
- compatible:
- items:
- - const: qcom,sdm845-mdss
-
- clocks:
- items:
- - description: Display AHB clock from gcc
- - description: Display core clock
-
- clock-names:
- items:
- - const: iface
- - const: core
-
- iommus:
- maxItems: 2
-
- interconnects:
- maxItems: 2
-
- interconnect-names:
- maxItems: 2
-
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- $ref: /schemas/display/msm/dpu-common.yaml#
- description: Node containing the properties of DPU.
- unevaluatedProperties: false
-
- properties:
- compatible:
- items:
- - const: qcom,sdm845-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display GCC bus clock
- - description: Display ahb clock
- - description: Display axi clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: gcc-bus
- - const: iface
- - const: bus
- - const: core
- - const: vsync
-
-unevaluatedProperties: false
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
- #include <dt-bindings/clock/qcom,gcc-sdm845.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
-
- display-subsystem@ae00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "qcom,sdm845-mdss";
- reg = <0x0ae00000 0x1000>;
- reg-names = "mdss";
- power-domains = <&dispcc MDSS_GDSC>;
-
- clocks = <&gcc GCC_DISP_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface", "core";
-
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- iommus = <&apps_smmu 0x880 0x8>,
- <&apps_smmu 0xc80 0x8>;
- ranges;
-
- display-controller@ae01000 {
- compatible = "qcom,sdm845-dpu";
- reg = <0x0ae01000 0x8f000>,
- <0x0aeb0000 0x2008>;
- reg-names = "mdp", "vbif";
-
- clocks = <&gcc GCC_DISP_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&mdp_opp_table>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
- };
- };
-
- port@1 {
- reg = <1>;
- dpu_intf2_out: endpoint {
- remote-endpoint = <&dsi1_in>;
- };
- };
- };
- };
- };
-...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml
new file mode 100644
index 000000000000..5719b45f2860
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties for SDM845 target
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,sdm845-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+ items:
+ - description: Display GCC bus clock
+ - description: Display ahb clock
+ - description: Display axi clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+ items:
+ - const: gcc-bus
+ - const: iface
+ - const: bus
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
+ #include <dt-bindings/clock/qcom,gcc-sdm845.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@ae01000 {
+ compatible = "qcom,sdm845-dpu";
+ reg = <0x0ae01000 0x8f000>,
+ <0x0aeb0000 0x2008>;
+ reg-names = "mdp", "vbif";
+
+ clocks = <&gcc GCC_DISP_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&mdp_opp_table>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ endpoint {
+ remote-endpoint = <&dsi1_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
new file mode 100644
index 000000000000..b16622f0d41e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SDM845 Display MDSS
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
+ bindings of MDSS are mentioned for SDM845 target.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,sdm845-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: core
+
+ iommus:
+ maxItems: 2
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ maxItems: 2
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sdm845-dpu
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
+ #include <dt-bindings/clock/qcom,gcc-sdm845.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-subsystem@ae00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,sdm845-mdss";
+ reg = <0x0ae00000 0x1000>;
+ reg-names = "mdss";
+ power-domains = <&dispcc MDSS_GDSC>;
+
+ clocks = <&gcc GCC_DISP_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+ clock-names = "iface", "core";
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ iommus = <&apps_smmu 0x880 0x8>,
+ <&apps_smmu 0xc80 0x8>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 08/12] dt-bindings: display/msm: split dpu-sdm845 into DPU and MDSS parts
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
In order to make the schema more readable, split dpu-sdm845 into the DPU
and MDSS parts, each one describing just a single device binding.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sdm845.yaml | 148 ------------------
.../bindings/display/msm/qcom,sdm845-dpu.yaml | 90 +++++++++++
.../display/msm/qcom,sdm845-mdss.yaml | 79 ++++++++++
3 files changed, 169 insertions(+), 148 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
deleted file mode 100644
index ae649bb6aa81..000000000000
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ /dev/null
@@ -1,148 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/display/msm/dpu-sdm845.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Display DPU dt properties for SDM845 target
-
-maintainers:
- - Krishna Manikandan <quic_mkrishn@quicinc.com>
-
-description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SDM845 target.
-
-$ref: /schemas/display/msm/mdss-common.yaml#
-
-properties:
- compatible:
- items:
- - const: qcom,sdm845-mdss
-
- clocks:
- items:
- - description: Display AHB clock from gcc
- - description: Display core clock
-
- clock-names:
- items:
- - const: iface
- - const: core
-
- iommus:
- maxItems: 2
-
- interconnects:
- maxItems: 2
-
- interconnect-names:
- maxItems: 2
-
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- $ref: /schemas/display/msm/dpu-common.yaml#
- description: Node containing the properties of DPU.
- unevaluatedProperties: false
-
- properties:
- compatible:
- items:
- - const: qcom,sdm845-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display GCC bus clock
- - description: Display ahb clock
- - description: Display axi clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: gcc-bus
- - const: iface
- - const: bus
- - const: core
- - const: vsync
-
-unevaluatedProperties: false
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
- #include <dt-bindings/clock/qcom,gcc-sdm845.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
-
- display-subsystem@ae00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "qcom,sdm845-mdss";
- reg = <0x0ae00000 0x1000>;
- reg-names = "mdss";
- power-domains = <&dispcc MDSS_GDSC>;
-
- clocks = <&gcc GCC_DISP_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface", "core";
-
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- iommus = <&apps_smmu 0x880 0x8>,
- <&apps_smmu 0xc80 0x8>;
- ranges;
-
- display-controller@ae01000 {
- compatible = "qcom,sdm845-dpu";
- reg = <0x0ae01000 0x8f000>,
- <0x0aeb0000 0x2008>;
- reg-names = "mdp", "vbif";
-
- clocks = <&gcc GCC_DISP_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&mdp_opp_table>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
- };
- };
-
- port@1 {
- reg = <1>;
- dpu_intf2_out: endpoint {
- remote-endpoint = <&dsi1_in>;
- };
- };
- };
- };
- };
-...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml
new file mode 100644
index 000000000000..5719b45f2860
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties for SDM845 target
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,sdm845-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+ items:
+ - description: Display GCC bus clock
+ - description: Display ahb clock
+ - description: Display axi clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+ items:
+ - const: gcc-bus
+ - const: iface
+ - const: bus
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
+ #include <dt-bindings/clock/qcom,gcc-sdm845.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@ae01000 {
+ compatible = "qcom,sdm845-dpu";
+ reg = <0x0ae01000 0x8f000>,
+ <0x0aeb0000 0x2008>;
+ reg-names = "mdp", "vbif";
+
+ clocks = <&gcc GCC_DISP_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&mdp_opp_table>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ endpoint {
+ remote-endpoint = <&dsi1_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
new file mode 100644
index 000000000000..b16622f0d41e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SDM845 Display MDSS
+
+maintainers:
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
+ bindings of MDSS are mentioned for SDM845 target.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,sdm845-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: core
+
+ iommus:
+ maxItems: 2
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ maxItems: 2
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sdm845-dpu
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
+ #include <dt-bindings/clock/qcom,gcc-sdm845.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-subsystem@ae00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,sdm845-mdss";
+ reg = <0x0ae00000 0x1000>;
+ reg-names = "mdss";
+ power-domains = <&dispcc MDSS_GDSC>;
+
+ clocks = <&gcc GCC_DISP_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+ clock-names = "iface", "core";
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ iommus = <&apps_smmu 0x880 0x8>,
+ <&apps_smmu 0xc80 0x8>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 09/12] dt-bindings: display/msm: split dpu-msm8998 into DPU and MDSS parts
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
In order to make the schema more readable, split dpu-msm8998 into the DPU
and MDSS parts, each one describing just a single device binding.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-msm8998.yaml | 150 ------------------
.../display/msm/qcom,msm8998-dpu.yaml | 95 +++++++++++
.../display/msm/qcom,msm8998-mdss.yaml | 75 +++++++++
3 files changed, 170 insertions(+), 150 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
deleted file mode 100644
index 67791dbc3b5d..000000000000
--- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
+++ /dev/null
@@ -1,150 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/display/msm/dpu-msm8998.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Display DPU dt properties for MSM8998 target
-
-maintainers:
- - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
-
-description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for MSM8998 target.
-
-$ref: /schemas/display/msm/mdss-common.yaml#
-
-properties:
- compatible:
- items:
- - const: qcom,msm8998-mdss
-
- clocks:
- items:
- - description: Display AHB clock
- - description: Display AXI clock
- - description: Display core clock
-
- clock-names:
- items:
- - const: iface
- - const: bus
- - const: core
-
- iommus:
- maxItems: 1
-
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- $ref: /schemas/display/msm/dpu-common.yaml#
- description: Node containing the properties of DPU.
- unevaluatedProperties: false
-
- properties:
- compatible:
- items:
- - const: qcom,msm8998-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for regdma register set
- - description: Address offset and size for vbif register set
- - description: Address offset and size for non-realtime vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: regdma
- - const: vbif
- - const: vbif_nrt
-
- clocks:
- items:
- - description: Display ahb clock
- - description: Display axi clock
- - description: Display mem-noc clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: iface
- - const: bus
- - const: mnoc
- - const: core
- - const: vsync
-
-unevaluatedProperties: false
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
-
- mdss: display-subsystem@c900000 {
- compatible = "qcom,msm8998-mdss";
- reg = <0x0c900000 0x1000>;
- reg-names = "mdss";
-
- clocks = <&mmcc MDSS_AHB_CLK>,
- <&mmcc MDSS_AXI_CLK>,
- <&mmcc MDSS_MDP_CLK>;
- clock-names = "iface", "bus", "core";
-
- #address-cells = <1>;
- #interrupt-cells = <1>;
- #size-cells = <1>;
-
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- iommus = <&mmss_smmu 0>;
-
- power-domains = <&mmcc MDSS_GDSC>;
- ranges;
-
- display-controller@c901000 {
- compatible = "qcom,msm8998-dpu";
- reg = <0x0c901000 0x8f000>,
- <0x0c9a8e00 0xf0>,
- <0x0c9b0000 0x2008>,
- <0x0c9b8000 0x1040>;
- reg-names = "mdp", "regdma", "vbif", "vbif_nrt";
-
- clocks = <&mmcc MDSS_AHB_CLK>,
- <&mmcc MDSS_AXI_CLK>,
- <&mmcc MNOC_AHB_CLK>,
- <&mmcc MDSS_MDP_CLK>,
- <&mmcc MDSS_VSYNC_CLK>;
- clock-names = "iface", "bus", "mnoc", "core", "vsync";
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
- operating-points-v2 = <&mdp_opp_table>;
- power-domains = <&rpmpd MSM8998_VDDMX>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
- };
- };
-
- port@1 {
- reg = <1>;
- dpu_intf2_out: endpoint {
- remote-endpoint = <&dsi1_in>;
- };
- };
- };
- };
- };
-...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml
new file mode 100644
index 000000000000..b02adba36e9e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties for MSM8998 target
+
+maintainers:
+ - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,msm8998-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for regdma register set
+ - description: Address offset and size for vbif register set
+ - description: Address offset and size for non-realtime vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: regdma
+ - const: vbif
+ - const: vbif_nrt
+
+ clocks:
+ items:
+ - description: Display ahb clock
+ - description: Display axi clock
+ - description: Display mem-noc clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: mnoc
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@c901000 {
+ compatible = "qcom,msm8998-dpu";
+ reg = <0x0c901000 0x8f000>,
+ <0x0c9a8e00 0xf0>,
+ <0x0c9b0000 0x2008>,
+ <0x0c9b8000 0x1040>;
+ reg-names = "mdp", "regdma", "vbif", "vbif_nrt";
+
+ clocks = <&mmcc MDSS_AHB_CLK>,
+ <&mmcc MDSS_AXI_CLK>,
+ <&mmcc MNOC_AHB_CLK>,
+ <&mmcc MDSS_MDP_CLK>,
+ <&mmcc MDSS_VSYNC_CLK>;
+ clock-names = "iface", "bus", "mnoc", "core", "vsync";
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+ operating-points-v2 = <&mdp_opp_table>;
+ power-domains = <&rpmpd MSM8998_VDDMX>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ endpoint {
+ remote-endpoint = <&dsi1_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
new file mode 100644
index 000000000000..c2550cfb797e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,msm8998-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm MSM8998 Display MDSS
+
+maintainers:
+ - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
+ bindings of MDSS are mentioned for MSM8998 target.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,msm8998-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock
+ - description: Display AXI clock
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: core
+
+ iommus:
+ maxItems: 1
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,msm8998-dpu
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-subsystem@c900000 {
+ compatible = "qcom,msm8998-mdss";
+ reg = <0x0c900000 0x1000>;
+ reg-names = "mdss";
+
+ clocks = <&mmcc MDSS_AHB_CLK>,
+ <&mmcc MDSS_AXI_CLK>,
+ <&mmcc MDSS_MDP_CLK>;
+ clock-names = "iface", "bus", "core";
+
+ #address-cells = <1>;
+ #interrupt-cells = <1>;
+ #size-cells = <1>;
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ iommus = <&mmss_smmu 0>;
+
+ power-domains = <&mmcc MDSS_GDSC>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 09/12] dt-bindings: display/msm: split dpu-msm8998 into DPU and MDSS parts
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
In order to make the schema more readable, split dpu-msm8998 into the DPU
and MDSS parts, each one describing just a single device binding.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-msm8998.yaml | 150 ------------------
.../display/msm/qcom,msm8998-dpu.yaml | 95 +++++++++++
.../display/msm/qcom,msm8998-mdss.yaml | 75 +++++++++
3 files changed, 170 insertions(+), 150 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
deleted file mode 100644
index 67791dbc3b5d..000000000000
--- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
+++ /dev/null
@@ -1,150 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/display/msm/dpu-msm8998.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Display DPU dt properties for MSM8998 target
-
-maintainers:
- - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
-
-description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for MSM8998 target.
-
-$ref: /schemas/display/msm/mdss-common.yaml#
-
-properties:
- compatible:
- items:
- - const: qcom,msm8998-mdss
-
- clocks:
- items:
- - description: Display AHB clock
- - description: Display AXI clock
- - description: Display core clock
-
- clock-names:
- items:
- - const: iface
- - const: bus
- - const: core
-
- iommus:
- maxItems: 1
-
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- $ref: /schemas/display/msm/dpu-common.yaml#
- description: Node containing the properties of DPU.
- unevaluatedProperties: false
-
- properties:
- compatible:
- items:
- - const: qcom,msm8998-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for regdma register set
- - description: Address offset and size for vbif register set
- - description: Address offset and size for non-realtime vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: regdma
- - const: vbif
- - const: vbif_nrt
-
- clocks:
- items:
- - description: Display ahb clock
- - description: Display axi clock
- - description: Display mem-noc clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: iface
- - const: bus
- - const: mnoc
- - const: core
- - const: vsync
-
-unevaluatedProperties: false
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
-
- mdss: display-subsystem@c900000 {
- compatible = "qcom,msm8998-mdss";
- reg = <0x0c900000 0x1000>;
- reg-names = "mdss";
-
- clocks = <&mmcc MDSS_AHB_CLK>,
- <&mmcc MDSS_AXI_CLK>,
- <&mmcc MDSS_MDP_CLK>;
- clock-names = "iface", "bus", "core";
-
- #address-cells = <1>;
- #interrupt-cells = <1>;
- #size-cells = <1>;
-
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- iommus = <&mmss_smmu 0>;
-
- power-domains = <&mmcc MDSS_GDSC>;
- ranges;
-
- display-controller@c901000 {
- compatible = "qcom,msm8998-dpu";
- reg = <0x0c901000 0x8f000>,
- <0x0c9a8e00 0xf0>,
- <0x0c9b0000 0x2008>,
- <0x0c9b8000 0x1040>;
- reg-names = "mdp", "regdma", "vbif", "vbif_nrt";
-
- clocks = <&mmcc MDSS_AHB_CLK>,
- <&mmcc MDSS_AXI_CLK>,
- <&mmcc MNOC_AHB_CLK>,
- <&mmcc MDSS_MDP_CLK>,
- <&mmcc MDSS_VSYNC_CLK>;
- clock-names = "iface", "bus", "mnoc", "core", "vsync";
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
- operating-points-v2 = <&mdp_opp_table>;
- power-domains = <&rpmpd MSM8998_VDDMX>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
- };
- };
-
- port@1 {
- reg = <1>;
- dpu_intf2_out: endpoint {
- remote-endpoint = <&dsi1_in>;
- };
- };
- };
- };
- };
-...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml
new file mode 100644
index 000000000000..b02adba36e9e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties for MSM8998 target
+
+maintainers:
+ - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,msm8998-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for regdma register set
+ - description: Address offset and size for vbif register set
+ - description: Address offset and size for non-realtime vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: regdma
+ - const: vbif
+ - const: vbif_nrt
+
+ clocks:
+ items:
+ - description: Display ahb clock
+ - description: Display axi clock
+ - description: Display mem-noc clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: mnoc
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@c901000 {
+ compatible = "qcom,msm8998-dpu";
+ reg = <0x0c901000 0x8f000>,
+ <0x0c9a8e00 0xf0>,
+ <0x0c9b0000 0x2008>,
+ <0x0c9b8000 0x1040>;
+ reg-names = "mdp", "regdma", "vbif", "vbif_nrt";
+
+ clocks = <&mmcc MDSS_AHB_CLK>,
+ <&mmcc MDSS_AXI_CLK>,
+ <&mmcc MNOC_AHB_CLK>,
+ <&mmcc MDSS_MDP_CLK>,
+ <&mmcc MDSS_VSYNC_CLK>;
+ clock-names = "iface", "bus", "mnoc", "core", "vsync";
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+ operating-points-v2 = <&mdp_opp_table>;
+ power-domains = <&rpmpd MSM8998_VDDMX>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ endpoint {
+ remote-endpoint = <&dsi1_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
new file mode 100644
index 000000000000..c2550cfb797e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,msm8998-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm MSM8998 Display MDSS
+
+maintainers:
+ - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
+ bindings of MDSS are mentioned for MSM8998 target.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,msm8998-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock
+ - description: Display AXI clock
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: core
+
+ iommus:
+ maxItems: 1
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,msm8998-dpu
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-subsystem@c900000 {
+ compatible = "qcom,msm8998-mdss";
+ reg = <0x0c900000 0x1000>;
+ reg-names = "mdss";
+
+ clocks = <&mmcc MDSS_AHB_CLK>,
+ <&mmcc MDSS_AXI_CLK>,
+ <&mmcc MDSS_MDP_CLK>;
+ clock-names = "iface", "bus", "core";
+
+ #address-cells = <1>;
+ #interrupt-cells = <1>;
+ #size-cells = <1>;
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ iommus = <&mmss_smmu 0>;
+
+ power-domains = <&mmcc MDSS_GDSC>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 10/12] dt-bindings: display/msm: split dpu-qcm2290 into DPU and MDSS parts
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
In order to make the schema more readable, split dpu-qcm2290 into the DPU
and MDSS parts, each one describing just a single device binding.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-qcm2290.yaml | 148 ------------------
.../display/msm/qcom,qcm2290-dpu.yaml | 84 ++++++++++
.../display/msm/qcom,qcm2290-mdss.yaml | 85 ++++++++++
3 files changed, 169 insertions(+), 148 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
deleted file mode 100644
index 42e676bdda4e..000000000000
--- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
+++ /dev/null
@@ -1,148 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/display/msm/dpu-qcm2290.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Display DPU dt properties for QCM2290 target
-
-maintainers:
- - Loic Poulain <loic.poulain@linaro.org>
-
-description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
- and DPU are mentioned for QCM2290 target.
-
-$ref: /schemas/display/msm/mdss-common.yaml#
-
-properties:
- compatible:
- items:
- - const: qcom,qcm2290-mdss
-
- clocks:
- items:
- - description: Display AHB clock from gcc
- - description: Display AXI clock
- - description: Display core clock
-
- clock-names:
- items:
- - const: iface
- - const: bus
- - const: core
-
- iommus:
- maxItems: 2
-
- interconnects:
- maxItems: 1
-
- interconnect-names:
- maxItems: 1
-
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- $ref: /schemas/display/msm/dpu-common.yaml#
- description: Node containing the properties of DPU.
- unevaluatedProperties: false
-
- properties:
- compatible:
- items:
- - const: qcom,qcm2290-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display AXI clock from gcc
- - description: Display AHB clock from dispcc
- - description: Display core clock from dispcc
- - description: Display lut clock from dispcc
- - description: Display vsync clock from dispcc
-
- clock-names:
- items:
- - const: bus
- - const: iface
- - const: core
- - const: lut
- - const: vsync
-
-unevaluatedProperties: false
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
- #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interconnect/qcom,qcm2290.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
-
- mdss: mdss@5e00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "qcom,qcm2290-mdss";
- reg = <0x05e00000 0x1000>;
- reg-names = "mdss";
- power-domains = <&dispcc MDSS_GDSC>;
- clocks = <&gcc GCC_DISP_AHB_CLK>,
- <&gcc GCC_DISP_HF_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface", "bus", "core";
-
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>;
- interconnect-names = "mdp0-mem";
-
- iommus = <&apps_smmu 0x420 0x2>,
- <&apps_smmu 0x421 0x0>;
- ranges;
-
- mdss_mdp: display-controller@5e01000 {
- compatible = "qcom,qcm2290-dpu";
- reg = <0x05e01000 0x8f000>,
- <0x05eb0000 0x2008>;
- reg-names = "mdp", "vbif";
-
- clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "bus", "iface", "core", "lut", "vsync";
-
- operating-points-v2 = <&mdp_opp_table>;
- power-domains = <&rpmpd QCM2290_VDDCX>;
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
- };
- };
- };
- };
- };
-...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml
new file mode 100644
index 000000000000..a7b382f01b56
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties for QCM2290 target
+
+maintainers:
+ - Loic Poulain <loic.poulain@linaro.org>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,qcm2290-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+ items:
+ - description: Display AXI clock from gcc
+ - description: Display AHB clock from dispcc
+ - description: Display core clock from dispcc
+ - description: Display lut clock from dispcc
+ - description: Display vsync clock from dispcc
+
+ clock-names:
+ items:
+ - const: bus
+ - const: iface
+ - const: core
+ - const: lut
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
+ #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@5e01000 {
+ compatible = "qcom,qcm2290-dpu";
+ reg = <0x05e01000 0x8f000>,
+ <0x05eb0000 0x2008>;
+ reg-names = "mdp", "vbif";
+
+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "bus", "iface", "core", "lut", "vsync";
+
+ operating-points-v2 = <&mdp_opp_table>;
+ power-domains = <&rpmpd QCM2290_VDDCX>;
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
new file mode 100644
index 000000000000..c821220eef55
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm QCM220 Display MDSS
+
+maintainers:
+ - Loic Poulain <loic.poulain@linaro.org>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
+ are mentioned for QCM2290 target.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,qcm2290-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display AXI clock
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: core
+
+ iommus:
+ maxItems: 2
+
+ interconnects:
+ maxItems: 1
+
+ interconnect-names:
+ maxItems: 1
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,qcm2290-dpu
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
+ #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interconnect/qcom,qcm2290.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ mdss@5e00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,qcm2290-mdss";
+ reg = <0x05e00000 0x1000>;
+ reg-names = "mdss";
+ power-domains = <&dispcc MDSS_GDSC>;
+ clocks = <&gcc GCC_DISP_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+ clock-names = "iface", "bus", "core";
+
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>;
+ interconnect-names = "mdp0-mem";
+
+ iommus = <&apps_smmu 0x420 0x2>,
+ <&apps_smmu 0x421 0x0>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 10/12] dt-bindings: display/msm: split dpu-qcm2290 into DPU and MDSS parts
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
In order to make the schema more readable, split dpu-qcm2290 into the DPU
and MDSS parts, each one describing just a single device binding.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-qcm2290.yaml | 148 ------------------
.../display/msm/qcom,qcm2290-dpu.yaml | 84 ++++++++++
.../display/msm/qcom,qcm2290-mdss.yaml | 85 ++++++++++
3 files changed, 169 insertions(+), 148 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
deleted file mode 100644
index 42e676bdda4e..000000000000
--- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
+++ /dev/null
@@ -1,148 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/display/msm/dpu-qcm2290.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Display DPU dt properties for QCM2290 target
-
-maintainers:
- - Loic Poulain <loic.poulain@linaro.org>
-
-description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
- and DPU are mentioned for QCM2290 target.
-
-$ref: /schemas/display/msm/mdss-common.yaml#
-
-properties:
- compatible:
- items:
- - const: qcom,qcm2290-mdss
-
- clocks:
- items:
- - description: Display AHB clock from gcc
- - description: Display AXI clock
- - description: Display core clock
-
- clock-names:
- items:
- - const: iface
- - const: bus
- - const: core
-
- iommus:
- maxItems: 2
-
- interconnects:
- maxItems: 1
-
- interconnect-names:
- maxItems: 1
-
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- $ref: /schemas/display/msm/dpu-common.yaml#
- description: Node containing the properties of DPU.
- unevaluatedProperties: false
-
- properties:
- compatible:
- items:
- - const: qcom,qcm2290-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display AXI clock from gcc
- - description: Display AHB clock from dispcc
- - description: Display core clock from dispcc
- - description: Display lut clock from dispcc
- - description: Display vsync clock from dispcc
-
- clock-names:
- items:
- - const: bus
- - const: iface
- - const: core
- - const: lut
- - const: vsync
-
-unevaluatedProperties: false
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
- #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interconnect/qcom,qcm2290.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
-
- mdss: mdss@5e00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "qcom,qcm2290-mdss";
- reg = <0x05e00000 0x1000>;
- reg-names = "mdss";
- power-domains = <&dispcc MDSS_GDSC>;
- clocks = <&gcc GCC_DISP_AHB_CLK>,
- <&gcc GCC_DISP_HF_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface", "bus", "core";
-
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>;
- interconnect-names = "mdp0-mem";
-
- iommus = <&apps_smmu 0x420 0x2>,
- <&apps_smmu 0x421 0x0>;
- ranges;
-
- mdss_mdp: display-controller@5e01000 {
- compatible = "qcom,qcm2290-dpu";
- reg = <0x05e01000 0x8f000>,
- <0x05eb0000 0x2008>;
- reg-names = "mdp", "vbif";
-
- clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "bus", "iface", "core", "lut", "vsync";
-
- operating-points-v2 = <&mdp_opp_table>;
- power-domains = <&rpmpd QCM2290_VDDCX>;
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
- };
- };
- };
- };
- };
-...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml
new file mode 100644
index 000000000000..a7b382f01b56
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties for QCM2290 target
+
+maintainers:
+ - Loic Poulain <loic.poulain@linaro.org>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,qcm2290-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+ items:
+ - description: Display AXI clock from gcc
+ - description: Display AHB clock from dispcc
+ - description: Display core clock from dispcc
+ - description: Display lut clock from dispcc
+ - description: Display vsync clock from dispcc
+
+ clock-names:
+ items:
+ - const: bus
+ - const: iface
+ - const: core
+ - const: lut
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
+ #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@5e01000 {
+ compatible = "qcom,qcm2290-dpu";
+ reg = <0x05e01000 0x8f000>,
+ <0x05eb0000 0x2008>;
+ reg-names = "mdp", "vbif";
+
+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "bus", "iface", "core", "lut", "vsync";
+
+ operating-points-v2 = <&mdp_opp_table>;
+ power-domains = <&rpmpd QCM2290_VDDCX>;
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
new file mode 100644
index 000000000000..c821220eef55
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm QCM220 Display MDSS
+
+maintainers:
+ - Loic Poulain <loic.poulain@linaro.org>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
+ are mentioned for QCM2290 target.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,qcm2290-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display AXI clock
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: core
+
+ iommus:
+ maxItems: 2
+
+ interconnects:
+ maxItems: 1
+
+ interconnect-names:
+ maxItems: 1
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,qcm2290-dpu
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
+ #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interconnect/qcom,qcm2290.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ mdss@5e00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,qcm2290-mdss";
+ reg = <0x05e00000 0x1000>;
+ reg-names = "mdss";
+ power-domains = <&dispcc MDSS_GDSC>;
+ clocks = <&gcc GCC_DISP_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+ clock-names = "iface", "bus", "core";
+
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>;
+ interconnect-names = "mdp0-mem";
+
+ iommus = <&apps_smmu 0x420 0x2>,
+ <&apps_smmu 0x421 0x0>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 11/12] dt-bindings: display/msm: add missing device nodes to mdss-* schemas
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno, Rob Herring
Add missing device nodes (DSI, PHYs, DP/eDP) to the existing MDSS
schemas.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../display/msm/qcom,msm8998-mdss.yaml | 12 +++++++++
.../display/msm/qcom,qcm2290-mdss.yaml | 6 +++++
.../display/msm/qcom,sc7180-mdss.yaml | 18 +++++++++++++
.../display/msm/qcom,sc7280-mdss.yaml | 26 +++++++++++++++++++
.../display/msm/qcom,sdm845-mdss.yaml | 12 +++++++++
5 files changed, 74 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
index c2550cfb797e..f749821725b1 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
@@ -43,6 +43,18 @@ patternProperties:
compatible:
const: qcom,msm8998-dpu
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^phy@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,dsi-phy-10nm-8998
+
unevaluatedProperties: false
examples:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
index c821220eef55..10883e976380 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
@@ -49,6 +49,12 @@ patternProperties:
compatible:
const: qcom,qcm2290-dpu
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,dsi-ctrl-6g-qcm2290
+
unevaluatedProperties: false
examples:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
index e507c091b60f..8a72631a863b 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
@@ -49,6 +49,24 @@ patternProperties:
compatible:
const: qcom,sc7180-dpu
+ "^displayport-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sc7180-dp
+
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^dsi-phy@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,dsi-phy-10nm
+
unevaluatedProperties: false
examples:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
index 15c01935ac28..0173cbe3730f 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
@@ -48,6 +48,32 @@ patternProperties:
compatible:
const: qcom,sc7280-dpu
+ "^displayport-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sc7280-dp
+
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^edp@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sc7280-edp
+
+ "^phy@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,sc7280-dsi-phy-7nm
+ - qcom,sc7280-edp-phy
+
unevaluatedProperties: false
examples:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
index b16622f0d41e..f19a34d7fd6c 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
@@ -47,6 +47,18 @@ patternProperties:
compatible:
const: qcom,sdm845-dpu
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^dsi-phy@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,dsi-phy-10nm
+
unevaluatedProperties: false
examples:
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 11/12] dt-bindings: display/msm: add missing device nodes to mdss-* schemas
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Add missing device nodes (DSI, PHYs, DP/eDP) to the existing MDSS
schemas.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../display/msm/qcom,msm8998-mdss.yaml | 12 +++++++++
.../display/msm/qcom,qcm2290-mdss.yaml | 6 +++++
.../display/msm/qcom,sc7180-mdss.yaml | 18 +++++++++++++
.../display/msm/qcom,sc7280-mdss.yaml | 26 +++++++++++++++++++
.../display/msm/qcom,sdm845-mdss.yaml | 12 +++++++++
5 files changed, 74 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
index c2550cfb797e..f749821725b1 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
@@ -43,6 +43,18 @@ patternProperties:
compatible:
const: qcom,msm8998-dpu
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^phy@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,dsi-phy-10nm-8998
+
unevaluatedProperties: false
examples:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
index c821220eef55..10883e976380 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
@@ -49,6 +49,12 @@ patternProperties:
compatible:
const: qcom,qcm2290-dpu
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,dsi-ctrl-6g-qcm2290
+
unevaluatedProperties: false
examples:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
index e507c091b60f..8a72631a863b 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
@@ -49,6 +49,24 @@ patternProperties:
compatible:
const: qcom,sc7180-dpu
+ "^displayport-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sc7180-dp
+
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^dsi-phy@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,dsi-phy-10nm
+
unevaluatedProperties: false
examples:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
index 15c01935ac28..0173cbe3730f 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
@@ -48,6 +48,32 @@ patternProperties:
compatible:
const: qcom,sc7280-dpu
+ "^displayport-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sc7280-dp
+
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^edp@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sc7280-edp
+
+ "^phy@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,sc7280-dsi-phy-7nm
+ - qcom,sc7280-edp-phy
+
unevaluatedProperties: false
examples:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
index b16622f0d41e..f19a34d7fd6c 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
@@ -47,6 +47,18 @@ patternProperties:
compatible:
const: qcom,sdm845-dpu
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^dsi-phy@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,dsi-phy-10nm
+
unevaluatedProperties: false
examples:
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 12/12] dt-bindings: display/msm: add support for the display on SM8250
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-15 13:37 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm
SM8250 platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/mdss-common.yaml | 4 +-
.../bindings/display/msm/qcom,sm8250-dpu.yaml | 92 ++++++++++++++++
.../display/msm/qcom,sm8250-mdss.yaml | 103 ++++++++++++++++++
3 files changed, 197 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
index 2a476bd0215e..27d7242657b2 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
@@ -27,11 +27,11 @@ properties:
clocks:
minItems: 2
- maxItems: 3
+ maxItems: 4
clock-names:
minItems: 2
- maxItems: 3
+ maxItems: 4
interrupts:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
new file mode 100644
index 000000000000..9ff8a265c85f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
@@ -0,0 +1,92 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SM8250 Display DPU
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ const: qcom,sm8250-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+ items:
+ - description: Display ahb clock
+ - description: Display hf axi clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
+ #include <dt-bindings/clock/qcom,gcc-sm8250.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interconnect/qcom,sm8250.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@ae01000 {
+ compatible = "qcom,sm8250-dpu";
+ reg = <0x0ae01000 0x8f000>,
+ <0x0aeb0000 0x2008>;
+ reg-names = "mdp", "vbif";
+
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "iface", "bus", "core", "vsync";
+
+ assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ assigned-clock-rates = <19200000>;
+
+ operating-points-v2 = <&mdp_opp_table>;
+ power-domains = <&rpmhpd SM8250_MMCX>;
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ endpoint {
+ remote-endpoint = <&dsi1_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
new file mode 100644
index 000000000000..ec806535b804
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
@@ -0,0 +1,103 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sm8250-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SM8250 Display MDSS
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
+ bindings of MDSS are mentioned for SM8250 target.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,sm8250-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display hf axi clock
+ - description: Display sf axi clock
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: nrt_bus
+ - const: core
+
+ iommus:
+ maxItems: 1
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ maxItems: 2
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sm8250-dpu
+
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^dsi-phy@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,dsi-phy-7nm
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
+ #include <dt-bindings/clock/qcom,gcc-sm8250.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interconnect/qcom,sm8250.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-subsystem@ae00000 {
+ compatible = "qcom,sm8250-mdss";
+ reg = <0x0ae00000 0x1000>;
+ reg-names = "mdss";
+
+ interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
+ <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
+ interconnect-names = "mdp0-mem", "mdp1-mem";
+
+ power-domains = <&dispcc MDSS_GDSC>;
+
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&gcc GCC_DISP_SF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+ clock-names = "iface", "bus", "nrt_bus", "core";
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ iommus = <&apps_smmu 0x820 0x402>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v7 12/12] dt-bindings: display/msm: add support for the display on SM8250
@ 2022-09-15 13:37 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-15 13:37 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm
SM8250 platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/mdss-common.yaml | 4 +-
.../bindings/display/msm/qcom,sm8250-dpu.yaml | 92 ++++++++++++++++
.../display/msm/qcom,sm8250-mdss.yaml | 103 ++++++++++++++++++
3 files changed, 197 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
index 2a476bd0215e..27d7242657b2 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
@@ -27,11 +27,11 @@ properties:
clocks:
minItems: 2
- maxItems: 3
+ maxItems: 4
clock-names:
minItems: 2
- maxItems: 3
+ maxItems: 4
interrupts:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
new file mode 100644
index 000000000000..9ff8a265c85f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
@@ -0,0 +1,92 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SM8250 Display DPU
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+ const: qcom,sm8250-dpu
+
+ reg:
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+ items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+ items:
+ - description: Display ahb clock
+ - description: Display hf axi clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
+ #include <dt-bindings/clock/qcom,gcc-sm8250.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interconnect/qcom,sm8250.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-controller@ae01000 {
+ compatible = "qcom,sm8250-dpu";
+ reg = <0x0ae01000 0x8f000>,
+ <0x0aeb0000 0x2008>;
+ reg-names = "mdp", "vbif";
+
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "iface", "bus", "core", "vsync";
+
+ assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ assigned-clock-rates = <19200000>;
+
+ operating-points-v2 = <&mdp_opp_table>;
+ power-domains = <&rpmhpd SM8250_MMCX>;
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ endpoint {
+ remote-endpoint = <&dsi1_in>;
+ };
+ };
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
new file mode 100644
index 000000000000..ec806535b804
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
@@ -0,0 +1,103 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sm8250-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SM8250 Display MDSS
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+
+description:
+ Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
+ sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
+ bindings of MDSS are mentioned for SM8250 target.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: qcom,sm8250-mdss
+
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display hf axi clock
+ - description: Display sf axi clock
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: nrt_bus
+ - const: core
+
+ iommus:
+ maxItems: 1
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ maxItems: 2
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,sm8250-dpu
+
+ "^dsi@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,mdss-dsi-ctrl
+
+ "^dsi-phy@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ const: qcom,dsi-phy-7nm
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
+ #include <dt-bindings/clock/qcom,gcc-sm8250.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interconnect/qcom,sm8250.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ display-subsystem@ae00000 {
+ compatible = "qcom,sm8250-mdss";
+ reg = <0x0ae00000 0x1000>;
+ reg-names = "mdss";
+
+ interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
+ <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
+ interconnect-names = "mdp0-mem", "mdp1-mem";
+
+ power-domains = <&dispcc MDSS_GDSC>;
+
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&gcc GCC_DISP_SF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+ clock-names = "iface", "bus", "nrt_bus", "core";
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ iommus = <&apps_smmu 0x820 0x402>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 64+ messages in thread
* Re: [PATCH v7 03/12] dt-bindings: display/msm: add interconnects property to qcom,mdss-smd845
2022-09-15 13:37 ` [PATCH v7 03/12] dt-bindings: display/msm: add interconnects property to qcom, mdss-smd845 Dmitry Baryshkov
@ 2022-09-22 7:00 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:00 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Add interconnects required for the SDM845 MDSS device tree node. This
> change was made in the commit c8c61c09e38b ("arm64: dts: qcom: sdm845:
> Add interconnects property for display"), but was not reflected in the
> schema.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 03/12] dt-bindings: display/msm: add interconnects property to qcom,mdss-smd845
@ 2022-09-22 7:00 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:00 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Add interconnects required for the SDM845 MDSS device tree node. This
> change was made in the commit c8c61c09e38b ("arm64: dts: qcom: sdm845:
> Add interconnects property for display"), but was not reflected in the
> schema.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 04/12] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-22 7:02 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:02 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Move properties common to all DPU DT nodes to the dpu-common.yaml.
>
> Note, this removes description of individual DPU port@ nodes. However
> such definitions add no additional value. The reg values do not
> correspond to hardware INTF indices. The driver discovers and binds
> these ports not paying any care for the order of these items. Thus just
> leave the reference to graph.yaml#/properties/ports and the description.
This is okay, but you loose required:ports@[01].
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 04/12] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml
@ 2022-09-22 7:02 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:02 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Move properties common to all DPU DT nodes to the dpu-common.yaml.
>
> Note, this removes description of individual DPU port@ nodes. However
> such definitions add no additional value. The reg values do not
> correspond to hardware INTF indices. The driver discovers and binds
> these ports not paying any care for the order of these items. Thus just
> leave the reference to graph.yaml#/properties/ports and the description.
This is okay, but you loose required:ports@[01].
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-22 7:04 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:04 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>
> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
> will be added later, once msm8998 gains interconnect support.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
(...)
> - "#interrupt-cells":
> - const: 1
> -
> iommus:
> - items:
> - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
> - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
> -
> - ranges: true
> + maxItems: 2
>
> interconnects:
> - items:
> - - description: Interconnect path from mdp0 port to the data bus
> - - description: Interconnect path from mdp1 port to the data bus
> + maxItems: 2
I think this is not equivalent now, because you have in total minItems:1
and maxItems:2, while in past minItems was 2.
The same might apply to iommus. clocks look good.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
@ 2022-09-22 7:04 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:04 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>
> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
> will be added later, once msm8998 gains interconnect support.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
(...)
> - "#interrupt-cells":
> - const: 1
> -
> iommus:
> - items:
> - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
> - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
> -
> - ranges: true
> + maxItems: 2
>
> interconnects:
> - items:
> - - description: Interconnect path from mdp0 port to the data bus
> - - description: Interconnect path from mdp1 port to the data bus
> + maxItems: 2
I think this is not equivalent now, because you have in total minItems:1
and maxItems:2, while in past minItems was 2.
The same might apply to iommus. clocks look good.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-22 7:05 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:05 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>
> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
> will be added later, once msm8998 gains interconnect support.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../bindings/display/msm/dpu-msm8998.yaml | 41 +--------
> .../bindings/display/msm/dpu-qcm2290.yaml | 51 ++----------
> .../bindings/display/msm/dpu-sc7180.yaml | 50 ++---------
> .../bindings/display/msm/dpu-sc7280.yaml | 50 ++---------
> .../bindings/display/msm/dpu-sdm845.yaml | 54 ++----------
> .../bindings/display/msm/mdss-common.yaml | 83 +++++++++++++++++++
> 6 files changed, 111 insertions(+), 218 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> index 200eeace1c71..67791dbc3b5d 100644
> --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> @@ -14,20 +14,13 @@ description: |
> sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
> bindings of MDSS and DPU are mentioned for MSM8998 target.
>
missing allOf
> +$ref: /schemas/display/msm/mdss-common.yaml#
> +
> properties:
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
@ 2022-09-22 7:05 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:05 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>
> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
> will be added later, once msm8998 gains interconnect support.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../bindings/display/msm/dpu-msm8998.yaml | 41 +--------
> .../bindings/display/msm/dpu-qcm2290.yaml | 51 ++----------
> .../bindings/display/msm/dpu-sc7180.yaml | 50 ++---------
> .../bindings/display/msm/dpu-sc7280.yaml | 50 ++---------
> .../bindings/display/msm/dpu-sdm845.yaml | 54 ++----------
> .../bindings/display/msm/mdss-common.yaml | 83 +++++++++++++++++++
> 6 files changed, 111 insertions(+), 218 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> index 200eeace1c71..67791dbc3b5d 100644
> --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> @@ -14,20 +14,13 @@ description: |
> sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
> bindings of MDSS and DPU are mentioned for MSM8998 target.
>
missing allOf
> +$ref: /schemas/display/msm/mdss-common.yaml#
> +
> properties:
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 06/12] dt-bindings: display/msm: split dpu-sc7180 into DPU and MDSS parts
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-22 7:08 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:08 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> In order to make the schema more readable, split dpu-sc7180 into the DPU
> and MDSS parts, each one describing just a single device binding.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thank you for your patch. There is something to discuss/improve.
> +---
> +$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Display DPU dt properties for SC7180 target
> +
> +maintainers:
> + - Krishna Manikandan <quic_mkrishn@quicinc.com>
> +
missing allOf
> +$ref: /schemas/display/msm/dpu-common.yaml#
> +
> +properties:
> + compatible:
> + items:
> + - const: qcom,sc7180-dpu
> +
> + reg:
> + items:
> + - description: Address offset and size for mdp register set
> + - description: Address offset and size for vbif register set
> +
> + reg-names:
> + items:
> + - const: mdp
> + - const: vbif
> +
> + clocks:
> + items:
> + - description: Display hf axi clock
> + - description: Display ahb clock
> + - description: Display rotator clock
> + - description: Display lut clock
> + - description: Display core clock
> + - description: Display vsync clock
> +
> + clock-names:
> + items:
> + - const: bus
> + - const: iface
> + - const: rot
> + - const: lut
> + - const: core
> + - const: vsync
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
> + #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> + #include <dt-bindings/power/qcom-rpmpd.h>
> +
> + display-controller@ae01000 {
> + compatible = "qcom,sc7180-dpu";
> + reg = <0x0ae01000 0x8f000>,
> + <0x0aeb0000 0x2008>;
> +
> + reg-names = "mdp", "vbif";
> +
> + clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
> + <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_ROT_CLK>,
> + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
> + <&dispcc DISP_CC_MDSS_MDP_CLK>,
> + <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
> + clock-names = "bus", "iface", "rot", "lut", "core",
> + "vsync";
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&mdp_opp_table>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + endpoint {
> + remote-endpoint = <&dsi0_in>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + endpoint {
> + remote-endpoint = <&dp_in>;
> + };
> + };
> + };
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
> new file mode 100644
> index 000000000000..e507c091b60f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
> @@ -0,0 +1,84 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SC7180 Display MDSS
> +
> +maintainers:
> + - Krishna Manikandan <quic_mkrishn@quicinc.com>
> +
> +description:
> + Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
> + sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
> + bindings of MDSS are mentioned for SC7180 target.
> +
missing allOf.
> +$ref: /schemas/display/msm/mdss-common.yaml#
> +
> +properties:
> + compatible:
> + items:
> + - const: qcom,sc7180-mdss
> +
> + clocks:
> + items:
> + - description: Display AHB clock from gcc
> + - description: Display AHB clock from dispcc
> + - description: Display core clock
> +
> + clock-names:
> + items:
> + - const: iface
> + - const: ahb
> + - const: core
> +
> + iommus:
> + maxItems: 1
> +
> + interconnects:
> + maxItems: 1
> +
> + interconnect-names:
> + maxItems: 1
> +
> +patternProperties:
> + "^display-controller@[0-9a-f]+$":
> + type: object
> + properties:
> + compatible:
> + const: qcom,sc7180-dpu
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
> + #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interconnect/qcom,sdm845.h>
> + #include <dt-bindings/power/qcom-rpmpd.h>
> +
> + display-subsystem@ae00000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "qcom,sc7180-mdss";
> + reg = <0xae00000 0x1000>;
> + reg-names = "mdss";
> + power-domains = <&dispcc MDSS_GDSC>;
> + clocks = <&gcc GCC_DISP_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_MDP_CLK>;
> + clock-names = "iface", "ahb", "core";
> +
> + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
> + interconnect-names = "mdp0-mem";
> +
> + iommus = <&apps_smmu 0x800 0x2>;
> + ranges;
This should come with full example, so with display-controller child
(unless Rob asked not to?)
> + };
> +...
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 06/12] dt-bindings: display/msm: split dpu-sc7180 into DPU and MDSS parts
@ 2022-09-22 7:08 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:08 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> In order to make the schema more readable, split dpu-sc7180 into the DPU
> and MDSS parts, each one describing just a single device binding.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thank you for your patch. There is something to discuss/improve.
> +---
> +$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Display DPU dt properties for SC7180 target
> +
> +maintainers:
> + - Krishna Manikandan <quic_mkrishn@quicinc.com>
> +
missing allOf
> +$ref: /schemas/display/msm/dpu-common.yaml#
> +
> +properties:
> + compatible:
> + items:
> + - const: qcom,sc7180-dpu
> +
> + reg:
> + items:
> + - description: Address offset and size for mdp register set
> + - description: Address offset and size for vbif register set
> +
> + reg-names:
> + items:
> + - const: mdp
> + - const: vbif
> +
> + clocks:
> + items:
> + - description: Display hf axi clock
> + - description: Display ahb clock
> + - description: Display rotator clock
> + - description: Display lut clock
> + - description: Display core clock
> + - description: Display vsync clock
> +
> + clock-names:
> + items:
> + - const: bus
> + - const: iface
> + - const: rot
> + - const: lut
> + - const: core
> + - const: vsync
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
> + #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> + #include <dt-bindings/power/qcom-rpmpd.h>
> +
> + display-controller@ae01000 {
> + compatible = "qcom,sc7180-dpu";
> + reg = <0x0ae01000 0x8f000>,
> + <0x0aeb0000 0x2008>;
> +
> + reg-names = "mdp", "vbif";
> +
> + clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
> + <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_ROT_CLK>,
> + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
> + <&dispcc DISP_CC_MDSS_MDP_CLK>,
> + <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
> + clock-names = "bus", "iface", "rot", "lut", "core",
> + "vsync";
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&mdp_opp_table>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + endpoint {
> + remote-endpoint = <&dsi0_in>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + endpoint {
> + remote-endpoint = <&dp_in>;
> + };
> + };
> + };
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
> new file mode 100644
> index 000000000000..e507c091b60f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
> @@ -0,0 +1,84 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SC7180 Display MDSS
> +
> +maintainers:
> + - Krishna Manikandan <quic_mkrishn@quicinc.com>
> +
> +description:
> + Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
> + sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
> + bindings of MDSS are mentioned for SC7180 target.
> +
missing allOf.
> +$ref: /schemas/display/msm/mdss-common.yaml#
> +
> +properties:
> + compatible:
> + items:
> + - const: qcom,sc7180-mdss
> +
> + clocks:
> + items:
> + - description: Display AHB clock from gcc
> + - description: Display AHB clock from dispcc
> + - description: Display core clock
> +
> + clock-names:
> + items:
> + - const: iface
> + - const: ahb
> + - const: core
> +
> + iommus:
> + maxItems: 1
> +
> + interconnects:
> + maxItems: 1
> +
> + interconnect-names:
> + maxItems: 1
> +
> +patternProperties:
> + "^display-controller@[0-9a-f]+$":
> + type: object
> + properties:
> + compatible:
> + const: qcom,sc7180-dpu
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
> + #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interconnect/qcom,sdm845.h>
> + #include <dt-bindings/power/qcom-rpmpd.h>
> +
> + display-subsystem@ae00000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "qcom,sc7180-mdss";
> + reg = <0xae00000 0x1000>;
> + reg-names = "mdss";
> + power-domains = <&dispcc MDSS_GDSC>;
> + clocks = <&gcc GCC_DISP_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_MDP_CLK>;
> + clock-names = "iface", "ahb", "core";
> +
> + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
> + interconnect-names = "mdp0-mem";
> +
> + iommus = <&apps_smmu 0x800 0x2>;
> + ranges;
This should come with full example, so with display-controller child
(unless Rob asked not to?)
> + };
> +...
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 11/12] dt-bindings: display/msm: add missing device nodes to mdss-* schemas
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-22 7:09 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:09 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Add missing device nodes (DSI, PHYs, DP/eDP) to the existing MDSS
> schemas.
>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../display/msm/qcom,msm8998-mdss.yaml | 12 +++++++++
> .../display/msm/qcom,qcm2290-mdss.yaml | 6 +++++
> .../display/msm/qcom,sc7180-mdss.yaml | 18 +++++++++++++
> .../display/msm/qcom,sc7280-mdss.yaml | 26 +++++++++++++++++++
> .../display/msm/qcom,sdm845-mdss.yaml | 12 +++++++++
> 5 files changed, 74 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
> index c2550cfb797e..f749821725b1 100644
> --- a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
> @@ -43,6 +43,18 @@ patternProperties:
> compatible:
> const: qcom,msm8998-dpu
>
> + "^dsi@[0-9a-f]+$":
> + type: object
> + properties:
> + compatible:
> + const: qcom,mdss-dsi-ctrl
> +
> + "^phy@[0-9a-f]+$":
> + type: object
> + properties:
> + compatible:
> + const: qcom,dsi-phy-10nm-8998
> +
> unevaluatedProperties: false
Your example should also include them (unless it's removed on purpose?).
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 11/12] dt-bindings: display/msm: add missing device nodes to mdss-* schemas
@ 2022-09-22 7:09 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:09 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno, Rob Herring
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Add missing device nodes (DSI, PHYs, DP/eDP) to the existing MDSS
> schemas.
>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../display/msm/qcom,msm8998-mdss.yaml | 12 +++++++++
> .../display/msm/qcom,qcm2290-mdss.yaml | 6 +++++
> .../display/msm/qcom,sc7180-mdss.yaml | 18 +++++++++++++
> .../display/msm/qcom,sc7280-mdss.yaml | 26 +++++++++++++++++++
> .../display/msm/qcom,sdm845-mdss.yaml | 12 +++++++++
> 5 files changed, 74 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
> index c2550cfb797e..f749821725b1 100644
> --- a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
> @@ -43,6 +43,18 @@ patternProperties:
> compatible:
> const: qcom,msm8998-dpu
>
> + "^dsi@[0-9a-f]+$":
> + type: object
> + properties:
> + compatible:
> + const: qcom,mdss-dsi-ctrl
> +
> + "^phy@[0-9a-f]+$":
> + type: object
> + properties:
> + compatible:
> + const: qcom,dsi-phy-10nm-8998
> +
> unevaluatedProperties: false
Your example should also include them (unless it's removed on purpose?).
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 12/12] dt-bindings: display/msm: add support for the display on SM8250
2022-09-15 13:37 ` Dmitry Baryshkov
@ 2022-09-22 7:10 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:10 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm
> SM8250 platform.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../bindings/display/msm/mdss-common.yaml | 4 +-
> .../bindings/display/msm/qcom,sm8250-dpu.yaml | 92 ++++++++++++++++
> .../display/msm/qcom,sm8250-mdss.yaml | 103 ++++++++++++++++++
> 3 files changed, 197 insertions(+), 2 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
> create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
> index 2a476bd0215e..27d7242657b2 100644
> --- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
> @@ -27,11 +27,11 @@ properties:
>
> clocks:
> minItems: 2
> - maxItems: 3
> + maxItems: 4
>
> clock-names:
> minItems: 2
> - maxItems: 3
> + maxItems: 4
>
> interrupts:
> maxItems: 1
> diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
> new file mode 100644
> index 000000000000..9ff8a265c85f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
> @@ -0,0 +1,92 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SM8250 Display DPU
> +
> +maintainers:
> + - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> +
> +$ref: /schemas/display/msm/dpu-common.yaml#
Same problem as in other bindings.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 12/12] dt-bindings: display/msm: add support for the display on SM8250
@ 2022-09-22 7:10 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 7:10 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm
> SM8250 platform.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../bindings/display/msm/mdss-common.yaml | 4 +-
> .../bindings/display/msm/qcom,sm8250-dpu.yaml | 92 ++++++++++++++++
> .../display/msm/qcom,sm8250-mdss.yaml | 103 ++++++++++++++++++
> 3 files changed, 197 insertions(+), 2 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
> create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
> index 2a476bd0215e..27d7242657b2 100644
> --- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
> @@ -27,11 +27,11 @@ properties:
>
> clocks:
> minItems: 2
> - maxItems: 3
> + maxItems: 4
>
> clock-names:
> minItems: 2
> - maxItems: 3
> + maxItems: 4
>
> interrupts:
> maxItems: 1
> diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
> new file mode 100644
> index 000000000000..9ff8a265c85f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
> @@ -0,0 +1,92 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SM8250 Display DPU
> +
> +maintainers:
> + - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> +
> +$ref: /schemas/display/msm/dpu-common.yaml#
Same problem as in other bindings.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 04/12] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml
2022-09-22 7:02 ` Krzysztof Kozlowski
@ 2022-09-22 7:50 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-22 7:50 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski, Stephen Boyd,
David Airlie, Daniel Vetter, linux-arm-msm, devicetree,
dri-devel, freedreno
On Thu, 22 Sept 2022 at 10:02, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> > Move properties common to all DPU DT nodes to the dpu-common.yaml.
> >
> > Note, this removes description of individual DPU port@ nodes. However
> > such definitions add no additional value. The reg values do not
> > correspond to hardware INTF indices. The driver discovers and binds
> > these ports not paying any care for the order of these items. Thus just
> > leave the reference to graph.yaml#/properties/ports and the description.
>
> This is okay, but you loose required:ports@[01].
This is fine for me. The ports do not have 1:1 correspondence to
intfs. Usually platforms add ports as new sinks are added. For example
a platform can start with a single DSI node and later get second DSI,
DP, eDP, etc. as they are receiving support/required by end-user
devices.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 04/12] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml
@ 2022-09-22 7:50 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-22 7:50 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, Bjorn Andersson,
Konrad Dybcio, Abhinav Kumar, Rob Herring, Stephen Boyd,
Andy Gross, dri-devel, Krzysztof Kozlowski, freedreno, Sean Paul
On Thu, 22 Sept 2022 at 10:02, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> > Move properties common to all DPU DT nodes to the dpu-common.yaml.
> >
> > Note, this removes description of individual DPU port@ nodes. However
> > such definitions add no additional value. The reg values do not
> > correspond to hardware INTF indices. The driver discovers and binds
> > these ports not paying any care for the order of these items. Thus just
> > leave the reference to graph.yaml#/properties/ports and the description.
>
> This is okay, but you loose required:ports@[01].
This is fine for me. The ports do not have 1:1 correspondence to
intfs. Usually platforms add ports as new sinks are added. For example
a platform can start with a single DSI node and later get second DSI,
DP, eDP, etc. as they are receiving support/required by end-user
devices.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
2022-09-22 7:05 ` Krzysztof Kozlowski
@ 2022-09-22 7:53 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-22 7:53 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski, Stephen Boyd,
David Airlie, Daniel Vetter, linux-arm-msm, devicetree,
dri-devel, freedreno
On Thu, 22 Sept 2022 at 10:05, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> > Move properties common to all MDSS DT nodes to the mdss-common.yaml.
> >
> > This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
> > will be added later, once msm8998 gains interconnect support.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> > .../bindings/display/msm/dpu-msm8998.yaml | 41 +--------
> > .../bindings/display/msm/dpu-qcm2290.yaml | 51 ++----------
> > .../bindings/display/msm/dpu-sc7180.yaml | 50 ++---------
> > .../bindings/display/msm/dpu-sc7280.yaml | 50 ++---------
> > .../bindings/display/msm/dpu-sdm845.yaml | 54 ++----------
> > .../bindings/display/msm/mdss-common.yaml | 83 +++++++++++++++++++
> > 6 files changed, 111 insertions(+), 218 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> > index 200eeace1c71..67791dbc3b5d 100644
> > --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> > +++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> > @@ -14,20 +14,13 @@ description: |
> > sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
> > bindings of MDSS and DPU are mentioned for MSM8998 target.
> >
>
> missing allOf
Rob asked to remove this while reviewing v6 ([1]). And indeed the
allOf's around a single $ref do not seem to be necessary
>
> > +$ref: /schemas/display/msm/mdss-common.yaml#
> > +
> > properties:
[1] https://lore.kernel.org/dri-devel/20220907195904.GA98468-robh@kernel.org/
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
@ 2022-09-22 7:53 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-22 7:53 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, Bjorn Andersson,
Konrad Dybcio, Abhinav Kumar, Rob Herring, Stephen Boyd,
Andy Gross, dri-devel, Krzysztof Kozlowski, freedreno, Sean Paul
On Thu, 22 Sept 2022 at 10:05, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> > Move properties common to all MDSS DT nodes to the mdss-common.yaml.
> >
> > This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
> > will be added later, once msm8998 gains interconnect support.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> > .../bindings/display/msm/dpu-msm8998.yaml | 41 +--------
> > .../bindings/display/msm/dpu-qcm2290.yaml | 51 ++----------
> > .../bindings/display/msm/dpu-sc7180.yaml | 50 ++---------
> > .../bindings/display/msm/dpu-sc7280.yaml | 50 ++---------
> > .../bindings/display/msm/dpu-sdm845.yaml | 54 ++----------
> > .../bindings/display/msm/mdss-common.yaml | 83 +++++++++++++++++++
> > 6 files changed, 111 insertions(+), 218 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> > index 200eeace1c71..67791dbc3b5d 100644
> > --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> > +++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
> > @@ -14,20 +14,13 @@ description: |
> > sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
> > bindings of MDSS and DPU are mentioned for MSM8998 target.
> >
>
> missing allOf
Rob asked to remove this while reviewing v6 ([1]). And indeed the
allOf's around a single $ref do not seem to be necessary
>
> > +$ref: /schemas/display/msm/mdss-common.yaml#
> > +
> > properties:
[1] https://lore.kernel.org/dri-devel/20220907195904.GA98468-robh@kernel.org/
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 06/12] dt-bindings: display/msm: split dpu-sc7180 into DPU and MDSS parts
2022-09-22 7:08 ` Krzysztof Kozlowski
@ 2022-09-22 10:30 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-22 10:30 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski, Stephen Boyd,
David Airlie, Daniel Vetter, linux-arm-msm, devicetree,
dri-devel, freedreno
On Thu, 22 Sept 2022 at 10:08, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> > In order to make the schema more readable, split dpu-sc7180 into the DPU
> > and MDSS parts, each one describing just a single device binding.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
>
> Thank you for your patch. There is something to discuss/improve.
>
> > +---
> > +$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm Display DPU dt properties for SC7180 target
> > +
> > +maintainers:
> > + - Krishna Manikandan <quic_mkrishn@quicinc.com>
> > +
>
> missing allOf
>
> > +$ref: /schemas/display/msm/dpu-common.yaml#
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: qcom,sc7180-dpu
> > +
> > + reg:
> > + items:
> > + - description: Address offset and size for mdp register set
> > + - description: Address offset and size for vbif register set
> > +
> > + reg-names:
> > + items:
> > + - const: mdp
> > + - const: vbif
> > +
> > + clocks:
> > + items:
> > + - description: Display hf axi clock
> > + - description: Display ahb clock
> > + - description: Display rotator clock
> > + - description: Display lut clock
> > + - description: Display core clock
> > + - description: Display vsync clock
> > +
> > + clock-names:
> > + items:
> > + - const: bus
> > + - const: iface
> > + - const: rot
> > + - const: lut
> > + - const: core
> > + - const: vsync
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
> > + #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> > + #include <dt-bindings/power/qcom-rpmpd.h>
> > +
> > + display-controller@ae01000 {
> > + compatible = "qcom,sc7180-dpu";
> > + reg = <0x0ae01000 0x8f000>,
> > + <0x0aeb0000 0x2008>;
> > +
> > + reg-names = "mdp", "vbif";
> > +
> > + clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
> > + <&dispcc DISP_CC_MDSS_AHB_CLK>,
> > + <&dispcc DISP_CC_MDSS_ROT_CLK>,
> > + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
> > + <&dispcc DISP_CC_MDSS_MDP_CLK>,
> > + <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
> > + clock-names = "bus", "iface", "rot", "lut", "core",
> > + "vsync";
> > +
> > + interrupt-parent = <&mdss>;
> > + interrupts = <0>;
> > + power-domains = <&rpmhpd SC7180_CX>;
> > + operating-points-v2 = <&mdp_opp_table>;
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > + endpoint {
> > + remote-endpoint = <&dsi0_in>;
> > + };
> > + };
> > +
> > + port@2 {
> > + reg = <2>;
> > + endpoint {
> > + remote-endpoint = <&dp_in>;
> > + };
> > + };
> > + };
> > + };
> > +...
> > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
> > new file mode 100644
> > index 000000000000..e507c091b60f
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
> > @@ -0,0 +1,84 @@
> > +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm SC7180 Display MDSS
> > +
> > +maintainers:
> > + - Krishna Manikandan <quic_mkrishn@quicinc.com>
> > +
> > +description:
> > + Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
> > + sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
> > + bindings of MDSS are mentioned for SC7180 target.
> > +
>
> missing allOf.
>
> > +$ref: /schemas/display/msm/mdss-common.yaml#
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: qcom,sc7180-mdss
> > +
> > + clocks:
> > + items:
> > + - description: Display AHB clock from gcc
> > + - description: Display AHB clock from dispcc
> > + - description: Display core clock
> > +
> > + clock-names:
> > + items:
> > + - const: iface
> > + - const: ahb
> > + - const: core
> > +
> > + iommus:
> > + maxItems: 1
> > +
> > + interconnects:
> > + maxItems: 1
> > +
> > + interconnect-names:
> > + maxItems: 1
> > +
> > +patternProperties:
> > + "^display-controller@[0-9a-f]+$":
> > + type: object
> > + properties:
> > + compatible:
> > + const: qcom,sc7180-dpu
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
> > + #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/interconnect/qcom,sdm845.h>
> > + #include <dt-bindings/power/qcom-rpmpd.h>
> > +
> > + display-subsystem@ae00000 {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "qcom,sc7180-mdss";
> > + reg = <0xae00000 0x1000>;
> > + reg-names = "mdss";
> > + power-domains = <&dispcc MDSS_GDSC>;
> > + clocks = <&gcc GCC_DISP_AHB_CLK>,
> > + <&dispcc DISP_CC_MDSS_AHB_CLK>,
> > + <&dispcc DISP_CC_MDSS_MDP_CLK>;
> > + clock-names = "iface", "ahb", "core";
> > +
> > + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > +
> > + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
> > + interconnect-names = "mdp0-mem";
> > +
> > + iommus = <&apps_smmu 0x800 0x2>;
> > + ranges;
>
> This should come with full example, so with display-controller child
> (unless Rob asked not to?)
I'm not sure here. We have an example of a display-controller in a
separate schema file. Why would you like to duplicate it?
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 06/12] dt-bindings: display/msm: split dpu-sc7180 into DPU and MDSS parts
@ 2022-09-22 10:30 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-22 10:30 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, Bjorn Andersson,
Konrad Dybcio, Abhinav Kumar, Rob Herring, Stephen Boyd,
Andy Gross, dri-devel, Krzysztof Kozlowski, freedreno, Sean Paul
On Thu, 22 Sept 2022 at 10:08, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> > In order to make the schema more readable, split dpu-sc7180 into the DPU
> > and MDSS parts, each one describing just a single device binding.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
>
> Thank you for your patch. There is something to discuss/improve.
>
> > +---
> > +$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm Display DPU dt properties for SC7180 target
> > +
> > +maintainers:
> > + - Krishna Manikandan <quic_mkrishn@quicinc.com>
> > +
>
> missing allOf
>
> > +$ref: /schemas/display/msm/dpu-common.yaml#
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: qcom,sc7180-dpu
> > +
> > + reg:
> > + items:
> > + - description: Address offset and size for mdp register set
> > + - description: Address offset and size for vbif register set
> > +
> > + reg-names:
> > + items:
> > + - const: mdp
> > + - const: vbif
> > +
> > + clocks:
> > + items:
> > + - description: Display hf axi clock
> > + - description: Display ahb clock
> > + - description: Display rotator clock
> > + - description: Display lut clock
> > + - description: Display core clock
> > + - description: Display vsync clock
> > +
> > + clock-names:
> > + items:
> > + - const: bus
> > + - const: iface
> > + - const: rot
> > + - const: lut
> > + - const: core
> > + - const: vsync
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
> > + #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> > + #include <dt-bindings/power/qcom-rpmpd.h>
> > +
> > + display-controller@ae01000 {
> > + compatible = "qcom,sc7180-dpu";
> > + reg = <0x0ae01000 0x8f000>,
> > + <0x0aeb0000 0x2008>;
> > +
> > + reg-names = "mdp", "vbif";
> > +
> > + clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
> > + <&dispcc DISP_CC_MDSS_AHB_CLK>,
> > + <&dispcc DISP_CC_MDSS_ROT_CLK>,
> > + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
> > + <&dispcc DISP_CC_MDSS_MDP_CLK>,
> > + <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
> > + clock-names = "bus", "iface", "rot", "lut", "core",
> > + "vsync";
> > +
> > + interrupt-parent = <&mdss>;
> > + interrupts = <0>;
> > + power-domains = <&rpmhpd SC7180_CX>;
> > + operating-points-v2 = <&mdp_opp_table>;
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > + endpoint {
> > + remote-endpoint = <&dsi0_in>;
> > + };
> > + };
> > +
> > + port@2 {
> > + reg = <2>;
> > + endpoint {
> > + remote-endpoint = <&dp_in>;
> > + };
> > + };
> > + };
> > + };
> > +...
> > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
> > new file mode 100644
> > index 000000000000..e507c091b60f
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
> > @@ -0,0 +1,84 @@
> > +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm SC7180 Display MDSS
> > +
> > +maintainers:
> > + - Krishna Manikandan <quic_mkrishn@quicinc.com>
> > +
> > +description:
> > + Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
> > + sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
> > + bindings of MDSS are mentioned for SC7180 target.
> > +
>
> missing allOf.
>
> > +$ref: /schemas/display/msm/mdss-common.yaml#
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: qcom,sc7180-mdss
> > +
> > + clocks:
> > + items:
> > + - description: Display AHB clock from gcc
> > + - description: Display AHB clock from dispcc
> > + - description: Display core clock
> > +
> > + clock-names:
> > + items:
> > + - const: iface
> > + - const: ahb
> > + - const: core
> > +
> > + iommus:
> > + maxItems: 1
> > +
> > + interconnects:
> > + maxItems: 1
> > +
> > + interconnect-names:
> > + maxItems: 1
> > +
> > +patternProperties:
> > + "^display-controller@[0-9a-f]+$":
> > + type: object
> > + properties:
> > + compatible:
> > + const: qcom,sc7180-dpu
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
> > + #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/interconnect/qcom,sdm845.h>
> > + #include <dt-bindings/power/qcom-rpmpd.h>
> > +
> > + display-subsystem@ae00000 {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "qcom,sc7180-mdss";
> > + reg = <0xae00000 0x1000>;
> > + reg-names = "mdss";
> > + power-domains = <&dispcc MDSS_GDSC>;
> > + clocks = <&gcc GCC_DISP_AHB_CLK>,
> > + <&dispcc DISP_CC_MDSS_AHB_CLK>,
> > + <&dispcc DISP_CC_MDSS_MDP_CLK>;
> > + clock-names = "iface", "ahb", "core";
> > +
> > + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > +
> > + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
> > + interconnect-names = "mdp0-mem";
> > +
> > + iommus = <&apps_smmu 0x800 0x2>;
> > + ranges;
>
> This should come with full example, so with display-controller child
> (unless Rob asked not to?)
I'm not sure here. We have an example of a display-controller in a
separate schema file. Why would you like to duplicate it?
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 04/12] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml
2022-09-22 7:50 ` Dmitry Baryshkov
@ 2022-09-22 11:41 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 11:41 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski, Stephen Boyd,
David Airlie, Daniel Vetter, linux-arm-msm, devicetree,
dri-devel, freedreno
On 22/09/2022 09:50, Dmitry Baryshkov wrote:
> On Thu, 22 Sept 2022 at 10:02, Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
>>> Move properties common to all DPU DT nodes to the dpu-common.yaml.
>>>
>>> Note, this removes description of individual DPU port@ nodes. However
>>> such definitions add no additional value. The reg values do not
>>> correspond to hardware INTF indices. The driver discovers and binds
>>> these ports not paying any care for the order of these items. Thus just
>>> leave the reference to graph.yaml#/properties/ports and the description.
>>
>> This is okay, but you loose required:ports@[01].
>
> This is fine for me. The ports do not have 1:1 correspondence to
> intfs. Usually platforms add ports as new sinks are added. For example
> a platform can start with a single DSI node and later get second DSI,
> DP, eDP, etc. as they are receiving support/required by end-user
> devices.
Then at least port@0 would be required. Node without ports does not look
correct.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 04/12] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml
@ 2022-09-22 11:41 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 11:41 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: devicetree, David Airlie, linux-arm-msm, Bjorn Andersson,
Konrad Dybcio, Abhinav Kumar, Rob Herring, Stephen Boyd,
Andy Gross, dri-devel, Krzysztof Kozlowski, freedreno, Sean Paul
On 22/09/2022 09:50, Dmitry Baryshkov wrote:
> On Thu, 22 Sept 2022 at 10:02, Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
>>> Move properties common to all DPU DT nodes to the dpu-common.yaml.
>>>
>>> Note, this removes description of individual DPU port@ nodes. However
>>> such definitions add no additional value. The reg values do not
>>> correspond to hardware INTF indices. The driver discovers and binds
>>> these ports not paying any care for the order of these items. Thus just
>>> leave the reference to graph.yaml#/properties/ports and the description.
>>
>> This is okay, but you loose required:ports@[01].
>
> This is fine for me. The ports do not have 1:1 correspondence to
> intfs. Usually platforms add ports as new sinks are added. For example
> a platform can start with a single DSI node and later get second DSI,
> DP, eDP, etc. as they are receiving support/required by end-user
> devices.
Then at least port@0 would be required. Node without ports does not look
correct.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
2022-09-22 7:53 ` Dmitry Baryshkov
@ 2022-09-22 11:43 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 11:43 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: devicetree, David Airlie, linux-arm-msm, Bjorn Andersson,
Konrad Dybcio, Abhinav Kumar, Rob Herring, Stephen Boyd,
Andy Gross, dri-devel, Krzysztof Kozlowski, freedreno, Sean Paul
On 22/09/2022 09:53, Dmitry Baryshkov wrote:
> On Thu, 22 Sept 2022 at 10:05, Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
>>> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>>>
>>> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
>>> will be added later, once msm8998 gains interconnect support.
>>>
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>> ---
>>> .../bindings/display/msm/dpu-msm8998.yaml | 41 +--------
>>> .../bindings/display/msm/dpu-qcm2290.yaml | 51 ++----------
>>> .../bindings/display/msm/dpu-sc7180.yaml | 50 ++---------
>>> .../bindings/display/msm/dpu-sc7280.yaml | 50 ++---------
>>> .../bindings/display/msm/dpu-sdm845.yaml | 54 ++----------
>>> .../bindings/display/msm/mdss-common.yaml | 83 +++++++++++++++++++
>>> 6 files changed, 111 insertions(+), 218 deletions(-)
>>> create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>> index 200eeace1c71..67791dbc3b5d 100644
>>> --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>> +++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>> @@ -14,20 +14,13 @@ description: |
>>> sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
>>> bindings of MDSS and DPU are mentioned for MSM8998 target.
>>>
>>
>> missing allOf
>
> Rob asked to remove this while reviewing v6 ([1]). And indeed the
> allOf's around a single $ref do not seem to be necessary
He commented on one of properties, not top-level, maybe it is different
case for dtschema. In the past it was required, so are you sure
something changed in dtschema?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
@ 2022-09-22 11:43 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 11:43 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski, Stephen Boyd,
David Airlie, Daniel Vetter, linux-arm-msm, devicetree,
dri-devel, freedreno
On 22/09/2022 09:53, Dmitry Baryshkov wrote:
> On Thu, 22 Sept 2022 at 10:05, Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
>>> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>>>
>>> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
>>> will be added later, once msm8998 gains interconnect support.
>>>
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>> ---
>>> .../bindings/display/msm/dpu-msm8998.yaml | 41 +--------
>>> .../bindings/display/msm/dpu-qcm2290.yaml | 51 ++----------
>>> .../bindings/display/msm/dpu-sc7180.yaml | 50 ++---------
>>> .../bindings/display/msm/dpu-sc7280.yaml | 50 ++---------
>>> .../bindings/display/msm/dpu-sdm845.yaml | 54 ++----------
>>> .../bindings/display/msm/mdss-common.yaml | 83 +++++++++++++++++++
>>> 6 files changed, 111 insertions(+), 218 deletions(-)
>>> create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>> index 200eeace1c71..67791dbc3b5d 100644
>>> --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>> +++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>> @@ -14,20 +14,13 @@ description: |
>>> sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
>>> bindings of MDSS and DPU are mentioned for MSM8998 target.
>>>
>>
>> missing allOf
>
> Rob asked to remove this while reviewing v6 ([1]). And indeed the
> allOf's around a single $ref do not seem to be necessary
He commented on one of properties, not top-level, maybe it is different
case for dtschema. In the past it was required, so are you sure
something changed in dtschema?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
2022-09-22 7:04 ` Krzysztof Kozlowski
@ 2022-09-22 11:46 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-22 11:46 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
On 22/09/2022 10:04, Krzysztof Kozlowski wrote:
> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
>> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>>
>> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
>> will be added later, once msm8998 gains interconnect support.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>
> (...)
>
>> - "#interrupt-cells":
>> - const: 1
>> -
>> iommus:
>> - items:
>> - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
>> - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
>> -
>> - ranges: true
>> + maxItems: 2
>>
>> interconnects:
>> - items:
>> - - description: Interconnect path from mdp0 port to the data bus
>> - - description: Interconnect path from mdp1 port to the data bus
>> + maxItems: 2
>
> I think this is not equivalent now, because you have in total minItems:1
> and maxItems:2, while in past minItems was 2.
This means that I should have minItems:2, maxItems:2, which, if I got it
right, is frowned upon. Let me doublecheck though if it works as expected.
>
> The same might apply to iommus. clocks look good.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
@ 2022-09-22 11:46 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-22 11:46 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
On 22/09/2022 10:04, Krzysztof Kozlowski wrote:
> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
>> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>>
>> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
>> will be added later, once msm8998 gains interconnect support.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>
> (...)
>
>> - "#interrupt-cells":
>> - const: 1
>> -
>> iommus:
>> - items:
>> - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
>> - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
>> -
>> - ranges: true
>> + maxItems: 2
>>
>> interconnects:
>> - items:
>> - - description: Interconnect path from mdp0 port to the data bus
>> - - description: Interconnect path from mdp1 port to the data bus
>> + maxItems: 2
>
> I think this is not equivalent now, because you have in total minItems:1
> and maxItems:2, while in past minItems was 2.
This means that I should have minItems:2, maxItems:2, which, if I got it
right, is frowned upon. Let me doublecheck though if it works as expected.
>
> The same might apply to iommus. clocks look good.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
2022-09-22 11:43 ` Krzysztof Kozlowski
@ 2022-09-22 11:47 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-22 11:47 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski, Stephen Boyd,
David Airlie, Daniel Vetter, linux-arm-msm, devicetree,
dri-devel, freedreno
On 22/09/2022 14:43, Krzysztof Kozlowski wrote:
> On 22/09/2022 09:53, Dmitry Baryshkov wrote:
>> On Thu, 22 Sept 2022 at 10:05, Krzysztof Kozlowski
>> <krzysztof.kozlowski@linaro.org> wrote:
>>>
>>> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
>>>> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>>>>
>>>> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
>>>> will be added later, once msm8998 gains interconnect support.
>>>>
>>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>>> ---
>>>> .../bindings/display/msm/dpu-msm8998.yaml | 41 +--------
>>>> .../bindings/display/msm/dpu-qcm2290.yaml | 51 ++----------
>>>> .../bindings/display/msm/dpu-sc7180.yaml | 50 ++---------
>>>> .../bindings/display/msm/dpu-sc7280.yaml | 50 ++---------
>>>> .../bindings/display/msm/dpu-sdm845.yaml | 54 ++----------
>>>> .../bindings/display/msm/mdss-common.yaml | 83 +++++++++++++++++++
>>>> 6 files changed, 111 insertions(+), 218 deletions(-)
>>>> create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>>> index 200eeace1c71..67791dbc3b5d 100644
>>>> --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>>> +++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>>> @@ -14,20 +14,13 @@ description: |
>>>> sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
>>>> bindings of MDSS and DPU are mentioned for MSM8998 target.
>>>>
>>>
>>> missing allOf
>>
>> Rob asked to remove this while reviewing v6 ([1]). And indeed the
>> allOf's around a single $ref do not seem to be necessary
>
> He commented on one of properties, not top-level, maybe it is different
> case for dtschema. In the past it was required, so are you sure
> something changed in dtschema?
I do not know if something has changed or not. But judging from the fact
that unevaluatedProperties:false do not generate any warnings, the
referenced schema is processed and applied.
>
> Best regards,
> Krzysztof
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
@ 2022-09-22 11:47 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-22 11:47 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, Bjorn Andersson,
Konrad Dybcio, Abhinav Kumar, Rob Herring, Stephen Boyd,
Andy Gross, dri-devel, Krzysztof Kozlowski, freedreno, Sean Paul
On 22/09/2022 14:43, Krzysztof Kozlowski wrote:
> On 22/09/2022 09:53, Dmitry Baryshkov wrote:
>> On Thu, 22 Sept 2022 at 10:05, Krzysztof Kozlowski
>> <krzysztof.kozlowski@linaro.org> wrote:
>>>
>>> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
>>>> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>>>>
>>>> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
>>>> will be added later, once msm8998 gains interconnect support.
>>>>
>>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>>> ---
>>>> .../bindings/display/msm/dpu-msm8998.yaml | 41 +--------
>>>> .../bindings/display/msm/dpu-qcm2290.yaml | 51 ++----------
>>>> .../bindings/display/msm/dpu-sc7180.yaml | 50 ++---------
>>>> .../bindings/display/msm/dpu-sc7280.yaml | 50 ++---------
>>>> .../bindings/display/msm/dpu-sdm845.yaml | 54 ++----------
>>>> .../bindings/display/msm/mdss-common.yaml | 83 +++++++++++++++++++
>>>> 6 files changed, 111 insertions(+), 218 deletions(-)
>>>> create mode 100644 Documentation/devicetree/bindings/display/msm/mdss-common.yaml
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>>> index 200eeace1c71..67791dbc3b5d 100644
>>>> --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>>> +++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
>>>> @@ -14,20 +14,13 @@ description: |
>>>> sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
>>>> bindings of MDSS and DPU are mentioned for MSM8998 target.
>>>>
>>>
>>> missing allOf
>>
>> Rob asked to remove this while reviewing v6 ([1]). And indeed the
>> allOf's around a single $ref do not seem to be necessary
>
> He commented on one of properties, not top-level, maybe it is different
> case for dtschema. In the past it was required, so are you sure
> something changed in dtschema?
I do not know if something has changed or not. But judging from the fact
that unevaluatedProperties:false do not generate any warnings, the
referenced schema is processed and applied.
>
> Best regards,
> Krzysztof
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 06/12] dt-bindings: display/msm: split dpu-sc7180 into DPU and MDSS parts
2022-09-22 10:30 ` Dmitry Baryshkov
@ 2022-09-22 12:19 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 12:19 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: devicetree, David Airlie, linux-arm-msm, Bjorn Andersson,
Konrad Dybcio, Abhinav Kumar, Rob Herring, Stephen Boyd,
Andy Gross, dri-devel, Krzysztof Kozlowski, freedreno, Sean Paul
On 22/09/2022 12:30, Dmitry Baryshkov wrote:
>>> + display-subsystem@ae00000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + compatible = "qcom,sc7180-mdss";
>>> + reg = <0xae00000 0x1000>;
>>> + reg-names = "mdss";
>>> + power-domains = <&dispcc MDSS_GDSC>;
>>> + clocks = <&gcc GCC_DISP_AHB_CLK>,
>>> + <&dispcc DISP_CC_MDSS_AHB_CLK>,
>>> + <&dispcc DISP_CC_MDSS_MDP_CLK>;
>>> + clock-names = "iface", "ahb", "core";
>>> +
>>> + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
>>> + interrupt-controller;
>>> + #interrupt-cells = <1>;
>>> +
>>> + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
>>> + interconnect-names = "mdp0-mem";
>>> +
>>> + iommus = <&apps_smmu 0x800 0x2>;
>>> + ranges;
>>
>> This should come with full example, so with display-controller child
>> (unless Rob asked not to?)
>
> I'm not sure here. We have an example of a display-controller in a
> separate schema file. Why would you like to duplicate it?
To validate the child node (display-controller) in the context of this
schema. The child node is essential, so I would also say that example is
incomplete.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 06/12] dt-bindings: display/msm: split dpu-sc7180 into DPU and MDSS parts
@ 2022-09-22 12:19 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 12:19 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski, Stephen Boyd,
David Airlie, Daniel Vetter, linux-arm-msm, devicetree,
dri-devel, freedreno
On 22/09/2022 12:30, Dmitry Baryshkov wrote:
>>> + display-subsystem@ae00000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + compatible = "qcom,sc7180-mdss";
>>> + reg = <0xae00000 0x1000>;
>>> + reg-names = "mdss";
>>> + power-domains = <&dispcc MDSS_GDSC>;
>>> + clocks = <&gcc GCC_DISP_AHB_CLK>,
>>> + <&dispcc DISP_CC_MDSS_AHB_CLK>,
>>> + <&dispcc DISP_CC_MDSS_MDP_CLK>;
>>> + clock-names = "iface", "ahb", "core";
>>> +
>>> + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
>>> + interrupt-controller;
>>> + #interrupt-cells = <1>;
>>> +
>>> + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
>>> + interconnect-names = "mdp0-mem";
>>> +
>>> + iommus = <&apps_smmu 0x800 0x2>;
>>> + ranges;
>>
>> This should come with full example, so with display-controller child
>> (unless Rob asked not to?)
>
> I'm not sure here. We have an example of a display-controller in a
> separate schema file. Why would you like to duplicate it?
To validate the child node (display-controller) in the context of this
schema. The child node is essential, so I would also say that example is
incomplete.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
2022-09-22 11:47 ` Dmitry Baryshkov
@ 2022-09-22 12:27 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 12:27 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski, Stephen Boyd,
David Airlie, Daniel Vetter, linux-arm-msm, devicetree,
dri-devel, freedreno
On 22/09/2022 13:47, Dmitry Baryshkov wrote:
>>>>
>>>> missing allOf
>>>
>>> Rob asked to remove this while reviewing v6 ([1]). And indeed the
>>> allOf's around a single $ref do not seem to be necessary
>>
>> He commented on one of properties, not top-level, maybe it is different
>> case for dtschema. In the past it was required, so are you sure
>> something changed in dtschema?
>
> I do not know if something has changed or not. But judging from the fact
> that unevaluatedProperties:false do not generate any warnings, the
> referenced schema is processed and applied.
Hm, indeed looking at the dtschema code should be no difference between
ref and allOf-ref.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
@ 2022-09-22 12:27 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 12:27 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: devicetree, David Airlie, linux-arm-msm, Bjorn Andersson,
Konrad Dybcio, Abhinav Kumar, Rob Herring, Stephen Boyd,
Andy Gross, dri-devel, Krzysztof Kozlowski, freedreno, Sean Paul
On 22/09/2022 13:47, Dmitry Baryshkov wrote:
>>>>
>>>> missing allOf
>>>
>>> Rob asked to remove this while reviewing v6 ([1]). And indeed the
>>> allOf's around a single $ref do not seem to be necessary
>>
>> He commented on one of properties, not top-level, maybe it is different
>> case for dtschema. In the past it was required, so are you sure
>> something changed in dtschema?
>
> I do not know if something has changed or not. But judging from the fact
> that unevaluatedProperties:false do not generate any warnings, the
> referenced schema is processed and applied.
Hm, indeed looking at the dtschema code should be no difference between
ref and allOf-ref.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
2022-09-22 11:46 ` Dmitry Baryshkov
@ 2022-09-22 12:28 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 12:28 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
On 22/09/2022 13:46, Dmitry Baryshkov wrote:
>>> - ranges: true
>>> + maxItems: 2
>>>
>>> interconnects:
>>> - items:
>>> - - description: Interconnect path from mdp0 port to the data bus
>>> - - description: Interconnect path from mdp1 port to the data bus
>>> + maxItems: 2
>>
>> I think this is not equivalent now, because you have in total minItems:1
>> and maxItems:2, while in past minItems was 2.
>
> This means that I should have minItems:2, maxItems:2, which, if I got it
> right, is frowned upon. Let me doublecheck though if it works as expected.
It is frowned upon only if it is alone, because for missing minItems,
maxItems implies minItems. Here you have minItems in other schema, so
there is no such case
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
@ 2022-09-22 12:28 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-22 12:28 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
On 22/09/2022 13:46, Dmitry Baryshkov wrote:
>>> - ranges: true
>>> + maxItems: 2
>>>
>>> interconnects:
>>> - items:
>>> - - description: Interconnect path from mdp0 port to the data bus
>>> - - description: Interconnect path from mdp1 port to the data bus
>>> + maxItems: 2
>>
>> I think this is not equivalent now, because you have in total minItems:1
>> and maxItems:2, while in past minItems was 2.
>
> This means that I should have minItems:2, maxItems:2, which, if I got it
> right, is frowned upon. Let me doublecheck though if it works as expected.
It is frowned upon only if it is alone, because for missing minItems,
maxItems implies minItems. Here you have minItems in other schema, so
there is no such case
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
2022-09-22 12:28 ` Krzysztof Kozlowski
@ 2022-09-23 20:32 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-23 20:32 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
On 22/09/2022 15:28, Krzysztof Kozlowski wrote:
> On 22/09/2022 13:46, Dmitry Baryshkov wrote:
>>>> - ranges: true
>>>> + maxItems: 2
>>>>
>>>> interconnects:
>>>> - items:
>>>> - - description: Interconnect path from mdp0 port to the data bus
>>>> - - description: Interconnect path from mdp1 port to the data bus
>>>> + maxItems: 2
>>>
>>> I think this is not equivalent now, because you have in total minItems:1
>>> and maxItems:2, while in past minItems was 2.
>>
>> This means that I should have minItems:2, maxItems:2, which, if I got it
>> right, is frowned upon. Let me doublecheck though if it works as expected.
>
> It is frowned upon only if it is alone, because for missing minItems,
> maxItems implies minItems. Here you have minItems in other schema, so
> there is no such case
Well, I just checked, the schema will throw an error if I put a single
interconnects or iommus entry. If I understand correctly these two
clauses are evaluated separately. So, the dpu-common's clause tells
minItems:1, maxItems:2. The platform schema file contains just
maxItems:2, which implicitly adds minItems:2 to _this_ clause.
Thus I think I'll leave this part as is.
For the reference (with single-entry iommus and interconnects properties):
/home/lumag/Projects/Qcomm/build-64/Documentation/devicetree/bindings/display/msm/dpu-sdm845.example.dtb:
display-subsystem@ae00000: iommus: [[4294967295, 2176, 8]] is too short
From schema:
/home/lumag/Projects/Qcomm/kernel/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
/home/lumag/Projects/Qcomm/build-64/Documentation/devicetree/bindings/display/msm/dpu-sdm845.example.dtb:
display-subsystem@ae00000: interconnects: [[4294967295, 1, 0,
4294967295, 1, 0]] is too short
From schema:
/home/lumag/Projects/Qcomm/kernel/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
@ 2022-09-23 20:32 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-09-23 20:32 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
On 22/09/2022 15:28, Krzysztof Kozlowski wrote:
> On 22/09/2022 13:46, Dmitry Baryshkov wrote:
>>>> - ranges: true
>>>> + maxItems: 2
>>>>
>>>> interconnects:
>>>> - items:
>>>> - - description: Interconnect path from mdp0 port to the data bus
>>>> - - description: Interconnect path from mdp1 port to the data bus
>>>> + maxItems: 2
>>>
>>> I think this is not equivalent now, because you have in total minItems:1
>>> and maxItems:2, while in past minItems was 2.
>>
>> This means that I should have minItems:2, maxItems:2, which, if I got it
>> right, is frowned upon. Let me doublecheck though if it works as expected.
>
> It is frowned upon only if it is alone, because for missing minItems,
> maxItems implies minItems. Here you have minItems in other schema, so
> there is no such case
Well, I just checked, the schema will throw an error if I put a single
interconnects or iommus entry. If I understand correctly these two
clauses are evaluated separately. So, the dpu-common's clause tells
minItems:1, maxItems:2. The platform schema file contains just
maxItems:2, which implicitly adds minItems:2 to _this_ clause.
Thus I think I'll leave this part as is.
For the reference (with single-entry iommus and interconnects properties):
/home/lumag/Projects/Qcomm/build-64/Documentation/devicetree/bindings/display/msm/dpu-sdm845.example.dtb:
display-subsystem@ae00000: iommus: [[4294967295, 2176, 8]] is too short
From schema:
/home/lumag/Projects/Qcomm/kernel/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
/home/lumag/Projects/Qcomm/build-64/Documentation/devicetree/bindings/display/msm/dpu-sdm845.example.dtb:
display-subsystem@ae00000: interconnects: [[4294967295, 1, 0,
4294967295, 1, 0]] is too short
From schema:
/home/lumag/Projects/Qcomm/kernel/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
2022-09-23 20:32 ` Dmitry Baryshkov
@ 2022-10-03 7:55 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-03 7:55 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
On 23/09/2022 22:32, Dmitry Baryshkov wrote:
> On 22/09/2022 15:28, Krzysztof Kozlowski wrote:
>> On 22/09/2022 13:46, Dmitry Baryshkov wrote:
>>>>> - ranges: true
>>>>> + maxItems: 2
>>>>>
>>>>> interconnects:
>>>>> - items:
>>>>> - - description: Interconnect path from mdp0 port to the data bus
>>>>> - - description: Interconnect path from mdp1 port to the data bus
>>>>> + maxItems: 2
>>>>
>>>> I think this is not equivalent now, because you have in total minItems:1
>>>> and maxItems:2, while in past minItems was 2.
>>>
>>> This means that I should have minItems:2, maxItems:2, which, if I got it
>>> right, is frowned upon. Let me doublecheck though if it works as expected.
>>
>> It is frowned upon only if it is alone, because for missing minItems,
>> maxItems implies minItems. Here you have minItems in other schema, so
>> there is no such case
>
> Well, I just checked, the schema will throw an error if I put a single
> interconnects or iommus entry. If I understand correctly these two
> clauses are evaluated separately. So, the dpu-common's clause tells
> minItems:1, maxItems:2. The platform schema file contains just
> maxItems:2, which implicitly adds minItems:2 to _this_ clause.
>
> Thus I think I'll leave this part as is.
Thanks for checking. It's good then.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml
@ 2022-10-03 7:55 ` Krzysztof Kozlowski
0 siblings, 0 replies; 64+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-03 7:55 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring,
Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
On 23/09/2022 22:32, Dmitry Baryshkov wrote:
> On 22/09/2022 15:28, Krzysztof Kozlowski wrote:
>> On 22/09/2022 13:46, Dmitry Baryshkov wrote:
>>>>> - ranges: true
>>>>> + maxItems: 2
>>>>>
>>>>> interconnects:
>>>>> - items:
>>>>> - - description: Interconnect path from mdp0 port to the data bus
>>>>> - - description: Interconnect path from mdp1 port to the data bus
>>>>> + maxItems: 2
>>>>
>>>> I think this is not equivalent now, because you have in total minItems:1
>>>> and maxItems:2, while in past minItems was 2.
>>>
>>> This means that I should have minItems:2, maxItems:2, which, if I got it
>>> right, is frowned upon. Let me doublecheck though if it works as expected.
>>
>> It is frowned upon only if it is alone, because for missing minItems,
>> maxItems implies minItems. Here you have minItems in other schema, so
>> there is no such case
>
> Well, I just checked, the schema will throw an error if I put a single
> interconnects or iommus entry. If I understand correctly these two
> clauses are evaluated separately. So, the dpu-common's clause tells
> minItems:1, maxItems:2. The platform schema file contains just
> maxItems:2, which implicitly adds minItems:2 to _this_ clause.
>
> Thus I think I'll leave this part as is.
Thanks for checking. It's good then.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 64+ messages in thread
end of thread, other threads:[~2022-10-03 8:22 UTC | newest]
Thread overview: 64+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-15 13:37 [PATCH v7 00/12] dt-bindings: display/msm: rework MDSS and DPU bindings Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-15 13:37 ` [PATCH v7 01/12] dt-bindings: display/msm: split qcom,mdss bindings Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-15 13:37 ` [PATCH v7 02/12] dt-bindings: display/msm: add gcc-bus clock to dpu-smd845 Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-15 13:37 ` [PATCH v7 03/12] dt-bindings: display/msm: add interconnects property to qcom,mdss-smd845 Dmitry Baryshkov
2022-09-15 13:37 ` [PATCH v7 03/12] dt-bindings: display/msm: add interconnects property to qcom, mdss-smd845 Dmitry Baryshkov
2022-09-22 7:00 ` [PATCH v7 03/12] dt-bindings: display/msm: add interconnects property to qcom,mdss-smd845 Krzysztof Kozlowski
2022-09-22 7:00 ` Krzysztof Kozlowski
2022-09-15 13:37 ` [PATCH v7 04/12] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-22 7:02 ` Krzysztof Kozlowski
2022-09-22 7:02 ` Krzysztof Kozlowski
2022-09-22 7:50 ` Dmitry Baryshkov
2022-09-22 7:50 ` Dmitry Baryshkov
2022-09-22 11:41 ` Krzysztof Kozlowski
2022-09-22 11:41 ` Krzysztof Kozlowski
2022-09-15 13:37 ` [PATCH v7 05/12] dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-22 7:04 ` Krzysztof Kozlowski
2022-09-22 7:04 ` Krzysztof Kozlowski
2022-09-22 11:46 ` Dmitry Baryshkov
2022-09-22 11:46 ` Dmitry Baryshkov
2022-09-22 12:28 ` Krzysztof Kozlowski
2022-09-22 12:28 ` Krzysztof Kozlowski
2022-09-23 20:32 ` Dmitry Baryshkov
2022-09-23 20:32 ` Dmitry Baryshkov
2022-10-03 7:55 ` Krzysztof Kozlowski
2022-10-03 7:55 ` Krzysztof Kozlowski
2022-09-22 7:05 ` Krzysztof Kozlowski
2022-09-22 7:05 ` Krzysztof Kozlowski
2022-09-22 7:53 ` Dmitry Baryshkov
2022-09-22 7:53 ` Dmitry Baryshkov
2022-09-22 11:43 ` Krzysztof Kozlowski
2022-09-22 11:43 ` Krzysztof Kozlowski
2022-09-22 11:47 ` Dmitry Baryshkov
2022-09-22 11:47 ` Dmitry Baryshkov
2022-09-22 12:27 ` Krzysztof Kozlowski
2022-09-22 12:27 ` Krzysztof Kozlowski
2022-09-15 13:37 ` [PATCH v7 06/12] dt-bindings: display/msm: split dpu-sc7180 into DPU and MDSS parts Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-22 7:08 ` Krzysztof Kozlowski
2022-09-22 7:08 ` Krzysztof Kozlowski
2022-09-22 10:30 ` Dmitry Baryshkov
2022-09-22 10:30 ` Dmitry Baryshkov
2022-09-22 12:19 ` Krzysztof Kozlowski
2022-09-22 12:19 ` Krzysztof Kozlowski
2022-09-15 13:37 ` [PATCH v7 07/12] dt-bindings: display/msm: split dpu-sc7280 " Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-15 13:37 ` [PATCH v7 08/12] dt-bindings: display/msm: split dpu-sdm845 " Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-15 13:37 ` [PATCH v7 09/12] dt-bindings: display/msm: split dpu-msm8998 " Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-15 13:37 ` [PATCH v7 10/12] dt-bindings: display/msm: split dpu-qcm2290 " Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-15 13:37 ` [PATCH v7 11/12] dt-bindings: display/msm: add missing device nodes to mdss-* schemas Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-22 7:09 ` Krzysztof Kozlowski
2022-09-22 7:09 ` Krzysztof Kozlowski
2022-09-15 13:37 ` [PATCH v7 12/12] dt-bindings: display/msm: add support for the display on SM8250 Dmitry Baryshkov
2022-09-15 13:37 ` Dmitry Baryshkov
2022-09-22 7:10 ` Krzysztof Kozlowski
2022-09-22 7:10 ` Krzysztof Kozlowski
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