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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/4] drm/i915: Always initialize dpll.lock
Date: Wed, 21 Sep 2022 15:23:40 +0300	[thread overview]
Message-ID: <20220921122343.13061-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220921122343.13061-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Initialize the dll.lock mutex whether or not we manage to
initialize the rest of the dpll mgr.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index e5fb66a5dd02..9c60cf69cde1 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -4193,6 +4193,8 @@ void intel_shared_dpll_init(struct drm_i915_private *dev_priv)
 	const struct dpll_info *dpll_info;
 	int i;
 
+	mutex_init(&dev_priv->display.dpll.lock);
+
 	if (IS_DG2(dev_priv))
 		/* No shared DPLLs on DG2; port PLLs are part of the PHY */
 		dpll_mgr = NULL;
@@ -4237,7 +4239,6 @@ void intel_shared_dpll_init(struct drm_i915_private *dev_priv)
 
 	dev_priv->display.dpll.mgr = dpll_mgr;
 	dev_priv->display.dpll.num_shared_dpll = i;
-	mutex_init(&dev_priv->display.dpll.lock);
 }
 
 /**
-- 
2.35.1


  reply	other threads:[~2022-09-21 12:23 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-21 12:23 [Intel-gfx] [PATCH 0/4] drm/i915: Start cleaning up the DPLL ID mess Ville Syrjala
2022-09-21 12:23 ` Ville Syrjala [this message]
2022-09-22 15:41   ` [Intel-gfx] [PATCH 1/4] drm/i915: Always initialize dpll.lock Jani Nikula
2022-09-21 12:23 ` [Intel-gfx] [PATCH 2/4] drm/i915: Nuke intel_get_shared_dpll_id() Ville Syrjala
2022-09-22 15:42   ` Jani Nikula
2022-09-21 12:23 ` [Intel-gfx] [PATCH 3/4] drm/i915: Stop requiring PLL index == PLL ID Ville Syrjala
2022-09-22 15:46   ` Jani Nikula
2022-09-22 19:57     ` Ville Syrjälä
2022-09-21 12:23 ` [Intel-gfx] [PATCH 4/4] drm/i915: Decouple I915_NUM_PLLS from PLL IDs Ville Syrjala
2022-09-22 15:55   ` Jani Nikula
2022-09-22 16:06     ` Ville Syrjälä
2022-09-21 12:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start cleaning up the DPLL ID mess Patchwork
2022-09-21 13:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-21 14:05 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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