From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB855C54EE9 for ; Thu, 22 Sep 2022 03:31:54 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9946584CA6; Thu, 22 Sep 2022 05:31:46 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ipUc5zOZ"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 5D7F884BCE; Thu, 22 Sep 2022 05:31:44 +0200 (CEST) Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B034484A6F for ; Thu, 22 Sep 2022 05:31:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=judge.packham@gmail.com Received: by mail-pf1-x42e.google.com with SMTP id c198so7948495pfc.13 for ; Wed, 21 Sep 2022 20:31:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=JhvPOIg7jv68h+YZ2W13r8751efHD1X1mZ1LrhIdxkg=; b=ipUc5zOZtJC91qnq7gn1K9heFJhMjT7Qmd1ebNniCJPnfqwF1xj1nfJgFT64ax/caQ l26KZRSATs3kNSf2x9rpTFyPx18XPxlzHaWHnZ1au+t9zTLPyniD16CkL3jyJYL7G9w/ 3QSH3J6t5sBoYRzTlxMZ6x7jXAbF6FmFg3qbLMoJyKyAFeEo7h7IErVbXfL/ybpXuCh5 u/49jIwJedSfZiNMxdR//EBG7j6F9z/YHEr4ZhqvCY+jVaq45QTzIsh1Gtic4YDi3zUQ 6G2XaXhe9LI1BhOZqUKpL3u454yxaEW2PcRNg5s0OkxkYnOLrtIXOpMPqJD6XsWwg1tw bldA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=JhvPOIg7jv68h+YZ2W13r8751efHD1X1mZ1LrhIdxkg=; b=M7RgHqTNfzrXmbTx3jRQAwZwD+2V7zzKFXZ/EW6LdYHxvh75nPPHTKi3lZ0QBo0hdV y9IQWo2wqjKP4q0OylZT698lLYdLyjOkkXbTIXioO6hEz7NNsJpX8Drdnkh3u762OmIK kdx8bJMlHkcuSxLiQ1+jwFM5PL5yvy+Fu4Gf9UfhJpSvKhn1dAYFfHWoOPfojWoKR66E EMjWlYy3iGRqIPd3YeTFYjPvTvLSX6AKLIaMWfyd97cSGY4u2a2LSa937le40bbjX/vm 2iXmI5r/0qqELwz/mZrSU3jSQYyrInbsHxJm8zgXYM04MhC+aFuagJ1u1P9ThlnMh8yf oadA== X-Gm-Message-State: ACrzQf0Ahs2Be9D0WopwD28Y5a/puuQB2gufkQZ9XublTQyER9dq/aHk yUzLerfUbTbu3thGeD0P7jFp50MpynmM00Yw X-Google-Smtp-Source: AMsMyM53oTrpQeBVR0iCoa+z5HeH3Q0I4vArzVhhlKU8zWSh5fbgxMQaYqri+9xoAID1tNbVd6OBiQ== X-Received: by 2002:a63:2cce:0:b0:434:e004:a218 with SMTP id s197-20020a632cce000000b00434e004a218mr1235641pgs.241.1663817499966; Wed, 21 Sep 2022 20:31:39 -0700 (PDT) Received: from chrisp-dl.atlnz.lc ([2001:df5:b000:22:6e20:c7c5:8cff:c796]) by smtp.gmail.com with ESMTPSA id a5-20020aa795a5000000b0054095e1b2e5sm2977444pfk.215.2022.09.21.20.31.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Sep 2022 20:31:39 -0700 (PDT) From: Chris Packham To: Stefan Roese Cc: Elad Nachman , Vadym Kochan , Chris Packham , Joe Hershberger , Ramon Fried , u-boot@lists.denx.de Subject: [PATCH v4 1/5] net: mvneta: Add support for AlleyCat5 Date: Thu, 22 Sep 2022 15:31:12 +1200 Message-Id: <20220922033116.915635-2-judge.packham@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220922033116.915635-1-judge.packham@gmail.com> References: <20220922033116.915635-1-judge.packham@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Add support for the AlleyCat5 SoC. This lacks the mbus from the other users of the mvneta.c driver so a new compatible string is needed to allow for a different window configuration. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese --- (no changes since v3) Changes in v3: - Remove unnecessary changes to RX descriptor handling - Use dev_get_dma_range() to parse dma-ranges property from parent device. drivers/net/Kconfig | 2 +- drivers/net/mvneta.c | 43 ++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 43 insertions(+), 2 deletions(-) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 6bbbadc5ee..8df3dce6df 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -448,7 +448,7 @@ config MVGBE config MVNETA bool "Marvell Armada XP/385/3700 network interface support" - depends on ARMADA_XP || ARMADA_38X || ARMADA_3700 + depends on ARMADA_XP || ARMADA_38X || ARMADA_3700 || ALLEYCAT_5 select PHYLIB select DM_MDIO help diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index d2c42c4396..0fbfad11d4 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -91,6 +91,8 @@ DECLARE_GLOBAL_DATA_PTR; #define MVNETA_WIN_SIZE_MASK (0xffff0000) #define MVNETA_BASE_ADDR_ENABLE 0x2290 #define MVNETA_BASE_ADDR_ENABLE_BIT 0x1 +#define MVNETA_AC5_CNM_DDR_TARGET 0x2 +#define MVNETA_AC5_CNM_DDR_ATTR 0xb #define MVNETA_PORT_ACCESS_PROTECT 0x2294 #define MVNETA_PORT_ACCESS_PROTECT_WIN0_RW 0x3 #define MVNETA_PORT_CONFIG 0x2400 @@ -282,6 +284,8 @@ struct mvneta_port { struct gpio_desc phy_reset_gpio; struct gpio_desc sfp_tx_disable_gpio; #endif + + uintptr_t dma_base; /* base address for DMA address decoding */ }; /* The mvneta_tx_desc and mvneta_rx_desc structures describe the @@ -1343,6 +1347,29 @@ static void mvneta_conf_mbus_windows(struct mvneta_port *pp) mvreg_write(pp, MVNETA_BASE_ADDR_ENABLE, win_enable); } +static void mvneta_conf_ac5_cnm_xbar_windows(struct mvneta_port *pp) +{ + int i; + + /* Clear all windows */ + for (i = 0; i < 6; i++) { + mvreg_write(pp, MVNETA_WIN_BASE(i), 0); + mvreg_write(pp, MVNETA_WIN_SIZE(i), 0); + + if (i < 4) + mvreg_write(pp, MVNETA_WIN_REMAP(i), 0); + } + + /* + * Setup window #0 base 0x0 to target XBAR port 2 (AMB2), attribute 0xb, size 4GB + * AMB2 address decoder remaps 0x0 to DDR 64 bit base address + */ + mvreg_write(pp, MVNETA_WIN_BASE(0), + (MVNETA_AC5_CNM_DDR_ATTR << 8) | MVNETA_AC5_CNM_DDR_TARGET); + mvreg_write(pp, MVNETA_WIN_SIZE(0), 0xffff0000); + mvreg_write(pp, MVNETA_BASE_ADDR_ENABLE, 0x3e); +} + /* Power up the port */ static int mvneta_port_power_up(struct mvneta_port *pp, int phy_mode) { @@ -1525,7 +1552,7 @@ static int mvneta_recv(struct udevice *dev, int flags, uchar **packetp) * No cache invalidation needed here, since the rx_buffer's are * located in a uncached memory region */ - *packetp = data; + *packetp = data + pp->dma_base; /* * Only mark one descriptor as free @@ -1544,6 +1571,10 @@ static int mvneta_probe(struct udevice *dev) struct ofnode_phandle_args sfp_args; #endif void *bd_space; + phys_addr_t cpu; + dma_addr_t bus; + u64 size; + int ret; /* * Allocate buffer area for descs and rx_buffers. This is only @@ -1577,9 +1608,18 @@ static int mvneta_probe(struct udevice *dev) /* Configure MBUS address windows */ if (device_is_compatible(dev, "marvell,armada-3700-neta")) mvneta_bypass_mbus_windows(pp); + else if (device_is_compatible(dev, "marvell,armada-ac5-neta")) + mvneta_conf_ac5_cnm_xbar_windows(pp); else mvneta_conf_mbus_windows(pp); + /* fetch dma ranges property */ + ret = dev_get_dma_range(dev, &cpu, &bus, &size); + if (!ret) + pp->dma_base = cpu; + else + pp->dma_base = 0; + #if CONFIG_IS_ENABLED(DM_GPIO) if (!dev_read_phandle_with_args(dev, "sfp", NULL, 0, 0, &sfp_args) && ofnode_is_enabled(sfp_args.node)) @@ -1620,6 +1660,7 @@ static const struct eth_ops mvneta_ops = { static const struct udevice_id mvneta_ids[] = { { .compatible = "marvell,armada-370-neta" }, + { .compatible = "marvell,armada-ac5-neta" }, { .compatible = "marvell,armada-xp-neta" }, { .compatible = "marvell,armada-3700-neta" }, { } -- 2.37.3