From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22FFBC3A59D for ; Fri, 21 Oct 2022 09:09:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230513AbiJUJJF (ORCPT ); Fri, 21 Oct 2022 05:09:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230516AbiJUJIz (ORCPT ); Fri, 21 Oct 2022 05:08:55 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B45E1A3E09 for ; Fri, 21 Oct 2022 02:08:53 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id l16-20020a05600c4f1000b003c6c0d2a445so1541195wmq.4 for ; Fri, 21 Oct 2022 02:08:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=vd4kM4iLHeRkVbVm5qnb83YtTvz+Uiv2cMXrmKRaEkw=; b=SkJyUMFNsDqLAGyKgQ/sjrrSN+HLQd++XI8/ZkHMxItPDlUVR3ajA3bDGOEeBG0To2 bV0KHxEzKcpC6gOXrRVW7tDgpBCU0eLP8BKBZoqDI62swfKN8OxClVHRkDdrHmi/fD6U eH5wyzyZDgZFIkAzLABhNvmxYrGJvdcBQjVVs+hnyZfrCN3DuIGY9AzT4qWzv8m/jsDa JeeKsVSYqWUvMBE6FbW4NxfNLFPyCoQArt9YpLX4WfrBNLp47w882R5pQJfLUDE9mVRl CtCxtuYRK+5NAsfJSKDgT2f42xn4cNWAUK3LFd2IJEnJhvPhq8MqITYyWCwQxkWKYX4E Hcfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vd4kM4iLHeRkVbVm5qnb83YtTvz+Uiv2cMXrmKRaEkw=; b=LK/YGB8wHDxvTwRtcE2k8NgTFkVErYojwvMMIfKK1lTXTd7oepDOhT1No7LOb+rJSX avlOO1xMRYaySZ5IGAv7CgJRH3GYvjZRt0vLkAfXQ5P7jXPEIFkx7hhIxLuRdXrbT4AL h08e56ViD2Qogf/Q5qIHE/70mk9wBqeN9orTpG6wFuScuGAiT05Fb6DvPWqVfyPWYXAo 7YIQsaTLl2ibvNrbsqBmwI8IlaKjwybDmeCd0/FAlYZ3mqicYv9i7oXDF5ioPrDXPQ2j FArZEP+I323R+KSDLzsB1xqYW1vMtBmZyss6/fqWVGVVLr8mdUsQf4FI9TuKcjrluZcM iYkA== X-Gm-Message-State: ACrzQf2/ViuLgF9vpv70ebPfppOCz/OZJULOCSOI/RCrgicvJusq/+aK NwDjM2/0qsyP8YIWzj9NdC2K/w== X-Google-Smtp-Source: AMsMyM6W4Tv1zSV3ApzexTkV6ChDGf/w4gpuwGXWRHVoNE1V5yDCRebZT8BJEY22Jci730jRA/peRw== X-Received: by 2002:a05:600c:502c:b0:3c6:f5ff:e089 with SMTP id n44-20020a05600c502c00b003c6f5ffe089mr12156663wmr.108.1666343331390; Fri, 21 Oct 2022 02:08:51 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id v10-20020a05600c444a00b003c6f27d275dsm2230286wmn.33.2022.10.21.02.08.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Oct 2022 02:08:51 -0700 (PDT) From: Neil Armstrong Date: Fri, 21 Oct 2022 11:06:39 +0200 Subject: [PATCH v4 03/11] arm: dts: qcom: mdm9615: add missing reg in cpu@0 node MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20220928-mdm9615-dt-schema-fixes-v4-3-dac2dfaac703@linaro.org> References: <20220928-mdm9615-dt-schema-fixes-v4-0-dac2dfaac703@linaro.org> In-Reply-To: <20220928-mdm9615-dt-schema-fixes-v4-0-dac2dfaac703@linaro.org> To: Bjorn Andersson , Satya Priya , Lee Jones , Krzysztof Kozlowski , Rob Herring , Konrad Dybcio , Dmitry Torokhov , Alexandre Belloni , Andy Gross , Alessandro Zummo Cc: Bjorn Andersson , linux-input@vger.kernel.org, linux-arm-msm@vger.kernel.org, Krzysztof Kozlowski , devicetree@vger.kernel.org, Neil Armstrong , Rob Herring , linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.10.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Fixes cpu@0: 'reg' is a required property from dtbs check. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong --- arch/arm/boot/dts/qcom-mdm9615.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index de36e4545e75..eaa3236f62db 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -27,6 +27,7 @@ cpus { cpu0: cpu@0 { compatible = "arm,cortex-a5"; + reg = <0>; device_type = "cpu"; next-level-cache = <&L2>; }; -- b4 0.10.1