From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3E7CC43219 for ; Thu, 29 Sep 2022 22:37:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230307AbiI2Whc (ORCPT ); Thu, 29 Sep 2022 18:37:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230018AbiI2WgU (ORCPT ); Thu, 29 Sep 2022 18:36:20 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FC311ED23B; Thu, 29 Sep 2022 15:32:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664490735; x=1696026735; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=/a1pKHmwhVYyv4Ui3rbvLcahiUY8jR6mb1CYyGIJjno=; b=OTpadoY8NEPNcnjC9kdrfP00MGEHsI8IUCV14af6DSRzxekgcj+qGz1p oEr9Xd5+uVaXghH/K5Aik4WGan1IJIqv2ElbA4z7/gBg1nb7JbAMUf4Kk CEHA7pSeb2rL2PmuJugHMyu8dNOmbIS142Tt/SUa3v+kYmcMSpfB1Vr6u buctIae5ud39O9LKsi71iZDlr9jDVD/gL45M5CKQiC8cpX8/JARKOpRCF 5HTDzWME20GIR++UPu+J/UbT8EmBJQP22+TeWV/UYxkINa4U9moaAdxZv FamFBF1I24IPB+v2oKpAQyOIxO39FBKHBm1jpeA8lZX1/xLCVEohmD0CB Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10485"; a="285182168" X-IronPort-AV: E=Sophos;i="5.93,356,1654585200"; d="scan'208";a="285182168" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2022 15:30:55 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10485"; a="691016364" X-IronPort-AV: E=Sophos;i="5.93,356,1654585200"; d="scan'208";a="691016364" Received: from sergungo-mobl.amr.corp.intel.com (HELO rpedgeco-desk.amr.corp.intel.com) ([10.251.25.88]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2022 15:30:53 -0700 From: Rick Edgecombe To: x86@kernel.org, "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H . J . Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V . Shankar" , Weijiang Yang , "Kirill A . Shutemov" , joao.moreira@intel.com, John Allen , kcc@google.com, eranian@google.com, rppt@kernel.org, jamorris@linux.microsoft.com, dethoma@microsoft.com Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 33/39] x86/cpufeatures: Limit shadow stack to Intel CPUs Date: Thu, 29 Sep 2022 15:29:30 -0700 Message-Id: <20220929222936.14584-34-rick.p.edgecombe@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220929222936.14584-1-rick.p.edgecombe@intel.com> References: <20220929222936.14584-1-rick.p.edgecombe@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Shadow stack is supported on newer AMD processors, but the kernel implementation has not been tested on them. Prevent basic issues from showing up for normal users by disabling shadow stack on all CPUs except Intel until it has been tested. At which point the limitation should be removed. Signed-off-by: Rick Edgecombe --- v1: - New patch. arch/x86/kernel/cpu/common.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index d7415bb556b2..f7cacc5698d5 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -606,6 +606,14 @@ static __always_inline void setup_cet(struct cpuinfo_x86 *c) if (!kernel_ibt && !user_shstk) return; + /* + * Shadow stack is supported on AMD processors, but has not been + * tested. Only support it on Intel processors until this is done. + * At which point, this vendor check should be removed. + */ + if (c->x86_vendor != X86_VENDOR_INTEL) + setup_clear_cpu_cap(X86_FEATURE_SHSTK); + if (kernel_ibt) msr = CET_ENDBR_EN; -- 2.17.1