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From: Stephen Boyd <sboyd@kernel.org>
To: Alex Helms <alexander.helms.jy@renesas.com>,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: robh+dt@kernel.org, mturquette@baylibre.com,
	alexander.helms.jy@renesas.com, michal.simek@xilinx.com,
	saeed.nowshadi@amd.com
Subject: Re: [PATCH 2/2] clk: Renesas versaclock7 ccf device driver
Date: Fri, 30 Sep 2022 17:34:48 -0700	[thread overview]
Message-ID: <20221001003450.7EFD4C433D6@smtp.kernel.org> (raw)
In-Reply-To: <20220912183613.22213-3-alexander.helms.jy@renesas.com>

Quoting Alex Helms (2022-09-12 11:36:13)
> Renesas Versaclock7 is a family of configurable clock generator ICs
> with fractional and integer dividers. This driver has basic support
> for the RC21008A device, a clock synthesizer with a crystal input and
> 8 outputs. The supports changing the FOD and IOD rates, and each
> output can be gated.
> 
> Signed-off-by: Alex Helms <alexander.helms.jy@renesas.com>
> ---

Applied to clk-next

  reply	other threads:[~2022-10-01  0:35 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-12 18:36 [PATCH v2 0/2] Renesas Versaclock7 Bindings and Clock Driver Alex Helms
2022-09-12 18:36 ` [PATCH 1/2] dt-bindings: Renesas versaclock7 device tree bindings Alex Helms
2022-10-01  0:32   ` Stephen Boyd
2022-09-12 18:36 ` [PATCH 2/2] clk: Renesas versaclock7 ccf device driver Alex Helms
2022-10-01  0:34   ` Stephen Boyd [this message]
2022-09-13 19:14 ` [PATCH v2 0/2] Renesas Versaclock7 Bindings and Clock Driver Nowshadi, Saeed
  -- strict thread matches above, loose matches on Subject: below --
2022-05-03 19:41 [PATCH " Alex Helms
2022-05-03 19:42 ` [PATCH 2/2] clk: Renesas versaclock7 ccf device driver Alex Helms

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