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[198.145.64.163]) by smtp.gmail.com with ESMTPSA id g8-20020a17090a4b0800b0020a61d0e4eesm5470654pjh.30.2022.10.03.11.04.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Oct 2022 11:04:28 -0700 (PDT) Date: Mon, 3 Oct 2022 11:04:27 -0700 From: Kees Cook To: Rick Edgecombe Cc: x86@kernel.org, "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H . J . Lu" , Jann Horn , Jonathan Corbet , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V . Shankar" , Weijiang Yang , "Kirill A . Shutemov" , joao.moreira@intel.com, John Allen , kcc@google.com, eranian@google.com, rppt@kernel.org, jamorris@linux.microsoft.com, dethoma@microsoft.com, Yu-cheng Yu , Michael Kerrisk Subject: Re: [PATCH v2 07/39] x86/cet: Add user control-protection fault handler Message-ID: <202210031055.62E60F6BBE@keescook> References: <20220929222936.14584-1-rick.p.edgecombe@intel.com> <20220929222936.14584-8-rick.p.edgecombe@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220929222936.14584-8-rick.p.edgecombe@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 29, 2022 at 03:29:04PM -0700, Rick Edgecombe wrote: > [...] > -#ifdef CONFIG_X86_KERNEL_IBT > +#if defined(CONFIG_X86_KERNEL_IBT) || defined(CONFIG_X86_SHADOW_STACK) This pattern is repeated several times. Perhaps there needs to be a CONFIG_X86_CET to make this more readable? Really just a style question. diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index b68eb75887b8..6cb52616e0cf 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1836,6 +1836,11 @@ config CC_HAS_IBT (CC_IS_CLANG && CLANG_VERSION >= 140000)) && \ $(as-instr,endbr64) +config X86_CET + def_bool n + help + CET features are enabled (IBT and/or Shadow Stack) + config X86_KERNEL_IBT prompt "Indirect Branch Tracking" bool @@ -1843,6 +1848,7 @@ config X86_KERNEL_IBT # https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f depends on !LD_IS_LLD || LLD_VERSION >= 140000 select OBJTOOL + select X86_CET help Build the kernel with support for Indirect Branch Tracking, a hardware support course-grain forward-edge Control Flow Integrity @@ -1945,6 +1951,7 @@ config X86_SHADOW_STACK def_bool n depends on ARCH_HAS_SHADOW_STACK select ARCH_USES_HIGH_VMA_FLAGS + select X86_CET help Shadow Stack protection is a hardware feature that detects function return address corruption. Today the kernel's support is limited to > [...] > +#if defined(CONFIG_X86_KERNEL_IBT) || defined(CONFIG_X86_SHADOW_STACK) > +DEFINE_IDTENTRY_ERRORCODE(exc_control_protection) > +{ > + if (!cpu_feature_enabled(X86_FEATURE_IBT) && > + !cpu_feature_enabled(X86_FEATURE_SHSTK)) { > + pr_err("Unexpected #CP\n"); > + BUG(); > + } I second Kirill's question here. This seems an entirely survivable (but highly unexpected) state. I think this whole "if" could just be replaced with: WARN_ON_ONCE(!cpu_feature_enabled(X86_FEATURE_IBT) && !cpu_feature_enabled(X86_FEATURE_SHSTK), "Unexpected #CP\n"); Otherwise this looks good to me. Reviewed-by: Kees Cook -- Kees Cook