From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2888C433FE for ; Mon, 3 Oct 2022 17:48:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229515AbiJCRsc (ORCPT ); Mon, 3 Oct 2022 13:48:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229495AbiJCRsT (ORCPT ); Mon, 3 Oct 2022 13:48:19 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4783717E25; Mon, 3 Oct 2022 10:48:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664819298; x=1696355298; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=32i7PipZSw6KqH6MkU9eJfthXyxPQbhK8WM6mxd9tBw=; b=Kx9Gdvpk0EWZwJFoQMdi5o8IrHk3chz+sOPahhi97D45Yf+8q/776WGN z+x0eqikv1PmlE+pSvjN+qvJk5fmU3nQTCxcdTDH5kuIrwcIYjokOcoR7 ggXeI3twWM+/aGF69c55hUSYoQAyi/5uD5lH++BgB7nVmZoSboEjyr216 QjVKTQu82hifRP0cmrCujYryaBDqui/Keyr9k6yv0C95zLwT7mUGqhGMY xmalSfHMbQBTna+qbO2CLE7Qk4EHaPL5XJ/8PxM2ZQrdRWSM65OrVd1Zp GHp8HWAp/Skjpc0jpETjSbpYN5qpZOrP0NT9R0Uog8pa/WTP78DxIZMiX w==; X-IronPort-AV: E=McAfee;i="6500,9779,10489"; a="301431894" X-IronPort-AV: E=Sophos;i="5.93,366,1654585200"; d="scan'208";a="301431894" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Oct 2022 10:47:42 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10489"; a="601318407" X-IronPort-AV: E=Sophos;i="5.93,366,1654585200"; d="scan'208";a="601318407" Received: from bandrei-mobl.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.37.219]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Oct 2022 10:47:31 -0700 Received: by box.shutemov.name (Postfix, from userid 1000) id 6BB78104CE4; Mon, 3 Oct 2022 20:47:27 +0300 (+03) Date: Mon, 3 Oct 2022 20:47:27 +0300 From: "Kirill A . Shutemov" To: Rick Edgecombe Cc: x86@kernel.org, "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H . J . Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V . Shankar" , Weijiang Yang , joao.moreira@intel.com, John Allen , kcc@google.com, eranian@google.com, rppt@kernel.org, jamorris@linux.microsoft.com, dethoma@microsoft.com, Yu-cheng Yu Subject: Re: [PATCH v2 14/39] mm: Introduce VM_SHADOW_STACK for shadow stack memory Message-ID: <20221003174727.vvposwdd4fmmi3hw@box.shutemov.name> References: <20220929222936.14584-1-rick.p.edgecombe@intel.com> <20220929222936.14584-15-rick.p.edgecombe@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220929222936.14584-15-rick.p.edgecombe@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 29, 2022 at 03:29:11PM -0700, Rick Edgecombe wrote: > From: Yu-cheng Yu > > A shadow stack PTE must be read-only and have _PAGE_DIRTY set. However, > read-only and Dirty PTEs also exist for copy-on-write (COW) pages. These > two cases are handled differently for page faults. Introduce > VM_SHADOW_STACK to track shadow stack VMAs. > > Signed-off-by: Yu-cheng Yu > Reviewed-by: Kirill A. Shutemov > Signed-off-by: Rick Edgecombe > Cc: Kees Cook > --- > Documentation/filesystems/proc.rst | 1 + > arch/x86/mm/mmap.c | 2 ++ > fs/proc/task_mmu.c | 3 +++ > include/linux/mm.h | 8 ++++++++ > 4 files changed, 14 insertions(+) > > diff --git a/Documentation/filesystems/proc.rst b/Documentation/filesystems/proc.rst > index e7aafc82be99..d54ff397947a 100644 > --- a/Documentation/filesystems/proc.rst > +++ b/Documentation/filesystems/proc.rst > @@ -560,6 +560,7 @@ encoded manner. The codes are the following: > mt arm64 MTE allocation tags are enabled > um userfaultfd missing tracking > uw userfaultfd wr-protect tracking > + ss shadow stack page > == ======================================= > > Note that there is no guarantee that every flag and associated mnemonic will > diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c > index c90c20904a60..f3f52c5e2fd6 100644 > --- a/arch/x86/mm/mmap.c > +++ b/arch/x86/mm/mmap.c > @@ -165,6 +165,8 @@ unsigned long get_mmap_base(int is_legacy) > > const char *arch_vma_name(struct vm_area_struct *vma) > { > + if (vma->vm_flags & VM_SHADOW_STACK) > + return "[shadow stack]"; > return NULL; > } > But why here? CONFIG_ARCH_HAS_SHADOW_STACK implies that there will be more than one arch that supports shadow stack. The name has to come from generic code too, no? -- Kiryl Shutsemau / Kirill A. Shutemov