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From: ira.weiny@intel.com
To: Dan Williams <dan.j.williams@intel.com>
Cc: Ira Weiny <ira.weiny@intel.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ben Widawsky <bwidawsk@kernel.org>,
	Steven Rostedt <rostedt@goodmis.org>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Davidlohr Bueso <dave@stgolabs.net>,
	linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org
Subject: [RFC V2 PATCH 09/11] cxl/test: Add specific events
Date: Mon, 10 Oct 2022 15:41:29 -0700	[thread overview]
Message-ID: <20221010224131.1866246-10-ira.weiny@intel.com> (raw)
In-Reply-To: <20221010224131.1866246-1-ira.weiny@intel.com>

From: Ira Weiny <ira.weiny@intel.com>

Each type of event has different trace point outputs.

Add mock General Media Event, DRAM event, and Memory Module Event
records to the mock list of events returned.

Signed-off-by: Ira Weiny <ira.weiny@intel.com>

---
Changes from RFC:
	Adjust for struct changes
	adjust for unaligned fields
---
 tools/testing/cxl/test/events.c | 70 +++++++++++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/tools/testing/cxl/test/events.c b/tools/testing/cxl/test/events.c
index 1913c321d16c..1d3dbeaf7794 100644
--- a/tools/testing/cxl/test/events.c
+++ b/tools/testing/cxl/test/events.c
@@ -189,6 +189,70 @@ struct cxl_event_record_raw hardware_replace = {
 	.data = { 0xDE, 0xAD, 0xBE, 0xEF },
 };
 
+struct cxl_event_gen_media gen_media = {
+	.hdr = {
+		.id = UUID_INIT(0xfbcd0a77, 0xc260, 0x417f,
+				0x85, 0xa9, 0x08, 0x8b, 0x16, 0x21, 0xeb, 0xa6),
+		.length = sizeof(struct cxl_event_gen_media),
+		.flags[0] = CXL_EVENT_RECORD_FLAG_PERMANENT,
+		/* .handle = Set dynamically */
+		.related_handle = cpu_to_le16(0),
+	},
+	.phys_addr = cpu_to_le64(0x2000),
+	.descriptor = CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,
+	.type = CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,
+	.transaction_type = CXL_GMER_TRANS_HOST_WRITE,
+	.validity_flags = { CXL_GMER_VALID_CHANNEL |
+			    CXL_GMER_VALID_RANK, 0 },
+	.channel = 1,
+	.rank = 30
+};
+
+struct cxl_event_dram dram = {
+	.hdr = {
+		.id = UUID_INIT(0x601dcbb3, 0x9c06, 0x4eab,
+				0xb8, 0xaf, 0x4e, 0x9b, 0xfb, 0x5c, 0x96, 0x24),
+		.length = sizeof(struct cxl_event_dram),
+		.flags[0] = CXL_EVENT_RECORD_FLAG_PERF_DEGRADED,
+		/* .handle = Set dynamically */
+		.related_handle = cpu_to_le16(0),
+	},
+	.phys_addr = cpu_to_le64(0x8000),
+	.descriptor = CXL_GMER_EVT_DESC_THRESHOLD_EVENT,
+	.type = CXL_GMER_MEM_EVT_TYPE_INV_ADDR,
+	.transaction_type = CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB,
+	.validity_flags = { CXL_DER_VALID_CHANNEL |
+			    CXL_DER_VALID_BANK_GROUP |
+			    CXL_DER_VALID_BANK |
+			    CXL_DER_VALID_COLUMN, 0 },
+	.channel = 1,
+	.bank_group = 5,
+	.bank = 2,
+	.column = { 0xDE, 0xAD},
+};
+
+struct cxl_event_mem_module mem_module = {
+	.hdr = {
+		.id = UUID_INIT(0xfe927475, 0xdd59, 0x4339,
+				0xa5, 0x86, 0x79, 0xba, 0xb1, 0x13, 0xb7, 0x74),
+		.length = sizeof(struct cxl_event_mem_module),
+		/* .handle = Set dynamically */
+		.related_handle = cpu_to_le16(0),
+	},
+	.event_type = CXL_MMER_TEMP_CHANGE,
+	.info = {
+		.health_status = CXL_DHI_HS_PERFORMANCE_DEGRADED,
+		.media_status = CXL_DHI_MS_ALL_DATA_LOST,
+		.add_status = (CXL_DHI_AS_CRITICAL << 2) |
+			      (CXL_DHI_AS_WARNING << 4) |
+			      (CXL_DHI_AS_WARNING << 5),
+		.device_temp = { 0xDE, 0xAD},
+		.dirty_shutdown_cnt = { 0xde, 0xad, 0xbe, 0xef },
+		.cor_vol_err_cnt = { 0xde, 0xad, 0xbe, 0xef },
+		.cor_per_err_cnt = { 0xde, 0xad, 0xbe, 0xef },
+	}
+};
+
 void cxl_mock_add_event_logs(struct cxl_dev_state *cxlds)
 {
 	struct device *dev = cxlds->dev;
@@ -207,8 +271,14 @@ void cxl_mock_add_event_logs(struct cxl_dev_state *cxlds)
 	}
 
 	event_store_add_event(mes, CXL_EVENT_TYPE_INFO, &maint_needed);
+	event_store_add_event(mes, CXL_EVENT_TYPE_INFO,
+			      (struct cxl_event_record_raw *)&gen_media);
+	event_store_add_event(mes, CXL_EVENT_TYPE_INFO,
+			      (struct cxl_event_record_raw *)&mem_module);
 
 	event_store_add_event(mes, CXL_EVENT_TYPE_FATAL, &hardware_replace);
+	event_store_add_event(mes, CXL_EVENT_TYPE_FATAL,
+			      (struct cxl_event_record_raw *)&dram);
 
 }
 EXPORT_SYMBOL_GPL(cxl_mock_add_event_logs);
-- 
2.37.2


  parent reply	other threads:[~2022-10-10 22:43 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-10 22:41 [RFC V2 PATCH 00/11] CXL: Process event logs ira.weiny
2022-10-10 22:41 ` [RFC V2 PATCH 01/11] cxl/mbox: Add debug of hardware error code ira.weiny
2022-10-11 10:41   ` Jonathan Cameron
2022-10-14 16:29   ` Davidlohr Bueso
2022-10-14 16:31     ` Davidlohr Bueso
2022-10-14 17:00       ` Ira Weiny
2022-10-10 22:41 ` [RFC V2 PATCH 02/11] cxl/mem: Implement Get Event Records command ira.weiny
2022-10-11 12:39   ` Jonathan Cameron
2022-10-14 19:21     ` Ira Weiny
2022-10-15 11:28   ` Steven Rostedt
2022-10-16 21:43     ` Ira Weiny
2022-10-20 21:50   ` Smita Koralahalli
2022-10-21  5:11     ` Ira Weiny
2022-10-10 22:41 ` [RFC V2 PATCH 03/11] cxl/mem: Implement Clear " ira.weiny
2022-10-10 22:41 ` [RFC V2 PATCH 04/11] cxl/mem: Clear events on driver load ira.weiny
2022-10-11 12:42   ` Jonathan Cameron
2022-10-10 22:41 ` [RFC V2 PATCH 05/11] cxl/mem: Trace General Media Event Record ira.weiny
2022-10-11 12:57   ` Jonathan Cameron
2022-10-14 23:33     ` Ira Weiny
2022-10-17 16:37       ` Jonathan Cameron
2022-10-17 17:21         ` Steven Rostedt
2022-10-18  9:46           ` Jonathan Cameron
2022-10-21  5:13             ` Ira Weiny
2022-10-15 11:30   ` Steven Rostedt
2022-10-10 22:41 ` [RFC V2 PATCH 06/11] cxl/mem: Trace DRAM " ira.weiny
2022-10-11 13:47   ` Jonathan Cameron
2022-10-14 23:45     ` Ira Weiny
2022-10-15 11:31   ` Steven Rostedt
2022-10-10 22:41 ` [RFC V2 PATCH 07/11] cxl/mem: Trace Memory Module " ira.weiny
2022-10-11 13:54   ` Jonathan Cameron
2022-10-15 11:32   ` Steven Rostedt
2022-10-10 22:41 ` [RFC V2 PATCH 08/11] cxl/test: Add generic mock events ira.weiny
2022-10-10 22:41 ` ira.weiny [this message]
2022-10-10 22:41 ` [RFC V2 PATCH 10/11] cxl/test: Simulate event log overflow ira.weiny
2022-10-10 22:41 ` [RFC V2 PATCH 11/11] cxl/mem: Wire up event interrupts ira.weiny
2022-10-12 18:01   ` Davidlohr Bueso

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