From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12DC5C433FE for ; Mon, 17 Oct 2022 07:05:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230073AbiJQHFn (ORCPT ); Mon, 17 Oct 2022 03:05:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230117AbiJQHF3 (ORCPT ); Mon, 17 Oct 2022 03:05:29 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 004C42EF09 for ; Mon, 17 Oct 2022 00:05:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1665990328; x=1697526328; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DL1NrWy8aJKqkxgKu4Cp4Zlan8SfvCNr6zBtR8Rpb9I=; b=EhZyhV2x6SKeIdg6uMCJvJn0GZW+tPL5zmauFc+y2wxpBrP3JfdCkbEu YjuIXT/kY3jI7Eq9lnEehehWq6Q+NoBKGiCIaMGJY1ct7kXaq+Vw/3Ql/ A2D1ByUeYnLSrabEX5WUMcxCkpT5/XPkiE72JlnYtu8q8Xz0zfckG/yFi GlnZd3iuQ8nVPqnPBad7D67hrIjt+LVWHe87MIT0HUOIP1KCHqSFGLVHe YCbT2bpLxVtVR71dyokhrdholcCEd9fk5R4Fa0jI8SR3U6A7n4hCPCD4K nbnEl7xSTKIcc+K1QO/mZCuNlcn9sucWdtgh0U+c9zyLGkdVoff75HFLC A==; X-IronPort-AV: E=McAfee;i="6500,9779,10502"; a="306805993" X-IronPort-AV: E=Sophos;i="5.95,190,1661842800"; d="scan'208";a="306805993" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2022 00:05:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10502"; a="579271398" X-IronPort-AV: E=Sophos;i="5.95,190,1661842800"; d="scan'208";a="579271398" Received: from sqa-gate.sh.intel.com (HELO robert-clx2.tsp.org) ([10.239.48.212]) by orsmga003.jf.intel.com with ESMTP; 17 Oct 2022 00:05:20 -0700 From: Robert Hoo To: seanjc@google.com, pbonzini@redhat.com Cc: kvm@vger.kernel.org, Robert Hoo , Jingqi Liu Subject: [PATCH 5/9] KVM: x86: MMU: Integrate LAM bits when build guest CR3 Date: Mon, 17 Oct 2022 15:04:46 +0800 Message-Id: <20221017070450.23031-6-robert.hu@linux.intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20221017070450.23031-1-robert.hu@linux.intel.com> References: <20221017070450.23031-1-robert.hu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org When calc the new CR3 value, take LAM bits in. Signed-off-by: Robert Hoo Reviewed-by: Jingqi Liu --- arch/x86/kvm/mmu.h | 5 +++++ arch/x86/kvm/vmx/vmx.c | 3 ++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h index 6bdaacb6faa0..866f2b7cb509 100644 --- a/arch/x86/kvm/mmu.h +++ b/arch/x86/kvm/mmu.h @@ -142,6 +142,11 @@ static inline unsigned long kvm_get_active_pcid(struct kvm_vcpu *vcpu) return kvm_get_pcid(vcpu, kvm_read_cr3(vcpu)); } +static inline u64 kvm_get_active_lam(struct kvm_vcpu *vcpu) +{ + return kvm_read_cr3(vcpu) & (X86_CR3_LAM_U48 | X86_CR3_LAM_U57); +} + static inline void kvm_mmu_load_pgd(struct kvm_vcpu *vcpu) { u64 root_hpa = vcpu->arch.mmu->root.hpa; diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 97a2b8759ce8..ffb82daee1d3 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -3305,7 +3305,8 @@ static void vmx_load_mmu_pgd(struct kvm_vcpu *vcpu, hpa_t root_hpa, update_guest_cr3 = false; vmx_ept_load_pdptrs(vcpu); } else { - guest_cr3 = root_hpa | kvm_get_active_pcid(vcpu); + guest_cr3 = root_hpa | kvm_get_active_pcid(vcpu) | + kvm_get_active_lam(vcpu); } if (update_guest_cr3) -- 2.31.1