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Fri, 4 Nov 2022 09:18:08 -0400 (EDT) From: Maxime Ripard Date: Fri, 04 Nov 2022 14:17:27 +0100 Subject: [PATCH v2 10/65] clk: k210: pll: Add a determine_rate hook MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20221018-clk-range-checks-fixes-v2-10-f6736dec138e@cerno.tech> References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> To: Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Ulf Hansson , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , Andreas Färber , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Linus Walleij , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , David Lechner , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven X-Mailer: b4 0.11.0-dev-99e3a X-Developer-Signature: v=1; a=openpgp-sha256; l=3687; i=maxime@cerno.tech; h=from:subject:message-id; bh=6IusAj9w3/tB8c67BjbXsxFLlirYjqevo85MFxaRu+Q=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmpAp9nzthWO/9t0mWP8nM3/zoJhbxUmy21Sfoov+JM69Pr Dvfqd5SyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAi07sYGVoy354y73h5YENih8nUsr g9MW+nWu4+9+yQcnpXSND8d0cYGf6tkbWT0VozTcysrrua6ZDO77JVH8/Or98hHfVx9uLcRcwA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-Mailman-Approved-At: Sat, 05 Nov 2022 08:03:31 +0100 Cc: linux-rtc@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, patches@opensource.cirrus.com, linux-actions@lists.infradead.org, linux-mips@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-tegra@vger.kernel.org, linux-mediatek@lists.infradead.org, Maxime Ripard , linux-phy@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" The K210 PLL clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. __clk_mux_determine_rate() has the exact same behavior when CLK_SET_RATE_NO_REPARENT is set. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard --- drivers/clk/clk-k210.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk-k210.c b/drivers/clk/clk-k210.c index 67a7cb3503c3..279931a38127 100644 --- a/drivers/clk/clk-k210.c +++ b/drivers/clk/clk-k210.c @@ -537,6 +537,7 @@ static const struct clk_ops k210_pll2_ops = { .disable = k210_pll_disable, .is_enabled = k210_pll_is_enabled, .recalc_rate = k210_pll_get_rate, + .determine_rate = __clk_mux_determine_rate, .set_parent = k210_pll2_set_parent, .get_parent = k210_pll2_get_parent, }; @@ -544,7 +545,8 @@ static const struct clk_ops k210_pll2_ops = { static int __init k210_register_pll(struct device_node *np, struct k210_sysclk *ksc, enum k210_pll_id pllid, const char *name, - int num_parents, const struct clk_ops *ops) + int num_parents, const struct clk_ops *ops, + unsigned long flags) { struct k210_pll *pll = &ksc->plls[pllid]; struct clk_init_data init = {}; @@ -558,6 +560,7 @@ static int __init k210_register_pll(struct device_node *np, init.parent_data = parent_data; init.num_parents = num_parents; init.ops = ops; + init.flags = flags; pll->hw.init = &init; pll->ksc = ksc; @@ -574,19 +577,20 @@ static int __init k210_register_plls(struct device_node *np, k210_init_pll(ksc->regs, i, &ksc->plls[i]); /* PLL0 and PLL1 only have IN0 as parent */ - ret = k210_register_pll(np, ksc, K210_PLL0, "pll0", 1, &k210_pll_ops); + ret = k210_register_pll(np, ksc, K210_PLL0, "pll0", 1, &k210_pll_ops, 0); if (ret) { pr_err("%pOFP: register PLL0 failed\n", np); return ret; } - ret = k210_register_pll(np, ksc, K210_PLL1, "pll1", 1, &k210_pll_ops); + ret = k210_register_pll(np, ksc, K210_PLL1, "pll1", 1, &k210_pll_ops, 0); if (ret) { pr_err("%pOFP: register PLL1 failed\n", np); return ret; } /* PLL2 has IN0, PLL0 and PLL1 as parents */ - ret = k210_register_pll(np, ksc, K210_PLL2, "pll2", 3, &k210_pll2_ops); + ret = k210_register_pll(np, ksc, K210_PLL2, "pll2", 3, &k210_pll2_ops, + CLK_SET_RATE_NO_REPARENT); if (ret) { pr_err("%pOFP: register PLL2 failed\n", np); return ret; -- b4 0.11.0-dev-99e3a From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from new1-smtp.messagingengine.com (new1-smtp.messagingengine.com [66.111.4.221]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3DBD81856 for ; Fri, 4 Nov 2022 13:18:10 +0000 (UTC) Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailnew.nyi.internal (Postfix) with ESMTP id 5FD305804B2; Fri, 4 Nov 2022 09:18:09 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute3.internal (MEProxy); Fri, 04 Nov 2022 09:18:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h=cc :cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm3; t=1667567889; x= 1667575089; bh=HSdFwQ3aW19zofmGUIyzD52AzOA8mMIUukqySVU5Fxw=; b=g exMH46JBY4nrfTxtsAVPMinzBNkX+8+g6BdrM/jCohcU7TfjvqLP0pv8xrPVI573 L32KLdvZgWspf84qIDSefyC55ognb8gtlpa4gyenbzihCDx9B+aeBh75uAKsuPc/ OMePI4Ukr7zyZf8TAWbbpTjlf1tGfjlMB5KhJq2OWRwSrsvReua9KUhfdINkY1HI 5+00U+dfoHwTRfbfqfqRWy+6Y2D5LQc3aw1yaF3AXQuMQMTXHPG90kHp+DvsjSbL 3f51o4E9huiwauUyMwg7M9+PCvOrGMJfpm+q7BjlKokD5jSnl0kEapRyCSSE36OC WUzsSr9BxIAmcSlZUqCnQ== DKIM-Signature: v=1; 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Fri, 4 Nov 2022 09:18:08 -0400 (EDT) From: Maxime Ripard Date: Fri, 04 Nov 2022 14:17:27 +0100 Subject: [PATCH v2 10/65] clk: k210: pll: Add a determine_rate hook Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20221018-clk-range-checks-fixes-v2-10-f6736dec138e@cerno.tech> References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> To: Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Ulf Hansson , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , Andreas Färber , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Linus Walleij , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , David Lechner , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven Cc: linux-stm32@st-md-mailman.stormreply.com, alsa-devel@alsa-project.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-mips@vger.kernel.org, Maxime Ripard , linux-renesas-soc@vger.kernel.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, AngeloGioacchino Del Regno , patches@opensource.cirrus.com, linux-tegra@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org X-Mailer: b4 0.11.0-dev-99e3a X-Developer-Signature: v=1; a=openpgp-sha256; l=3687; i=maxime@cerno.tech; h=from:subject:message-id; bh=6IusAj9w3/tB8c67BjbXsxFLlirYjqevo85MFxaRu+Q=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmpAp9nzthWO/9t0mWP8nM3/zoJhbxUmy21Sfoov+JM69Pr Dvfqd5SyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAi07sYGVoy354y73h5YENih8nUsr g9MW+nWu4+9+yQcnpXSND8d0cYGf6tkbWT0VozTcysrrua6ZDO77JVH8/Or98hHfVx9uLcRcwA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D The K210 PLL clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. __clk_mux_determine_rate() has the exact same behavior when CLK_SET_RATE_NO_REPARENT is set. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard --- drivers/clk/clk-k210.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk-k210.c b/drivers/clk/clk-k210.c index 67a7cb3503c3..279931a38127 100644 --- a/drivers/clk/clk-k210.c +++ b/drivers/clk/clk-k210.c @@ -537,6 +537,7 @@ static const struct clk_ops k210_pll2_ops = { .disable = k210_pll_disable, .is_enabled = k210_pll_is_enabled, .recalc_rate = k210_pll_get_rate, + .determine_rate = __clk_mux_determine_rate, .set_parent = k210_pll2_set_parent, .get_parent = k210_pll2_get_parent, }; @@ -544,7 +545,8 @@ static const struct clk_ops k210_pll2_ops = { static int __init k210_register_pll(struct device_node *np, struct k210_sysclk *ksc, enum k210_pll_id pllid, const char *name, - int num_parents, const struct clk_ops *ops) + int num_parents, const struct clk_ops *ops, + unsigned long flags) { struct k210_pll *pll = &ksc->plls[pllid]; struct clk_init_data init = {}; @@ -558,6 +560,7 @@ static int __init k210_register_pll(struct device_node *np, init.parent_data = parent_data; init.num_parents = num_parents; init.ops = ops; + init.flags = flags; pll->hw.init = &init; pll->ksc = ksc; @@ -574,19 +577,20 @@ static int __init k210_register_plls(struct device_node *np, k210_init_pll(ksc->regs, i, &ksc->plls[i]); /* PLL0 and PLL1 only have IN0 as parent */ - ret = k210_register_pll(np, ksc, K210_PLL0, "pll0", 1, &k210_pll_ops); + ret = k210_register_pll(np, ksc, K210_PLL0, "pll0", 1, &k210_pll_ops, 0); if (ret) { pr_err("%pOFP: register PLL0 failed\n", np); return ret; } - ret = k210_register_pll(np, ksc, K210_PLL1, "pll1", 1, &k210_pll_ops); + ret = k210_register_pll(np, ksc, K210_PLL1, "pll1", 1, &k210_pll_ops, 0); if (ret) { pr_err("%pOFP: register PLL1 failed\n", np); return ret; } /* PLL2 has IN0, PLL0 and PLL1 as parents */ - ret = k210_register_pll(np, ksc, K210_PLL2, "pll2", 3, &k210_pll2_ops); + ret = k210_register_pll(np, ksc, K210_PLL2, "pll2", 3, &k210_pll2_ops, + CLK_SET_RATE_NO_REPARENT); if (ret) { pr_err("%pOFP: register PLL2 failed\n", np); return ret; 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Fri, 4 Nov 2022 09:18:08 -0400 (EDT) From: Maxime Ripard Date: Fri, 04 Nov 2022 14:17:27 +0100 Subject: [PATCH v2 10/65] clk: k210: pll: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v2-10-f6736dec138e@cerno.tech> References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> To: Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Ulf Hansson , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , Andreas Färber , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Linus Walleij , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , David Lechner , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven Cc: linux-stm32@st-md-mailman.stormreply.com, alsa-devel@alsa-project.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-mips@vger.kernel.org, Maxime Ripard , linux-renesas-soc@vger.kernel.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, AngeloGioacchino Del Regno , patches@opensource.cirrus.com, linux-tegra@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org X-Mailer: b4 0.11.0-dev-99e3a X-Developer-Signature: v=1; a=openpgp-sha256; l=3687; i=maxime@cerno.tech; h=from:subject:message-id; bh=6IusAj9w3/tB8c67BjbXsxFLlirYjqevo85MFxaRu+Q=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmpAp9nzthWO/9t0mWP8nM3/zoJhbxUmy21Sfoov+JM69Pr Dvfqd5SyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAi07sYGVoy354y73h5YENih8nUsr g9MW+nWu4+9+yQcnpXSND8d0cYGf6tkbWT0VozTcysrrua6ZDO77JVH8/Or98hHfVx9uLcRcwA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221104_061810_387706_59DFA2E1 X-CRM114-Status: GOOD ( 19.48 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org The K210 PLL clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. __clk_mux_determine_rate() has the exact same behavior when CLK_SET_RATE_NO_REPARENT is set. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard --- drivers/clk/clk-k210.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk-k210.c b/drivers/clk/clk-k210.c index 67a7cb3503c3..279931a38127 100644 --- a/drivers/clk/clk-k210.c +++ b/drivers/clk/clk-k210.c @@ -537,6 +537,7 @@ static const struct clk_ops k210_pll2_ops = { .disable = k210_pll_disable, .is_enabled = k210_pll_is_enabled, .recalc_rate = k210_pll_get_rate, + .determine_rate = __clk_mux_determine_rate, .set_parent = k210_pll2_set_parent, .get_parent = k210_pll2_get_parent, }; @@ -544,7 +545,8 @@ static const struct clk_ops k210_pll2_ops = { static int __init k210_register_pll(struct device_node *np, struct k210_sysclk *ksc, enum k210_pll_id pllid, const char *name, - int num_parents, const struct clk_ops *ops) + int num_parents, const struct clk_ops *ops, + unsigned long flags) { struct k210_pll *pll = &ksc->plls[pllid]; struct clk_init_data init = {}; @@ -558,6 +560,7 @@ static int __init k210_register_pll(struct device_node *np, init.parent_data = parent_data; init.num_parents = num_parents; init.ops = ops; + init.flags = flags; pll->hw.init = &init; pll->ksc = ksc; @@ -574,19 +577,20 @@ static int __init k210_register_plls(struct device_node *np, k210_init_pll(ksc->regs, i, &ksc->plls[i]); /* PLL0 and PLL1 only have IN0 as parent */ - ret = k210_register_pll(np, ksc, K210_PLL0, "pll0", 1, &k210_pll_ops); + ret = k210_register_pll(np, ksc, K210_PLL0, "pll0", 1, &k210_pll_ops, 0); if (ret) { pr_err("%pOFP: register PLL0 failed\n", np); return ret; } - ret = k210_register_pll(np, ksc, K210_PLL1, "pll1", 1, &k210_pll_ops); + ret = k210_register_pll(np, ksc, K210_PLL1, "pll1", 1, &k210_pll_ops, 0); if (ret) { pr_err("%pOFP: register PLL1 failed\n", np); return ret; } /* PLL2 has IN0, PLL0 and PLL1 as parents */ - ret = k210_register_pll(np, ksc, K210_PLL2, "pll2", 3, &k210_pll2_ops); + ret = k210_register_pll(np, ksc, K210_PLL2, "pll2", 3, &k210_pll2_ops, + CLK_SET_RATE_NO_REPARENT); if (ret) { pr_err("%pOFP: register PLL2 failed\n", np); return ret; -- b4 0.11.0-dev-99e3a -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy