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Fri, 5 May 2023 07:25:27 -0400 (EDT) From: Maxime Ripard Subject: [PATCH v4 00/68] clk: Make determine_rate mandatory for muxes Date: Fri, 05 May 2023 13:25:02 +0200 Message-Id: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAI7nVGQC/43NzQ6CMAwH8FchOzuztQymJ9/DeIBRZIFAsuGiI by7lZvxIKfm349fFxEpeIrinC0iUPLRTyOH/JAJ11XjnaRvOAtQAFppK93Qy7ANXEeuj7L1T4o SFJ5aNICQK8HHdRVJ1rzoOj4fH8PAzc7HeQqv7VnSXK5/3aSlki1Sa5XRVufq4iiM03Emhm9sJ tjnwMcpSiwachot/Ti4z0F2TpVGY/MSGgNfzrqubzQ7VSJSAQAA To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Abel Vesa , Alessandro Zummo , Alexandre Belloni , Alexandre Torgue , =?utf-8?q?Andreas_F=C3=A4rber?= , AngeloGioacchino Del Regno , Baolin Wang , Charles Keepax , Chen-Yu Tsai , Chen-Yu Tsai , Chunyan Zhang , Claudiu Beznea , Daniel Vetter , David Airlie , David Lechner , Dinh Nguyen , Fabio Estevam , Geert Uytterhoeven , Jaroslav Kysela , Jernej Skrabec , Jonathan Hunter , Kishon Vijay Abraham I , Liam Girdwood , Linus Walleij , Luca Ceresoli , Manivannan Sadhasivam , Mark Brown , Markus Schneider-Pargmann , Max Filippov , Maxime Coquelin , Mikko Perttunen , Miles Chen , Nicolas Ferre , Orson Zhai , Paul Cercueil , Peng Fan , Peter De Schrijver , Prashant Gaikwad , Richard Fitzgerald , Samuel Holland , Sascha Hauer , Sekhar Nori , Shawn Guo , Takashi Iwai , Thierry Reding , Ulf Hansson , Vinod Koul , dri-devel@lists.freedesktop.org, linux-actions@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-phy@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rtc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, NXP Linux Team , patches@opensource.cirrus.com, Pengutronix Kernel Team , Liam Beguin , Matthias Brugger , linux-mediatek@lists.infradead.org, Miquel Raynal , Pawel Moll , alsa-devel@alsa-project.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=8811; i=maxime@cerno.tech; h=from:subject:message-id; bh=DTutEgCIMF28vydDZ/bIJ7FNCahxgFT27xgwey0IUAI=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxe9Xxi/3cvxVqX7ota1NvX8JiY10syKs/hVXlh2s5Wr xyh3lLIwiHExyIopssQImy+JOzXrdScb3zyYOaxMIEMYuDgFYCIG0Qz/3R5ZNfhd/XJhS3zivh2awt u3XDHevLprI+OV15f2zRd/0czIcHfvjUN8sh+uf+NwWChWIG+Rz7NssnmgDruxem/tXuG77AA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Hi, This is a follow-up to a previous series that was printing a warning when a mux has a set_parent implementation but is missing determine_rate(). The rationale is that set_parent() is very likely to be useful when changing the rate, but it's determine_rate() that takes the parenting decision. If we're missing it, then the current parent is always going to be used, and thus set_parent() will not be used. The only exception being a direct call to clk_set_parent(), but those are fairly rare compared to clk_set_rate(). Stephen then asked to promote the warning to an error, and to fix up all the muxes that are in that situation first. So here it is :) It was build-tested on x86, arm and arm64. Affected drivers have been tracked down by the following coccinelle script: virtual report @ clk_ops @ identifier ops; position p; @@ struct clk_ops ops@p = { ... }; @ has_set_parent @ identifier clk_ops.ops; identifier set_parent_f; @@ struct clk_ops ops = { .set_parent = set_parent_f, }; @ has_determine_rate @ identifier clk_ops.ops; identifier determine_rate_f; @@ struct clk_ops ops = { .determine_rate = determine_rate_f, }; @ script:python depends on report && has_set_parent && !has_determine_rate @ ops << clk_ops.ops; set_parent_f << has_set_parent.set_parent_f; p << clk_ops.p; @@ coccilib.report.print_report(p[0], "ERROR: %s has set_parent (%s)" % (ops, set_parent_f)) Berlin is the only user still matching after this series has been applied, but it's because it uses a composite clock which throws the script off. The driver has been converted and shouldn't be a problem. Let me know what you think, Maxime Signed-off-by: Maxime Ripard --- Changes in v4: - Switch from __clk_mux_determine_rate to a new helper - Introduced unit tests for that new helper - Fix kunit regression - Reworded most of the commit logs - Link to v3: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v3-0-9a1358472d52@cerno.tech Changes in v3: - Rebased on top of next-20230404 - Link to v2: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech Changes in v2: - Drop all the patches already applied - Promote the clk registration warning to an error - Make all muxes use determine_rate - Link to v1: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v1-0-f3ef80518140@cerno.tech --- Maxime Ripard (66): clk: Export clk_hw_forward_rate_request() clk: test: Fix type sign of rounded rate variables clk: lan966x: Remove unused round_rate hook clk: nodrv: Add a determine_rate hook clk: test: Add a determine_rate hook clk: actions: composite: Add a determine_rate hook for pass clk clk: at91: main: Add a determine_rate hook clk: at91: sckc: Add a determine_rate hook clk: berlin: div: Add a determine_rate hook clk: cdce706: Add a determine_rate hook clk: k210: pll: Add a determine_rate hook clk: k210: aclk: Add a determine_rate hook clk: k210: mux: Add a determine_rate hook clk: lmk04832: clkout: Add a determine_rate hook clk: lochnagar: Add a determine_rate hook clk: qoriq: Add a determine_rate hook clk: si5341: Add a determine_rate hook clk: stm32f4: mux: Add a determine_rate hook clk: vc5: mux: Add a determine_rate hook clk: vc5: clkout: Add a determine_rate hook clk: wm831x: clkout: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: imx: busy: Add a determine_rate hook clk: imx: fixup-mux: Add a determine_rate hook clk: imx: scu: Add a determine_rate hook clk: mediatek: cpumux: Add a determine_rate hook clk: pxa: Add a determine_rate hook clk: renesas: r9a06g032: Add a determine_rate hook clk: socfpga: gate: Add a determine_rate hook clk: stm32: core: Add a determine_rate hook clk: tegra: bpmp: Add a determine_rate hook clk: tegra: super: Add a determine_rate hook clk: tegra: periph: Add a determine_rate hook clk: ux500: prcmu: Add a determine_rate hook clk: ux500: sysctrl: Add a determine_rate hook clk: versatile: sp810: Add a determine_rate hook drm/tegra: sor: Add a determine_rate hook phy: cadence: sierra: Add a determine_rate hook phy: cadence: torrent: Add a determine_rate hook phy: ti: am654-serdes: Add a determine_rate hook phy: ti: j721e-wiz: Add a determine_rate hook rtc: sun6i: Add a determine_rate hook ASoC: tlv320aic32x4: Add a determine_rate hook clk: actions: composite: div: Switch to determine_rate clk: actions: composite: fact: Switch to determine_rate clk: at91: smd: Switch to determine_rate clk: axi-clkgen: Switch to determine_rate clk: cdce706: divider: Switch to determine_rate clk: cdce706: clkout: Switch to determine_rate clk: si5341: Switch to determine_rate clk: si5351: pll: Switch to determine_rate clk: si5351: msynth: Switch to determine_rate clk: si5351: clkout: Switch to determine_rate clk: da8xx: clk48: Switch to determine_rate clk: imx: scu: Switch to determine_rate clk: ingenic: cgu: Switch to determine_rate clk: ingenic: tcu: Switch to determine_rate clk: sprd: composite: Switch to determine_rate clk: st: flexgen: Switch to determine_rate clk: stm32: composite: Switch to determine_rate clk: tegra: periph: Switch to determine_rate clk: tegra: super: Switch to determine_rate ASoC: tlv320aic32x4: pll: Switch to determine_rate ASoC: tlv320aic32x4: div: Switch to determine_rate clk: Forbid to register a mux without determine_rate Stephen Boyd (2): clk: Move no reparent case into a separate function clk: Introduce clk_hw_determine_rate_no_reparent() drivers/clk/actions/owl-composite.c | 35 ++++-- drivers/clk/at91/clk-main.c | 1 + drivers/clk/at91/clk-smd.c | 29 +++-- drivers/clk/at91/sckc.c | 1 + drivers/clk/berlin/berlin2-div.c | 1 + drivers/clk/clk-axi-clkgen.c | 14 ++- drivers/clk/clk-cdce706.c | 30 ++--- drivers/clk/clk-k210.c | 3 + drivers/clk/clk-lan966x.c | 17 --- drivers/clk/clk-lmk04832.c | 1 + drivers/clk/clk-lochnagar.c | 1 + drivers/clk/clk-qoriq.c | 1 + drivers/clk/clk-si5341.c | 19 ++-- drivers/clk/clk-si5351.c | 67 ++++++----- drivers/clk/clk-stm32f4.c | 1 + drivers/clk/clk-versaclock5.c | 2 + drivers/clk/clk-wm831x.c | 1 + drivers/clk/clk.c | 108 ++++++++++++------ drivers/clk/clk_test.c | 180 +++++++++++++++++++++++++++++- drivers/clk/davinci/da8xx-cfgchip.c | 12 +- drivers/clk/imx/clk-busy.c | 1 + drivers/clk/imx/clk-fixup-mux.c | 1 + drivers/clk/imx/clk-scu.c | 20 +++- drivers/clk/ingenic/cgu.c | 15 +-- drivers/clk/ingenic/tcu.c | 19 ++-- drivers/clk/mediatek/clk-cpumux.c | 1 + drivers/clk/pxa/clk-pxa.c | 1 + drivers/clk/renesas/r9a06g032-clocks.c | 1 + drivers/clk/socfpga/clk-gate.c | 1 + drivers/clk/sprd/composite.c | 16 ++- drivers/clk/st/clk-flexgen.c | 15 +-- drivers/clk/stm32/clk-stm32-core.c | 33 ++++-- drivers/clk/tegra/clk-bpmp.c | 1 + drivers/clk/tegra/clk-periph.c | 17 ++- drivers/clk/tegra/clk-super.c | 16 ++- drivers/clk/ux500/clk-prcmu.c | 1 + drivers/clk/ux500/clk-sysctrl.c | 1 + drivers/clk/versatile/clk-sp810.c | 1 + drivers/gpu/drm/tegra/sor.c | 1 + drivers/phy/cadence/phy-cadence-sierra.c | 1 + drivers/phy/cadence/phy-cadence-torrent.c | 1 + drivers/phy/ti/phy-am654-serdes.c | 1 + drivers/phy/ti/phy-j721e-wiz.c | 1 + drivers/rtc/rtc-sun6i.c | 1 + include/linux/clk-provider.h | 2 + sound/soc/codecs/tlv320aic32x4-clk.c | 33 +++--- 46 files changed, 527 insertions(+), 199 deletions(-) --- base-commit: 145e5cddfe8b4bf607510b2dcf630d95f4db420f change-id: 20221018-clk-range-checks-fixes-2039f3523240 Best regards, -- Maxime Ripard From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: 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i8771445c:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 5 May 2023 07:25:27 -0400 (EDT) From: Maxime Ripard Subject: [PATCH v4 00/68] clk: Make determine_rate mandatory for muxes Date: Fri, 05 May 2023 13:25:02 +0200 Message-Id: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAI7nVGQC/43NzQ6CMAwH8FchOzuztQymJ9/DeIBRZIFAsuGiI by7lZvxIKfm349fFxEpeIrinC0iUPLRTyOH/JAJ11XjnaRvOAtQAFppK93Qy7ANXEeuj7L1T4o SFJ5aNICQK8HHdRVJ1rzoOj4fH8PAzc7HeQqv7VnSXK5/3aSlki1Sa5XRVufq4iiM03Emhm9sJ tjnwMcpSiwachot/Ti4z0F2TpVGY/MSGgNfzrqubzQ7VSJSAQAA To: Michael Turquette , Stephen Boyd X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=8811; i=maxime@cerno.tech; h=from:subject:message-id; bh=DTutEgCIMF28vydDZ/bIJ7FNCahxgFT27xgwey0IUAI=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxe9Xxi/3cvxVqX7ota1NvX8JiY10syKs/hVXlh2s5Wr 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linux-sunxi@lists.linux.dev, Maxime Coquelin , linux-rtc@vger.kernel.org, Charles Keepax , David Lechner , Pawel Moll , Manivannan Sadhasivam , Sascha Hauer , Nicolas Ferre , linux-actions@lists.infradead.org, Markus Schneider-Pargmann , Richard Fitzgerald , Mark Brown , linux-mediatek@lists.infradead.org, Maxime Ripard , Baolin Wang , linux-tegra@vger.kernel.org, Mikko Perttunen , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , Alessandro Zummo , patches@opensource.cirrus.com, Peter De Schrijver , linux-stm32@st-md-mailman.stormreply.com, Liam Girdwood , Claudiu Beznea , linux-renesas-soc@vger.kernel.org, Dinh Nguyen , Miles Chen , Thierry Reding , Liam Beguin , alsa-devel@alsa-project.org, Shawn Guo , =?utf-8?q?Andreas_F=C3=A4rber?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi, This is a follow-up to a previous series that was printing a warning when a mux has a set_parent implementation but is missing determine_rate(). The rationale is that set_parent() is very likely to be useful when changing the rate, but it's determine_rate() that takes the parenting decision. If we're missing it, then the current parent is always going to be used, and thus set_parent() will not be used. The only exception being a direct call to clk_set_parent(), but those are fairly rare compared to clk_set_rate(). Stephen then asked to promote the warning to an error, and to fix up all the muxes that are in that situation first. So here it is :) It was build-tested on x86, arm and arm64. Affected drivers have been tracked down by the following coccinelle script: virtual report @ clk_ops @ identifier ops; position p; @@ struct clk_ops ops@p = { ... }; @ has_set_parent @ identifier clk_ops.ops; identifier set_parent_f; @@ struct clk_ops ops = { .set_parent = set_parent_f, }; @ has_determine_rate @ identifier clk_ops.ops; identifier determine_rate_f; @@ struct clk_ops ops = { .determine_rate = determine_rate_f, }; @ script:python depends on report && has_set_parent && !has_determine_rate @ ops << clk_ops.ops; set_parent_f << has_set_parent.set_parent_f; p << clk_ops.p; @@ coccilib.report.print_report(p[0], "ERROR: %s has set_parent (%s)" % (ops, set_parent_f)) Berlin is the only user still matching after this series has been applied, but it's because it uses a composite clock which throws the script off. The driver has been converted and shouldn't be a problem. Let me know what you think, Maxime Signed-off-by: Maxime Ripard --- Changes in v4: - Switch from __clk_mux_determine_rate to a new helper - Introduced unit tests for that new helper - Fix kunit regression - Reworded most of the commit logs - Link to v3: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v3-0-9a1358472d52@cerno.tech Changes in v3: - Rebased on top of next-20230404 - Link to v2: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech Changes in v2: - Drop all the patches already applied - Promote the clk registration warning to an error - Make all muxes use determine_rate - Link to v1: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v1-0-f3ef80518140@cerno.tech --- Maxime Ripard (66): clk: Export clk_hw_forward_rate_request() clk: test: Fix type sign of rounded rate variables clk: lan966x: Remove unused round_rate hook clk: nodrv: Add a determine_rate hook clk: test: Add a determine_rate hook clk: actions: composite: Add a determine_rate hook for pass clk clk: at91: main: Add a determine_rate hook clk: at91: sckc: Add a determine_rate hook clk: berlin: div: Add a determine_rate hook clk: cdce706: Add a determine_rate hook clk: k210: pll: Add a determine_rate hook clk: k210: aclk: Add a determine_rate hook clk: k210: mux: Add a determine_rate hook clk: lmk04832: clkout: Add a determine_rate hook clk: lochnagar: Add a determine_rate hook clk: qoriq: Add a determine_rate hook clk: si5341: Add a determine_rate hook clk: stm32f4: mux: Add a determine_rate hook clk: vc5: mux: Add a determine_rate hook clk: vc5: clkout: Add a determine_rate hook clk: wm831x: clkout: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: imx: busy: Add a determine_rate hook clk: imx: fixup-mux: Add a determine_rate hook clk: imx: scu: Add a determine_rate hook clk: mediatek: cpumux: Add a determine_rate hook clk: pxa: Add a determine_rate hook clk: renesas: r9a06g032: Add a determine_rate hook clk: socfpga: gate: Add a determine_rate hook clk: stm32: core: Add a determine_rate hook clk: tegra: bpmp: Add a determine_rate hook clk: tegra: super: Add a determine_rate hook clk: tegra: periph: Add a determine_rate hook clk: ux500: prcmu: Add a determine_rate hook clk: ux500: sysctrl: Add a determine_rate hook clk: versatile: sp810: Add a determine_rate hook drm/tegra: sor: Add a determine_rate hook phy: cadence: sierra: Add a determine_rate hook phy: cadence: torrent: Add a determine_rate hook phy: ti: am654-serdes: Add a determine_rate hook phy: ti: j721e-wiz: Add a determine_rate hook rtc: sun6i: Add a determine_rate hook ASoC: tlv320aic32x4: Add a determine_rate hook clk: actions: composite: div: Switch to determine_rate clk: actions: composite: fact: Switch to determine_rate clk: at91: smd: Switch to determine_rate clk: axi-clkgen: Switch to determine_rate clk: cdce706: divider: Switch to determine_rate clk: cdce706: clkout: Switch to determine_rate clk: si5341: Switch to determine_rate clk: si5351: pll: Switch to determine_rate clk: si5351: msynth: Switch to determine_rate clk: si5351: clkout: Switch to determine_rate clk: da8xx: clk48: Switch to determine_rate clk: imx: scu: Switch to determine_rate clk: ingenic: cgu: Switch to determine_rate clk: ingenic: tcu: Switch to determine_rate clk: sprd: composite: Switch to determine_rate clk: st: flexgen: Switch to determine_rate clk: stm32: composite: Switch to determine_rate clk: tegra: periph: Switch to determine_rate clk: tegra: super: Switch to determine_rate ASoC: tlv320aic32x4: pll: Switch to determine_rate ASoC: tlv320aic32x4: div: Switch to determine_rate clk: Forbid to register a mux without determine_rate Stephen Boyd (2): clk: Move no reparent case into a separate function clk: Introduce clk_hw_determine_rate_no_reparent() drivers/clk/actions/owl-composite.c | 35 ++++-- drivers/clk/at91/clk-main.c | 1 + drivers/clk/at91/clk-smd.c | 29 +++-- drivers/clk/at91/sckc.c | 1 + drivers/clk/berlin/berlin2-div.c | 1 + drivers/clk/clk-axi-clkgen.c | 14 ++- drivers/clk/clk-cdce706.c | 30 ++--- drivers/clk/clk-k210.c | 3 + drivers/clk/clk-lan966x.c | 17 --- drivers/clk/clk-lmk04832.c | 1 + drivers/clk/clk-lochnagar.c | 1 + drivers/clk/clk-qoriq.c | 1 + drivers/clk/clk-si5341.c | 19 ++-- drivers/clk/clk-si5351.c | 67 ++++++----- drivers/clk/clk-stm32f4.c | 1 + drivers/clk/clk-versaclock5.c | 2 + drivers/clk/clk-wm831x.c | 1 + drivers/clk/clk.c | 108 ++++++++++++------ drivers/clk/clk_test.c | 180 +++++++++++++++++++++++++++++- drivers/clk/davinci/da8xx-cfgchip.c | 12 +- drivers/clk/imx/clk-busy.c | 1 + drivers/clk/imx/clk-fixup-mux.c | 1 + drivers/clk/imx/clk-scu.c | 20 +++- drivers/clk/ingenic/cgu.c | 15 +-- drivers/clk/ingenic/tcu.c | 19 ++-- drivers/clk/mediatek/clk-cpumux.c | 1 + drivers/clk/pxa/clk-pxa.c | 1 + drivers/clk/renesas/r9a06g032-clocks.c | 1 + drivers/clk/socfpga/clk-gate.c | 1 + drivers/clk/sprd/composite.c | 16 ++- drivers/clk/st/clk-flexgen.c | 15 +-- drivers/clk/stm32/clk-stm32-core.c | 33 ++++-- drivers/clk/tegra/clk-bpmp.c | 1 + drivers/clk/tegra/clk-periph.c | 17 ++- drivers/clk/tegra/clk-super.c | 16 ++- drivers/clk/ux500/clk-prcmu.c | 1 + drivers/clk/ux500/clk-sysctrl.c | 1 + drivers/clk/versatile/clk-sp810.c | 1 + drivers/gpu/drm/tegra/sor.c | 1 + drivers/phy/cadence/phy-cadence-sierra.c | 1 + drivers/phy/cadence/phy-cadence-torrent.c | 1 + drivers/phy/ti/phy-am654-serdes.c | 1 + drivers/phy/ti/phy-j721e-wiz.c | 1 + drivers/rtc/rtc-sun6i.c | 1 + include/linux/clk-provider.h | 2 + sound/soc/codecs/tlv320aic32x4-clk.c | 33 +++--- 46 files changed, 527 insertions(+), 199 deletions(-) --- base-commit: 145e5cddfe8b4bf607510b2dcf630d95f4db420f change-id: 20221018-clk-range-checks-fixes-2039f3523240 Best regards, -- Maxime Ripard From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: 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by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 5 May 2023 07:25:27 -0400 (EDT) From: Maxime Ripard Subject: [PATCH v4 00/68] clk: Make determine_rate mandatory for muxes Date: Fri, 05 May 2023 13:25:02 +0200 Message-Id: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAI7nVGQC/43NzQ6CMAwH8FchOzuztQymJ9/DeIBRZIFAsuGiI by7lZvxIKfm349fFxEpeIrinC0iUPLRTyOH/JAJ11XjnaRvOAtQAFppK93Qy7ANXEeuj7L1T4o SFJ5aNICQK8HHdRVJ1rzoOj4fH8PAzc7HeQqv7VnSXK5/3aSlki1Sa5XRVufq4iiM03Emhm9sJ tjnwMcpSiwachot/Ti4z0F2TpVGY/MSGgNfzrqubzQ7VSJSAQAA To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Abel Vesa , Alessandro Zummo , Alexandre Belloni , Alexandre Torgue , =?utf-8?q?Andreas_F=C3=A4rber?= , AngeloGioacchino Del Regno , Baolin Wang , Charles Keepax , Chen-Yu Tsai , Chen-Yu Tsai , Chunyan Zhang , Claudiu Beznea , Daniel Vetter , David Airlie , David Lechner , Dinh Nguyen , Fabio Estevam , Geert Uytterhoeven , Jaroslav Kysela , Jernej Skrabec , Jonathan Hunter , Kishon Vijay Abraham I , Liam Girdwood , Linus Walleij , Luca Ceresoli , Manivannan Sadhasivam , Mark Brown , Markus Schneider-Pargmann , Max Filippov , Maxime Coquelin , Mikko Perttunen , Miles Chen , Nicolas Ferre , Orson Zhai , Paul Cercueil , Peng Fan , Peter De Schrijver , Prashant Gaikwad , Richard Fitzgerald , Samuel Holland , Sascha Hauer , Sekhar Nori , Shawn Guo , Takashi Iwai , Thierry Reding , Ulf Hansson , Vinod Koul , dri-devel@lists.freedesktop.org, linux-actions@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-phy@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rtc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, NXP Linux Team , patches@opensource.cirrus.com, Pengutronix Kernel Team , Liam Beguin , Matthias Brugger , linux-mediatek@lists.infradead.org, Miquel Raynal , Pawel Moll , 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linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Hi, This is a follow-up to a previous series that was printing a warning when a mux has a set_parent implementation but is missing determine_rate(). The rationale is that set_parent() is very likely to be useful when changing the rate, but it's determine_rate() that takes the parenting decision. If we're missing it, then the current parent is always going to be used, and thus set_parent() will not be used. The only exception being a direct call to clk_set_parent(), but those are fairly rare compared to clk_set_rate(). Stephen then asked to promote the warning to an error, and to fix up all the muxes that are in that situation first. So here it is :) It was build-tested on x86, arm and arm64. Affected drivers have been tracked down by the following coccinelle script: virtual report @ clk_ops @ identifier ops; position p; @@ struct clk_ops ops@p = { ... }; @ has_set_parent @ identifier clk_ops.ops; identifier set_parent_f; @@ struct clk_ops ops = { .set_parent = set_parent_f, }; @ has_determine_rate @ identifier clk_ops.ops; identifier determine_rate_f; @@ struct clk_ops ops = { .determine_rate = determine_rate_f, }; @ script:python depends on report && has_set_parent && !has_determine_rate @ ops << clk_ops.ops; set_parent_f << has_set_parent.set_parent_f; p << clk_ops.p; @@ coccilib.report.print_report(p[0], "ERROR: %s has set_parent (%s)" % (ops, set_parent_f)) Berlin is the only user still matching after this series has been applied, but it's because it uses a composite clock which throws the script off. The driver has been converted and shouldn't be a problem. Let me know what you think, Maxime Signed-off-by: Maxime Ripard --- Changes in v4: - Switch from __clk_mux_determine_rate to a new helper - Introduced unit tests for that new helper - Fix kunit regression - Reworded most of the commit logs - Link to v3: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v3-0-9a1358472d52@cerno.tech Changes in v3: - Rebased on top of next-20230404 - Link to v2: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech Changes in v2: - Drop all the patches already applied - Promote the clk registration warning to an error - Make all muxes use determine_rate - Link to v1: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v1-0-f3ef80518140@cerno.tech --- Maxime Ripard (66): clk: Export clk_hw_forward_rate_request() clk: test: Fix type sign of rounded rate variables clk: lan966x: Remove unused round_rate hook clk: nodrv: Add a determine_rate hook clk: test: Add a determine_rate hook clk: actions: composite: Add a determine_rate hook for pass clk clk: at91: main: Add a determine_rate hook clk: at91: sckc: Add a determine_rate hook clk: berlin: div: Add a determine_rate hook clk: cdce706: Add a determine_rate hook clk: k210: pll: Add a determine_rate hook clk: k210: aclk: Add a determine_rate hook clk: k210: mux: Add a determine_rate hook clk: lmk04832: clkout: Add a determine_rate hook clk: lochnagar: Add a determine_rate hook clk: qoriq: Add a determine_rate hook clk: si5341: Add a determine_rate hook clk: stm32f4: mux: Add a determine_rate hook clk: vc5: mux: Add a determine_rate hook clk: vc5: clkout: Add a determine_rate hook clk: wm831x: clkout: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: imx: busy: Add a determine_rate hook clk: imx: fixup-mux: Add a determine_rate hook clk: imx: scu: Add a determine_rate hook clk: mediatek: cpumux: Add a determine_rate hook clk: pxa: Add a determine_rate hook clk: renesas: r9a06g032: Add a determine_rate hook clk: socfpga: gate: Add a determine_rate hook clk: stm32: core: Add a determine_rate hook clk: tegra: bpmp: Add a determine_rate hook clk: tegra: super: Add a determine_rate hook clk: tegra: periph: Add a determine_rate hook clk: ux500: prcmu: Add a determine_rate hook clk: ux500: sysctrl: Add a determine_rate hook clk: versatile: sp810: Add a determine_rate hook drm/tegra: sor: Add a determine_rate hook phy: cadence: sierra: Add a determine_rate hook phy: cadence: torrent: Add a determine_rate hook phy: ti: am654-serdes: Add a determine_rate hook phy: ti: j721e-wiz: Add a determine_rate hook rtc: sun6i: Add a determine_rate hook ASoC: tlv320aic32x4: Add a determine_rate hook clk: actions: composite: div: Switch to determine_rate clk: actions: composite: fact: Switch to determine_rate clk: at91: smd: Switch to determine_rate clk: axi-clkgen: Switch to determine_rate clk: cdce706: divider: Switch to determine_rate clk: cdce706: clkout: Switch to determine_rate clk: si5341: Switch to determine_rate clk: si5351: pll: Switch to determine_rate clk: si5351: msynth: Switch to determine_rate clk: si5351: clkout: Switch to determine_rate clk: da8xx: clk48: Switch to determine_rate clk: imx: scu: Switch to determine_rate clk: ingenic: cgu: Switch to determine_rate clk: ingenic: tcu: Switch to determine_rate clk: sprd: composite: Switch to determine_rate clk: st: flexgen: Switch to determine_rate clk: stm32: composite: Switch to determine_rate clk: tegra: periph: Switch to determine_rate clk: tegra: super: Switch to determine_rate ASoC: tlv320aic32x4: pll: Switch to determine_rate ASoC: tlv320aic32x4: div: Switch to determine_rate clk: Forbid to register a mux without determine_rate Stephen Boyd (2): clk: Move no reparent case into a separate function clk: Introduce clk_hw_determine_rate_no_reparent() drivers/clk/actions/owl-composite.c | 35 ++++-- drivers/clk/at91/clk-main.c | 1 + drivers/clk/at91/clk-smd.c | 29 +++-- drivers/clk/at91/sckc.c | 1 + drivers/clk/berlin/berlin2-div.c | 1 + drivers/clk/clk-axi-clkgen.c | 14 ++- drivers/clk/clk-cdce706.c | 30 ++--- drivers/clk/clk-k210.c | 3 + drivers/clk/clk-lan966x.c | 17 --- drivers/clk/clk-lmk04832.c | 1 + drivers/clk/clk-lochnagar.c | 1 + drivers/clk/clk-qoriq.c | 1 + drivers/clk/clk-si5341.c | 19 ++-- drivers/clk/clk-si5351.c | 67 ++++++----- drivers/clk/clk-stm32f4.c | 1 + drivers/clk/clk-versaclock5.c | 2 + drivers/clk/clk-wm831x.c | 1 + drivers/clk/clk.c | 108 ++++++++++++------ drivers/clk/clk_test.c | 180 +++++++++++++++++++++++++++++- drivers/clk/davinci/da8xx-cfgchip.c | 12 +- drivers/clk/imx/clk-busy.c | 1 + drivers/clk/imx/clk-fixup-mux.c | 1 + drivers/clk/imx/clk-scu.c | 20 +++- drivers/clk/ingenic/cgu.c | 15 +-- drivers/clk/ingenic/tcu.c | 19 ++-- drivers/clk/mediatek/clk-cpumux.c | 1 + drivers/clk/pxa/clk-pxa.c | 1 + drivers/clk/renesas/r9a06g032-clocks.c | 1 + drivers/clk/socfpga/clk-gate.c | 1 + drivers/clk/sprd/composite.c | 16 ++- drivers/clk/st/clk-flexgen.c | 15 +-- drivers/clk/stm32/clk-stm32-core.c | 33 ++++-- drivers/clk/tegra/clk-bpmp.c | 1 + drivers/clk/tegra/clk-periph.c | 17 ++- drivers/clk/tegra/clk-super.c | 16 ++- drivers/clk/ux500/clk-prcmu.c | 1 + drivers/clk/ux500/clk-sysctrl.c | 1 + drivers/clk/versatile/clk-sp810.c | 1 + drivers/gpu/drm/tegra/sor.c | 1 + drivers/phy/cadence/phy-cadence-sierra.c | 1 + drivers/phy/cadence/phy-cadence-torrent.c | 1 + drivers/phy/ti/phy-am654-serdes.c | 1 + drivers/phy/ti/phy-j721e-wiz.c | 1 + drivers/rtc/rtc-sun6i.c | 1 + include/linux/clk-provider.h | 2 + sound/soc/codecs/tlv320aic32x4-clk.c | 33 +++--- 46 files changed, 527 insertions(+), 199 deletions(-) --- base-commit: 145e5cddfe8b4bf607510b2dcf630d95f4db420f change-id: 20221018-clk-range-checks-fixes-2039f3523240 Best regards, -- Maxime Ripard -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: 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charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAI7nVGQC/43NzQ6CMAwH8FchOzuztQymJ9/DeIBRZIFAsuGiI by7lZvxIKfm349fFxEpeIrinC0iUPLRTyOH/JAJ11XjnaRvOAtQAFppK93Qy7ANXEeuj7L1T4o SFJ5aNICQK8HHdRVJ1rzoOj4fH8PAzc7HeQqv7VnSXK5/3aSlki1Sa5XRVufq4iiM03Emhm9sJ tjnwMcpSiwachot/Ti4z0F2TpVGY/MSGgNfzrqubzQ7VSJSAQAA To: Michael Turquette , Stephen Boyd X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=8811; i=maxime@cerno.tech; h=from:subject:message-id; bh=DTutEgCIMF28vydDZ/bIJ7FNCahxgFT27xgwey0IUAI=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxe9Xxi/3cvxVqX7ota1NvX8JiY10syKs/hVXlh2s5Wr xyh3lLIwiHExyIopssQImy+JOzXrdScb3zyYOaxMIEMYuDgFYCIG0Qz/3R5ZNfhd/XJhS3zivh2awt u3XDHevLprI+OV15f2zRd/0czIcHfvjUN8sh+uf+NwWChWIG+Rz7NssnmgDruxem/tXuG77AA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-MailFrom: maxime@cerno.tech X-Mailman-Rule-Hits: max-recipients X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-size; news-moderation; no-subject; digests; suspicious-header Message-ID-Hash: PB2AT77XLVYUG4FY34VPGUT2HNCSWYCB X-Message-ID-Hash: PB2AT77XLVYUG4FY34VPGUT2HNCSWYCB X-Mailman-Approved-At: Mon, 08 May 2023 07:45:12 +0000 CC: linux-clk@vger.kernel.org, Maxime Ripard , Abel Vesa , Alessandro Zummo , Alexandre Belloni , Alexandre Torgue , =?utf-8?q?Andreas_F=C3=A4rber?= , AngeloGioacchino Del Regno , Baolin Wang , Charles Keepax , Chen-Yu Tsai , Chen-Yu Tsai , Chunyan Zhang , Claudiu Beznea , Daniel Vetter , David Airlie , David Lechner , Dinh Nguyen , Fabio Estevam , Geert Uytterhoeven , Jernej Skrabec , Jonathan Hunter , Kishon Vijay Abraham I , Liam Girdwood , Linus Walleij , Luca Ceresoli , Manivannan Sadhasivam , Mark Brown , Markus Schneider-Pargmann , Max Filippov , Maxime Coquelin , Mikko Perttunen , Miles Chen , Nicolas Ferre , Orson Zhai , Paul Cercueil , Peng Fan , Peter De Schrijver , Prashant Gaikwad , Richard Fitzgerald , Samuel Holland , Sascha Hauer , Sekhar Nori , Shawn Guo , Takashi Iwai , Thierry Reding , Ulf Hansson , Vinod Koul , dri-devel@lists.freedesktop.org, linux-actions@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-phy@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rtc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, NXP Linux Team , patches@opensource.cirrus.com, Pengutronix Kernel Team , Liam Beguin , Matthias Brugger , linux-mediatek@lists.infradead.org, Miquel Raynal , Pawel Moll , alsa-devel@alsa-project.org X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Hi, This is a follow-up to a previous series that was printing a warning when a mux has a set_parent implementation but is missing determine_rate(). The rationale is that set_parent() is very likely to be useful when changing the rate, but it's determine_rate() that takes the parenting decision. If we're missing it, then the current parent is always going to be used, and thus set_parent() will not be used. The only exception being a direct call to clk_set_parent(), but those are fairly rare compared to clk_set_rate(). Stephen then asked to promote the warning to an error, and to fix up all the muxes that are in that situation first. So here it is :) It was build-tested on x86, arm and arm64. Affected drivers have been tracked down by the following coccinelle script: virtual report @ clk_ops @ identifier ops; position p; @@ struct clk_ops ops@p = { ... }; @ has_set_parent @ identifier clk_ops.ops; identifier set_parent_f; @@ struct clk_ops ops = { .set_parent = set_parent_f, }; @ has_determine_rate @ identifier clk_ops.ops; identifier determine_rate_f; @@ struct clk_ops ops = { .determine_rate = determine_rate_f, }; @ script:python depends on report && has_set_parent && !has_determine_rate @ ops << clk_ops.ops; set_parent_f << has_set_parent.set_parent_f; p << clk_ops.p; @@ coccilib.report.print_report(p[0], "ERROR: %s has set_parent (%s)" % (ops, set_parent_f)) Berlin is the only user still matching after this series has been applied, but it's because it uses a composite clock which throws the script off. The driver has been converted and shouldn't be a problem. Let me know what you think, Maxime Signed-off-by: Maxime Ripard --- Changes in v4: - Switch from __clk_mux_determine_rate to a new helper - Introduced unit tests for that new helper - Fix kunit regression - Reworded most of the commit logs - Link to v3: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v3-0-9a1358472d52@cerno.tech Changes in v3: - Rebased on top of next-20230404 - Link to v2: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech Changes in v2: - Drop all the patches already applied - Promote the clk registration warning to an error - Make all muxes use determine_rate - Link to v1: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v1-0-f3ef80518140@cerno.tech --- Maxime Ripard (66): clk: Export clk_hw_forward_rate_request() clk: test: Fix type sign of rounded rate variables clk: lan966x: Remove unused round_rate hook clk: nodrv: Add a determine_rate hook clk: test: Add a determine_rate hook clk: actions: composite: Add a determine_rate hook for pass clk clk: at91: main: Add a determine_rate hook clk: at91: sckc: Add a determine_rate hook clk: berlin: div: Add a determine_rate hook clk: cdce706: Add a determine_rate hook clk: k210: pll: Add a determine_rate hook clk: k210: aclk: Add a determine_rate hook clk: k210: mux: Add a determine_rate hook clk: lmk04832: clkout: Add a determine_rate hook clk: lochnagar: Add a determine_rate hook clk: qoriq: Add a determine_rate hook clk: si5341: Add a determine_rate hook clk: stm32f4: mux: Add a determine_rate hook clk: vc5: mux: Add a determine_rate hook clk: vc5: clkout: Add a determine_rate hook clk: wm831x: clkout: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: imx: busy: Add a determine_rate hook clk: imx: fixup-mux: Add a determine_rate hook clk: imx: scu: Add a determine_rate hook clk: mediatek: cpumux: Add a determine_rate hook clk: pxa: Add a determine_rate hook clk: renesas: r9a06g032: Add a determine_rate hook clk: socfpga: gate: Add a determine_rate hook clk: stm32: core: Add a determine_rate hook clk: tegra: bpmp: Add a determine_rate hook clk: tegra: super: Add a determine_rate hook clk: tegra: periph: Add a determine_rate hook clk: ux500: prcmu: Add a determine_rate hook clk: ux500: sysctrl: Add a determine_rate hook clk: versatile: sp810: Add a determine_rate hook drm/tegra: sor: Add a determine_rate hook phy: cadence: sierra: Add a determine_rate hook phy: cadence: torrent: Add a determine_rate hook phy: ti: am654-serdes: Add a determine_rate hook phy: ti: j721e-wiz: Add a determine_rate hook rtc: sun6i: Add a determine_rate hook ASoC: tlv320aic32x4: Add a determine_rate hook clk: actions: composite: div: Switch to determine_rate clk: actions: composite: fact: Switch to determine_rate clk: at91: smd: Switch to determine_rate clk: axi-clkgen: Switch to determine_rate clk: cdce706: divider: Switch to determine_rate clk: cdce706: clkout: Switch to determine_rate clk: si5341: Switch to determine_rate clk: si5351: pll: Switch to determine_rate clk: si5351: msynth: Switch to determine_rate clk: si5351: clkout: Switch to determine_rate clk: da8xx: clk48: Switch to determine_rate clk: imx: scu: Switch to determine_rate clk: ingenic: cgu: Switch to determine_rate clk: ingenic: tcu: Switch to determine_rate clk: sprd: composite: Switch to determine_rate clk: st: flexgen: Switch to determine_rate clk: stm32: composite: Switch to determine_rate clk: tegra: periph: Switch to determine_rate clk: tegra: super: Switch to determine_rate ASoC: tlv320aic32x4: pll: Switch to determine_rate ASoC: tlv320aic32x4: div: Switch to determine_rate clk: Forbid to register a mux without determine_rate Stephen Boyd (2): clk: Move no reparent case into a separate function clk: Introduce clk_hw_determine_rate_no_reparent() drivers/clk/actions/owl-composite.c | 35 ++++-- drivers/clk/at91/clk-main.c | 1 + drivers/clk/at91/clk-smd.c | 29 +++-- drivers/clk/at91/sckc.c | 1 + drivers/clk/berlin/berlin2-div.c | 1 + drivers/clk/clk-axi-clkgen.c | 14 ++- drivers/clk/clk-cdce706.c | 30 ++--- drivers/clk/clk-k210.c | 3 + drivers/clk/clk-lan966x.c | 17 --- drivers/clk/clk-lmk04832.c | 1 + drivers/clk/clk-lochnagar.c | 1 + drivers/clk/clk-qoriq.c | 1 + drivers/clk/clk-si5341.c | 19 ++-- drivers/clk/clk-si5351.c | 67 ++++++----- drivers/clk/clk-stm32f4.c | 1 + drivers/clk/clk-versaclock5.c | 2 + drivers/clk/clk-wm831x.c | 1 + drivers/clk/clk.c | 108 ++++++++++++------ drivers/clk/clk_test.c | 180 +++++++++++++++++++++++++++++- drivers/clk/davinci/da8xx-cfgchip.c | 12 +- drivers/clk/imx/clk-busy.c | 1 + drivers/clk/imx/clk-fixup-mux.c | 1 + drivers/clk/imx/clk-scu.c | 20 +++- drivers/clk/ingenic/cgu.c | 15 +-- drivers/clk/ingenic/tcu.c | 19 ++-- drivers/clk/mediatek/clk-cpumux.c | 1 + drivers/clk/pxa/clk-pxa.c | 1 + drivers/clk/renesas/r9a06g032-clocks.c | 1 + drivers/clk/socfpga/clk-gate.c | 1 + drivers/clk/sprd/composite.c | 16 ++- drivers/clk/st/clk-flexgen.c | 15 +-- drivers/clk/stm32/clk-stm32-core.c | 33 ++++-- drivers/clk/tegra/clk-bpmp.c | 1 + drivers/clk/tegra/clk-periph.c | 17 ++- drivers/clk/tegra/clk-super.c | 16 ++- drivers/clk/ux500/clk-prcmu.c | 1 + drivers/clk/ux500/clk-sysctrl.c | 1 + drivers/clk/versatile/clk-sp810.c | 1 + drivers/gpu/drm/tegra/sor.c | 1 + drivers/phy/cadence/phy-cadence-sierra.c | 1 + drivers/phy/cadence/phy-cadence-torrent.c | 1 + drivers/phy/ti/phy-am654-serdes.c | 1 + drivers/phy/ti/phy-j721e-wiz.c | 1 + drivers/rtc/rtc-sun6i.c | 1 + include/linux/clk-provider.h | 2 + sound/soc/codecs/tlv320aic32x4-clk.c | 33 +++--- 46 files changed, 527 insertions(+), 199 deletions(-) --- base-commit: 145e5cddfe8b4bf607510b2dcf630d95f4db420f change-id: 20221018-clk-range-checks-fixes-2039f3523240 Best regards, -- Maxime Ripard