From: Biju Das <biju.das.jz@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
Pavel Machek <pavel@denx.de>
Cc: Chris Paterson <chris.paterson2@renesas.com>,
Biju Das <biju.das@bp.renesas.com>
Subject: [PATCH 5.10.y-cip 09/12] arm64: dts: renesas: r9a07g054: Fix SCI{Rx,Tx} interrupt types
Date: Tue, 25 Oct 2022 15:41:28 +0100 [thread overview]
Message-ID: <20221025144131.1309463-10-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20221025144131.1309463-1-biju.das.jz@bp.renesas.com>
commit 13dec051c7f139eef345c55a60941843e72128f1 upstream.
As per the RZ/V2L Hardware User's Manual (Rev.1.00 Nov, 2021),
the interrupt type of SCI{Rx,Tx} is edge triggered.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: 7c2b8198f4f321df ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC")
Link: https://lore.kernel.org/r/20220802101534.1401342-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 1edff6bce3ca..3d225ab6ad35 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -361,8 +361,8 @@ sci0: serial@1004d000 {
compatible = "renesas,r9a07g054-sci", "renesas,sci";
reg = <0 0x1004d000 0 0x400>;
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 406 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 407 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei";
clocks = <&cpg CPG_MOD R9A07G054_SCI0_CLKP>;
@@ -376,8 +376,8 @@ sci1: serial@1004d400 {
compatible = "renesas,r9a07g054-sci", "renesas,sci";
reg = <0 0x1004d400 0 0x400>;
interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 411 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei";
clocks = <&cpg CPG_MOD R9A07G054_SCI1_CLKP>;
--
2.25.1
next prev parent reply other threads:[~2022-10-25 14:41 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 01/12] mtd: hyperbus: Make hyperbus_unregister_device() return void Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 02/12] mtd: hyperbus: rpc-if: Fix RPM imbalance in probe error path Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 03/12] arm64: dts: renesas: Adjust whitespace around '{' Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 04/12] arm64: dts: renesas: r9a07g043: Add DMA support to RSPI Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 05/12] arm64: dts: renesas: r9a07g044: " Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 06/12] arm64: dts: renesas: r9a07g054: " Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 07/12] arm64: dts: renesas: r9a07g043: Fix audio clk node names Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 08/12] arm64: dts: renesas: r9a07g044: Fix SCI{Rx,Tx} interrupt types Biju Das
2022-10-25 14:41 ` Biju Das [this message]
2022-10-25 14:41 ` [PATCH 5.10.y-cip 10/12] arm64: dts: renesas: r9a07g043: " Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 11/12] clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface support Biju Das
2022-10-26 8:54 ` nobuhiro1.iwamatsu
2022-10-26 9:09 ` Biju Das
2022-10-26 9:17 ` nobuhiro1.iwamatsu
2022-10-26 8:40 ` [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Pavel Machek
2022-10-26 8:45 ` Biju Das
2022-10-26 9:19 ` nobuhiro1.iwamatsu
2022-10-27 8:18 ` Pavel Machek
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