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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id q10-20020a05683033ca00b00661a33883b8sm2525809ott.71.2022.10.26.13.11.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Oct 2022 13:11:11 -0700 (PDT) Received: (nullmailer pid 1123772 invoked by uid 1000); Wed, 26 Oct 2022 20:11:12 -0000 Date: Wed, 26 Oct 2022 15:11:12 -0500 From: Rob Herring To: Weilong Chen Cc: f.fangjian@huawei.com, linus.walleij@linaro.org, yangyicong@hisilicon.com, xuwei5@huawei.com, krzysztof.kozlowski+dt@linaro.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH next 2/2] dt-bindings: gpio: add entry for hisilicon,gpio-ascend910 Message-ID: <20221026201112.GA1104486-robh@kernel.org> References: <20221026034219.172880-1-chenweilong@huawei.com> <20221026034219.172880-2-chenweilong@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221026034219.172880-2-chenweilong@huawei.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Wed, Oct 26, 2022 at 11:42:19AM +0800, Weilong Chen wrote: > Add the new compatible for HiSilicon gpio controller driver. > > Signed-off-by: Weilong Chen > --- > .../gpio/hisilicon,gpio-ascend910.yaml | 54 +++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 55 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpio/hisilicon,gpio-ascend910.yaml > > diff --git a/Documentation/devicetree/bindings/gpio/hisilicon,gpio-ascend910.yaml b/Documentation/devicetree/bindings/gpio/hisilicon,gpio-ascend910.yaml > new file mode 100644 > index 000000000000..912e4b808cae > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/hisilicon,gpio-ascend910.yaml > @@ -0,0 +1,54 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpio/hisilicon,gpio-ascend910.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: HiSilicon common GPIO controller Device Tree Bindings > + > +maintainers: > + - Jay Fang > + > +properties: > + compatible: > + const: hisilicon,gpio-ascend910 The normal convention is: vendor,soc-ipblock > + description: > + The HiSilicon common GPIO controller can be used for many different > + types of SoC such as Huawei Ascend AI series chips. > + > + reg: > + description: > + Address and length of the register set for the device. > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + gpio-controller: true > + > + "#gpio-cells": > + const: 2 > + > + ngpios: > + minimum: 1 > + maximum: 32 > + > +required: > + - compatible > + - gpio-controller > + - reg > + - interrupts > + - ngpios > + > +unevaluatedProperties: false > + > +examples: > + - | > + gpio@840d0000 { > + compatible = "hisilicon,gpio-ascend910"; > + reg = <0x840d0000 0x1000>; > + ngpios = <0x20>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupts = <0x0 33 0x4>; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index 746becb5fe92..0ec86558cdce 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -9212,6 +9212,7 @@ HISILICON GPIO DRIVER > M: Jay Fang > L: linux-gpio@vger.kernel.org > S: Maintained > +F: Documentation/devicetree/bindings/gpio/hisilicon,gpio-ascend910.yaml > F: drivers/gpio/gpio-hisi.c > > HISILICON HIGH PERFORMANCE RSA ENGINE DRIVER (HPRE) > -- > 2.31.GIT > >