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From: Santosh Shukla <santosh.shukla@amd.com>
To: <pbonzini@redhat.com>, <seanjc@google.com>
Cc: <kvm@vger.kernel.org>, <jmattson@google.com>, <joro@8bytes.org>,
	<linux-kernel@vger.kernel.org>, <mail@maciej.szmigiero.name>,
	<mlevitsk@redhat.com>, <thomas.lendacky@amd.com>,
	<vkuznets@redhat.com>
Subject: [PATCHv5 3/8] KVM: SVM: Add VNMI support in get/set_nmi_mask
Date: Thu, 27 Oct 2022 14:08:26 +0530	[thread overview]
Message-ID: <20221027083831.2985-4-santosh.shukla@amd.com> (raw)
In-Reply-To: <20221027083831.2985-1-santosh.shukla@amd.com>

VMCB intr_ctrl bit12 (V_NMI_MASK) is set by the processor when handling
NMI in guest and is cleared after the NMI is handled. Treat V_NMI_MASK
as read-only in the hypervisor except for the SMM case where hypervisor
before entring and after leaving SMM mode requires to set and unset
V_NMI_MASK.

Adding API(get_vnmi_vmcb) in order to return the correct vmcb for L1 or
L2, and also API(clear/set_vnmi_mask) to clear and set mask.

Signed-off-by: Santosh Shukla <santosh.shukla@amd.com>
---
v3:
* Handle SMM case
* Added set/clear_vnmi_mask() API.

v2:
- Added get_vnmi_vmcb API to return vmcb for l1 and l2.
- Use get_vnmi_vmcb to get correct vmcb in func -
  is_vnmi_enabled/_mask_set()
- removed vnmi check from is_vnmi_enabled() func.

 arch/x86/kvm/svm/svm.c | 17 +++++++++++++-
 arch/x86/kvm/svm/svm.h | 52 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 68 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index b759f650fe2d..cb2eb5581d71 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -3620,13 +3620,28 @@ static int svm_nmi_allowed(struct kvm_vcpu *vcpu, bool for_injection)
 
 static bool svm_get_nmi_mask(struct kvm_vcpu *vcpu)
 {
-	return !!(vcpu->arch.hflags & HF_NMI_MASK);
+	struct vcpu_svm *svm = to_svm(vcpu);
+
+	if (is_vnmi_enabled(svm))
+		return is_vnmi_mask_set(svm);
+	else
+		return !!(vcpu->arch.hflags & HF_NMI_MASK);
 }
 
 static void svm_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked)
 {
 	struct vcpu_svm *svm = to_svm(vcpu);
 
+	if (is_vnmi_enabled(svm)) {
+		if (is_smm(vcpu)) {
+			if (masked)
+				set_vnmi_mask(svm);
+			else
+				clear_vnmi_mask(svm);
+		}
+		return;
+	}
+
 	if (masked) {
 		vcpu->arch.hflags |= HF_NMI_MASK;
 		if (!sev_es_guest(vcpu->kvm))
diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
index 6a7686bf6900..cc98ec7bd119 100644
--- a/arch/x86/kvm/svm/svm.h
+++ b/arch/x86/kvm/svm/svm.h
@@ -35,6 +35,7 @@ extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly;
 extern bool npt_enabled;
 extern int vgif;
 extern bool intercept_smi;
+extern bool vnmi;
 
 enum avic_modes {
 	AVIC_MODE_NONE = 0,
@@ -532,6 +533,57 @@ static inline bool is_x2apic_msrpm_offset(u32 offset)
 	       (msr < (APIC_BASE_MSR + 0x100));
 }
 
+static inline struct vmcb *get_vnmi_vmcb(struct vcpu_svm *svm)
+{
+	if (!vnmi)
+		return NULL;
+
+	if (is_guest_mode(&svm->vcpu))
+		return svm->nested.vmcb02.ptr;
+	else
+		return svm->vmcb01.ptr;
+}
+
+static inline bool is_vnmi_enabled(struct vcpu_svm *svm)
+{
+	struct vmcb *vmcb = get_vnmi_vmcb(svm);
+
+	if (vmcb)
+		return !!(vmcb->control.int_ctl & V_NMI_ENABLE);
+	else
+		return false;
+}
+
+static inline bool is_vnmi_mask_set(struct vcpu_svm *svm)
+{
+	struct vmcb *vmcb = get_vnmi_vmcb(svm);
+
+	if (vmcb)
+		return !!(vmcb->control.int_ctl & V_NMI_MASK);
+	else
+		return false;
+}
+
+static inline void set_vnmi_mask(struct vcpu_svm *svm)
+{
+	struct vmcb *vmcb = get_vnmi_vmcb(svm);
+
+	if (vmcb)
+		vmcb->control.int_ctl |= V_NMI_MASK;
+	else
+		svm->vcpu.arch.hflags |= HF_GIF_MASK;
+}
+
+static inline void clear_vnmi_mask(struct vcpu_svm *svm)
+{
+	struct vmcb *vmcb = get_vnmi_vmcb(svm);
+
+	if (vmcb)
+		vmcb->control.int_ctl &= ~V_NMI_MASK;
+	else
+		svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
+}
+
 /* svm.c */
 #define MSR_INVALID				0xffffffffU
 
-- 
2.25.1


  parent reply	other threads:[~2022-10-27  8:41 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-27  8:38 [PATCHv5 0/8] Virtual NMI feature Santosh Shukla
2022-10-27  8:38 ` [PATCHv5 1/8] x86/cpu: Add CPUID feature bit for VNMI Santosh Shukla
2022-10-27  8:38 ` [PATCHv5 2/8] KVM: SVM: Add VNMI bit definition Santosh Shukla
2022-10-27  8:38 ` Santosh Shukla [this message]
2022-10-27  8:38 ` [PATCHv5 4/8] KVM: SVM: Report NMI not allowed when Guest busy handling VNMI Santosh Shukla
2022-10-27  8:38 ` [PATCHv5 5/8] KVM: SVM: Add VNMI support in inject_nmi Santosh Shukla
2022-10-27  8:38 ` [PATCHv5 6/8] KVM: nSVM: implement nested VNMI Santosh Shukla
2022-10-27  8:38 ` [PATCHv5 7/8] KVM: nSVM: emulate VMEXIT_INVALID case for " Santosh Shukla
2022-10-27  8:38 ` [PATCHv5 8/8] KVM: SVM: Enable VNMI feature Santosh Shukla
2022-11-14  8:02 ` [PATCHv5 0/8] Virtual NMI feature Santosh Shukla
2022-11-14 14:31   ` Maxim Levitsky
2022-11-16  5:40     ` Santosh Shukla
2022-11-16  9:21       ` Maxim Levitsky
2022-11-16 15:44         ` Santosh Shukla
2022-11-16 15:55           ` Tom Lendacky
2022-11-16 16:59             ` Sean Christopherson

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