From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4772DC43219 for ; Fri, 4 Nov 2022 13:03:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231530AbiKDNDe (ORCPT ); Fri, 4 Nov 2022 09:03:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41250 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230301AbiKDNDc (ORCPT ); Fri, 4 Nov 2022 09:03:32 -0400 Received: from mail-lj1-x231.google.com (mail-lj1-x231.google.com [IPv6:2a00:1450:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0FFA315 for ; Fri, 4 Nov 2022 06:03:30 -0700 (PDT) Received: by mail-lj1-x231.google.com with SMTP id u2so6258591ljl.3 for ; Fri, 04 Nov 2022 06:03:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=NRhMNxQi6Qu7fp/d11z2XuTmlDZU0glcg0Uw8w9zeiw=; b=gIRqwUn/2btJsIMZEgpZeFlv5xMX1U4dhaUglHYKk0txFpixWoSmkyWLPKpDZ4PlvD sLTiWKJ7aGLvIhLrZ66WNAgY9ArJ2uNEk/ER5xgpMAllw6mRA1LnjBtr2CFwQqxgb074 jchfQplVCkBAHM9mKAHySFdKdS6FMtwVsryX/8mO7ulWSlO2xUMAj9Q11wulCaAaPxVG 501UxBoTShudVTpPG0HfM4TZZWiM9bqjxCimjSm2GYaxXEOK1X8n+9CzNAw7udDOBe1X SdMEpmFm3OlLGI8Wtjwmrou+NA8W+FedAWIyJ3TZpNiP2xMNHiV5RavpK7eiGg0qrKxL coFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=NRhMNxQi6Qu7fp/d11z2XuTmlDZU0glcg0Uw8w9zeiw=; b=DNeXRtZO7JAZ1tkxRsFrB6/KJL6SXjIy4tyjirKySy8hZfUm7yWFuO7b1kXmAHyMIZ 1qB2XqoX5mVawbGNh4uffQwUHEjrzXgKfydCy9riF7KUM4EqMdP1GaGmYa1f1HiHkfa2 CkSk5qqdwFQAU9aAxsyekQR4lGq4/pmo7O1lbXR15rRlEKKmdgIk6yrKFifaRAneYRLR jN/LWsZXyUWr0rTMn6fzJko0EuM8dAs56uxdciE3ahg1EP6kCcKlfLwca7AGK+Ap1eZ9 GQ87TRW8KU4vn2qle2nRJMlFPR76wJp82XRZxtrURmQrCDbEel7qCmVIepssTTIw4rLU XmwA== X-Gm-Message-State: ACrzQf3GV2qgY2hAeacWVExLuyBvVSq7mU0WJ22OPAiJ1vVrtqetrx4n /zuZw8aNgPmW+c5ZdLE14SEAxg== X-Google-Smtp-Source: AMsMyM4R4JXKI6jpXn5A+LUD4pafING6a+I3Qec0AyQfuWzhYM6M6siyNZT5loXbGGdBDiJqEkpf9Q== X-Received: by 2002:a2e:9697:0:b0:277:74dd:1fac with SMTP id q23-20020a2e9697000000b0027774dd1facmr717357lji.307.1667567008379; Fri, 04 Nov 2022 06:03:28 -0700 (PDT) Received: from localhost.localdomain ([195.165.23.90]) by smtp.gmail.com with ESMTPSA id s6-20020a2eb626000000b0026fe0a052c5sm419975ljn.129.2022.11.04.06.03.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Nov 2022 06:03:28 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v3 0/8] drm/msm: add support for SM8450 Date: Fri, 4 Nov 2022 16:03:16 +0300 Message-Id: <20221104130324.1024242-1-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This adds support for the MDSS/DPU/DSI on the Qualcomm SM8450 platform. Dependencies for the DT bindings: [1]. [1] https://lore.kernel.org/all/20221024164225.3236654-1-dmitry.baryshkov@linaro.org/ Change since v2: - Rebased onto msm-next-lumag - Cleaned up bindings according to Krzysztof's suggestions Change since v1: - Fixed the regdma pointer in sm8450_dpu_cfg - Rebased onto pending msm-next-lumag - Added DT bindings for corresponding devices Dmitry Baryshkov (8): dt-bindings: display/msm/dsi-controller-main: allow defining opp-table dt-bindings: display/msm: add sm8350 and sm8450 DSI PHYs dt-bindings: display/msm: add support for the display on SM8450 drm/msm/dsi: add support for DSI-PHY on SM8350 and SM8450 drm/msm/dsi: add support for DSI 2.6.0 drm/msm/dpu: add support for MDP_TOP blackhole drm/msm/dpu: add support for SM8450 drm/msm: mdss: add support for SM8450 .../display/msm/dsi-controller-main.yaml | 3 + .../bindings/display/msm/dsi-phy-7nm.yaml | 2 + .../bindings/display/msm/qcom,sm8450-dpu.yaml | 132 +++++++ .../display/msm/qcom,sm8450-mdss.yaml | 347 ++++++++++++++++++ drivers/gpu/drm/msm/Kconfig | 6 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 224 +++++++++++ .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 3 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 12 +- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 2 + drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 + drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 4 + drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 2 + drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 128 ++++++- drivers/gpu/drm/msm/msm_mdss.c | 5 + 15 files changed, 858 insertions(+), 15 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml -- 2.35.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 85491C07E9D for ; Fri, 4 Nov 2022 13:03:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BE27610E752; Fri, 4 Nov 2022 13:03:35 +0000 (UTC) Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by gabe.freedesktop.org (Postfix) with ESMTPS id 57E1210E751 for ; Fri, 4 Nov 2022 13:03:30 +0000 (UTC) Received: by mail-lj1-x234.google.com with SMTP id x21so6228739ljg.10 for ; Fri, 04 Nov 2022 06:03:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=NRhMNxQi6Qu7fp/d11z2XuTmlDZU0glcg0Uw8w9zeiw=; b=gIRqwUn/2btJsIMZEgpZeFlv5xMX1U4dhaUglHYKk0txFpixWoSmkyWLPKpDZ4PlvD sLTiWKJ7aGLvIhLrZ66WNAgY9ArJ2uNEk/ER5xgpMAllw6mRA1LnjBtr2CFwQqxgb074 jchfQplVCkBAHM9mKAHySFdKdS6FMtwVsryX/8mO7ulWSlO2xUMAj9Q11wulCaAaPxVG 501UxBoTShudVTpPG0HfM4TZZWiM9bqjxCimjSm2GYaxXEOK1X8n+9CzNAw7udDOBe1X SdMEpmFm3OlLGI8Wtjwmrou+NA8W+FedAWIyJ3TZpNiP2xMNHiV5RavpK7eiGg0qrKxL coFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=NRhMNxQi6Qu7fp/d11z2XuTmlDZU0glcg0Uw8w9zeiw=; b=2l22zZemVl5CXlSGuDbN5E3tIfSvT6ESTo6o1ySFLChTHKSEnMiXjxvVjtG14yu9hf evNqPMg1dcNNuyQ5ufZbpXklGomd9tZqvs4ZJ6SLixdYz4pG8XMFLlCE0q9ertSWgAac 2c6Cz/klBsiXtpYqb6YDvYamFRMzYLVLIFGHmlDOu4suhFX9G4vx9MfWhZjrUzMYuc7W 3UexZm/DTHwaUtaSUfTwg0Gy6KKKE1smoW2xkYykdzHzaeD+17fBfrlNTkgYvIjS8Pb7 WaepZF8xgWhEhulQpndr5ZeDhrbVEXZc47OzjidPYABKkw5NxeBysYExp0V0V+UUXyxC Aang== X-Gm-Message-State: ACrzQf2Vu1FgwSw4RzDLBckgrvxx5IYWRq7viVQQdn644uLSjX2N0AAl DWklg0U6AoDvAB+pR9qDdBlblA== X-Google-Smtp-Source: AMsMyM4R4JXKI6jpXn5A+LUD4pafING6a+I3Qec0AyQfuWzhYM6M6siyNZT5loXbGGdBDiJqEkpf9Q== X-Received: by 2002:a2e:9697:0:b0:277:74dd:1fac with SMTP id q23-20020a2e9697000000b0027774dd1facmr717357lji.307.1667567008379; Fri, 04 Nov 2022 06:03:28 -0700 (PDT) Received: from localhost.localdomain ([195.165.23.90]) by smtp.gmail.com with ESMTPSA id s6-20020a2eb626000000b0026fe0a052c5sm419975ljn.129.2022.11.04.06.03.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Nov 2022 06:03:28 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Subject: [PATCH v3 0/8] drm/msm: add support for SM8450 Date: Fri, 4 Nov 2022 16:03:16 +0300 Message-Id: <20221104130324.1024242-1-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, Stephen Boyd , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This adds support for the MDSS/DPU/DSI on the Qualcomm SM8450 platform. Dependencies for the DT bindings: [1]. [1] https://lore.kernel.org/all/20221024164225.3236654-1-dmitry.baryshkov@linaro.org/ Change since v2: - Rebased onto msm-next-lumag - Cleaned up bindings according to Krzysztof's suggestions Change since v1: - Fixed the regdma pointer in sm8450_dpu_cfg - Rebased onto pending msm-next-lumag - Added DT bindings for corresponding devices Dmitry Baryshkov (8): dt-bindings: display/msm/dsi-controller-main: allow defining opp-table dt-bindings: display/msm: add sm8350 and sm8450 DSI PHYs dt-bindings: display/msm: add support for the display on SM8450 drm/msm/dsi: add support for DSI-PHY on SM8350 and SM8450 drm/msm/dsi: add support for DSI 2.6.0 drm/msm/dpu: add support for MDP_TOP blackhole drm/msm/dpu: add support for SM8450 drm/msm: mdss: add support for SM8450 .../display/msm/dsi-controller-main.yaml | 3 + .../bindings/display/msm/dsi-phy-7nm.yaml | 2 + .../bindings/display/msm/qcom,sm8450-dpu.yaml | 132 +++++++ .../display/msm/qcom,sm8450-mdss.yaml | 347 ++++++++++++++++++ drivers/gpu/drm/msm/Kconfig | 6 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 224 +++++++++++ .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 3 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 12 +- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 2 + drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 + drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 4 + drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 2 + drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 128 ++++++- drivers/gpu/drm/msm/msm_mdss.c | 5 + 15 files changed, 858 insertions(+), 15 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml -- 2.35.1