Re: [RFC] Kernel Support of Memory Error Detection.

From: "HORIGUCHI NAOYA(堀口　直也)" <naoya.horiguchi@nec.com>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: Jiaqi Yan <jiaqiyan@google.com>,
	Nadav Amit <nadav.amit@gmail.com>,
	"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
	David Hildenbrand <david@redhat.com>,
	"Aktas, Erdem" <erdemaktas@google.com>,
	"pgonda@google.com" <pgonda@google.com>,
	"rientjes@google.com" <rientjes@google.com>,
	"Hsiao, Duen-wen" <duenwen@google.com>,
	"Vilas.Sridharan@amd.com" <Vilas.Sridharan@amd.com>,
	"Malvestuto, Mike" <mike.malvestuto@intel.com>,
	"gthelen@google.com" <gthelen@google.com>,
	"linux-mm@kvack.org" <linux-mm@kvack.org>,
	"jthoughton@google.com" <jthoughton@google.com>
Subject: Re: [RFC] Kernel Support of Memory Error Detection.
Date: Wed, 9 Nov 2022 05:04:41 +0000	[thread overview]
Message-ID: <20221109050425.GA527418@hori.linux.bs1.fc.nec.co.jp> (raw)
In-Reply-To: <SJ1PR11MB6083BF93E9A88E659CED5EC4FC3F9@SJ1PR11MB6083.namprd11.prod.outlook.com>

On Tue, Nov 08, 2022 at 04:17:06PM +0000, Luck, Tony wrote:
> > If it is feasible in future that hardware vendors can make patrol
> > scrubber programmable, we can even direct the scanning to patrol
> > scrubber.
> 
> There was an attempt to create an ACPI interface for this. I don't know if it made
> it into the standard.

I briefly checked the latest ACPI spec, and it seems that some interfaces
to control (h/w based) patrol scrubbing are defined.

https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#acpi-ras-feature-table-rasf

> I didn't do anything with it for Linux because the interface was
> quite complex.
> 
> From a h/w perspective it might always be complex. Consecutive system physical
> addresses are generally interleaved across multiple memory controllers, channels,
> DIMMs and ranks. While patrol scrubbing may be done by each memory controller
> at the channel level.
> 
> So a simple request to scan a few megabytes of system physical address would
> require address translation to figure out the channel addresses on each of the
> memory controllers and programming each to scan the pieces they contribute to
> the target range.

I expect that the physical address visible to the kernel is transparently
translated to the real address in which DIMM in which channel.

- Naoya Horiguchi