All of lore.kernel.org
 help / color / mirror / Atom feed
From: Tom Chung <chiahsuan.chung@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: stylon.wang@amd.com,
	Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>,
	Tom Chung <chiahsuan.chung@amd.com>,
	Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
	roman.li@amd.com, solomon.chiu@amd.com, Aurabindo.Pillai@amd.com,
	wayne.lin@amd.com, Jun Lei <Jun.Lei@amd.com>,
	Bhawanpreet.Lakha@amd.com, agustin.gutierrez@amd.com,
	pavle.kotarac@amd.com
Subject: [PATCH 17/29] drm/amd/display: fix unbounded requesting for high pixel rate modes on dcn315
Date: Wed, 9 Nov 2022 14:13:07 +0800	[thread overview]
Message-ID: <20221109061319.2870943-18-chiahsuan.chung@amd.com> (raw)
In-Reply-To: <20221109061319.2870943-1-chiahsuan.chung@amd.com>

From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>

Unbounded requesting is getting configured for odm mode calculations which
is incorrect. This change checks whether mode requires odm ahead of time.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c | 4 +++-
 drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c    | 5 +++++
 drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h    | 1 +
 3 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
index 2a5227330513..2d05e8d843c9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
@@ -1706,7 +1706,9 @@ static int dcn315_populate_dml_pipes_from_context(
 			dc->config.enable_4to1MPC = true;
 			context->bw_ctx.dml.ip.det_buffer_size_kbytes =
 					(max_usable_det / DCN3_15_CRB_SEGMENT_SIZE_KB / 4) * DCN3_15_CRB_SEGMENT_SIZE_KB;
-		} else if (!is_dual_plane(pipe->plane_state->format) && pipe->plane_state->src_rect.width <= 5120) {
+		} else if (!is_dual_plane(pipe->plane_state->format)
+				&& pipe->plane_state->src_rect.width <= 5120
+				&& pipe->stream->timing.pix_clk_100hz < dcn_get_max_non_odm_pix_rate_100hz(&dc->dml.soc)) {
 			/* Limit to 5k max to avoid forced pipe split when there is not enough detile for swath */
 			context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192;
 			pipes[0].pipe.src.unbounded_req_mode = true;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
index 4cdad8674b8e..12b23bd50e19 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
@@ -807,3 +807,8 @@ void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_param
 	else
 		dml_init_instance(&dc->dml, &dcn3_16_soc, &dcn3_16_ip, DML_PROJECT_DCN31_FPGA);
 }
+
+int dcn_get_max_non_odm_pix_rate_100hz(struct _vcs_dpi_soc_bounding_box_st *soc)
+{
+	return soc->clock_limits[0].dispclk_mhz * 10000.0 / (1.0 + soc->dcn_downspread_percent / 100.0);
+}
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h
index b0b2ba9df57a..687d3522cc33 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h
@@ -46,6 +46,7 @@ void dcn31_calculate_wm_and_dlg_fp(
 void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
 void dcn315_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
 void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
+int dcn_get_max_non_odm_pix_rate_100hz(struct _vcs_dpi_soc_bounding_box_st *soc);
 
 int dcn31x_populate_dml_pipes_from_context(struct dc *dc,
 					  struct dc_state *context,
-- 
2.25.1


  parent reply	other threads:[~2022-11-09  6:16 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-09  6:12 [PATCH 00/29] DC Patches November 07, 2022 Tom Chung
2022-11-09  6:12 ` [PATCH 01/29] drm/amd/display: Fix access timeout to DPIA AUX at boot time Tom Chung
2022-11-09  6:12   ` Tom Chung
2022-11-09  6:12 ` [PATCH 02/29] drm/amd/display: Add HUBP surface flip interrupt handler Tom Chung
2022-11-09  6:12 ` [PATCH 03/29] drm/amd/display: Fix invalid DPIA AUX reply causing system hang Tom Chung
2022-11-09  6:12   ` Tom Chung
2022-11-09  6:12 ` [PATCH 04/29] drm/amd/display: fix dpms_off issue when disabling bios mode Tom Chung
2022-11-17 13:50   ` Mike Lothian
2022-11-09  6:12 ` [PATCH 05/29] drm/amd/display: Update SubVP Visual Confirm Tom Chung
2022-11-09  6:12 ` [PATCH 06/29] drm/amd/display: clean up some irq service code for dcn201 Tom Chung
2022-11-09  6:12 ` [PATCH 07/29] drm/amd/display: Program pipes for ODM when removing planes Tom Chung
2022-11-09  6:12 ` [PATCH 08/29] drm/amd/display: Use min transition for all SubVP plane add/remove Tom Chung
2022-11-09  6:12 ` [PATCH 09/29] drm/amd/display: use low clocks for no plane configs Tom Chung
2022-11-09  6:13 ` [PATCH 10/29] drm/amd/display: Support parsing VRAM info v3.0 from VBIOS Tom Chung
2022-11-09  6:13 ` [PATCH 11/29] drm/amd/display: enable dchub request limit for NV32 Tom Chung
2022-11-09  6:13 ` [PATCH 12/29] drm/amd/display: Workaround to increase phantom pipe vactive in pipesplit Tom Chung
2022-11-09  6:13 ` [PATCH 13/29] drm/amd/display: fix dcn3.1x mode validation on high bandwidth config Tom Chung
2022-11-09  6:13 ` [PATCH 14/29] drm/amd/display: Check context constructed for pipe split flags is still valid Tom Chung
2022-11-09  6:13 ` [PATCH 15/29] drm/amd/display: Align phantom pipe dst/src scaling with main for subvp Tom Chung
2022-11-09  6:13 ` [PATCH 16/29] drm/amd/display: Fix calculation for cursor CAB allocation Tom Chung
2022-11-09  6:13 ` Tom Chung [this message]
2022-11-09  6:13 ` [PATCH 18/29] drm/amd/display: Don't check output BPP for phantom Tom Chung
2022-11-09  6:13 ` [PATCH 19/29] drm/amd/display: revert Disable DRR actions during state commit Tom Chung
2022-11-09  6:13 ` [PATCH 20/29] drm/amd/display: fix array index out of bound error in bios parser Tom Chung
2022-11-09  6:13 ` [PATCH 21/29] drm/amd/display: Fix optc2_configure warning on dcn314 Tom Chung
2022-11-09  6:13 ` [PATCH 22/29] drm/amd/display: Fix Subvp phantom pipe transition Tom Chung
2022-11-09  6:13 ` [PATCH 23/29] drm/amd/display: Fix prefetch calculations for dcn32 Tom Chung
2022-11-09  6:13 ` [PATCH 24/29] drm/amd/display: use uclk pstate latency for fw assisted mclk validation dcn32 Tom Chung
2022-11-09  6:13 ` [PATCH 25/29] drm/amd/display: Set max for prefetch lines on dcn32 Tom Chung
2022-11-09  6:13 ` [PATCH 26/29] drm/amd/display: rework macros for DWB register access Tom Chung
2022-11-09  6:13 ` [PATCH 27/29] drm/amd/display: Adjust DP 8b10b LT exit behavior Tom Chung
2022-11-09  6:13 ` [PATCH 28/29] drm/amd/display: [FW Promotion] Release 0.0.143.0 Tom Chung
2022-11-09  6:13 ` [PATCH 29/29] drm/amd/display: 3.2.212 Tom Chung

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221109061319.2870943-18-chiahsuan.chung@amd.com \
    --to=chiahsuan.chung@amd.com \
    --cc=Aurabindo.Pillai@amd.com \
    --cc=Bhawanpreet.Lakha@amd.com \
    --cc=Dmytro.Laktyushkin@amd.com \
    --cc=Harry.Wentland@amd.com \
    --cc=Jun.Lei@amd.com \
    --cc=Rodrigo.Siqueira@amd.com \
    --cc=Sunpeng.Li@amd.com \
    --cc=agustin.gutierrez@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=pavle.kotarac@amd.com \
    --cc=qingqing.zhuo@amd.com \
    --cc=roman.li@amd.com \
    --cc=solomon.chiu@amd.com \
    --cc=stylon.wang@amd.com \
    --cc=wayne.lin@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.