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Fri, 11 Nov 2022 13:41:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=stgolabs.net; s=dreamhost; t=1668202869; bh=Hq9dKS4i1VQNcbbZP+QPp8DOjflWFMb+umRCLNBhTJQ=; h=Date:From:To:Cc:Subject:Content-Type; b=W637b59BaCXan9XMrzVbb0qQLR1CzH9rpBLEwRhCmbDFz+Bcj5vqLZzM+MGv78Vav If2HzmdV/D9Ae9b/PzKCq41xi+0r1lWSNtA82/47irTXHBqCFPCqxXVHp07J+g/VA7 3HyJCPVARGpd1UoZjwH+6ztE+aYJfIEmTn1zaB4Om1acmuwe42GWlwaPNG+Ri9GJLn MxfbhOxHczVKeqtXtrE/0olRev3Y/D1cfgxkNOSsEcYfXPVMKisfoE2KV02CWfBiBQ rNAB8XwAGwjnNoYJfs8+EIsAAJXBaMbMkjvzFx0EPme7zfYzsgRQUGpYQDT5G805RJ nLkd4YPNtXbSA== Date: Fri, 11 Nov 2022 13:18:32 -0800 From: Davidlohr Bueso To: Ira Weiny Cc: Jonathan Cameron , Bjorn Helgaas , Dan Williams , dave.jiang@intel.com, alison.schofield@intel.com, bwidawsk@kernel.org, vishal.l.verma@intel.com, a.manzanares@samsung.com, linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Helgaas , linux-pci@vger.kernel.org, Christoph Hellwig Subject: Re: [PATCH 1/2] cxl/pci: Add generic MSI-X/MSI irq support Message-ID: <20221111211832.zfjtehrk4fhjcjea@offworld> References: <20221024133633.00000467@huawei.com> <20221025232535.GA579167@bhelgaas> <20221102171524.thsz2kwtirhxn7ee@offworld> <20221103001833.n2gsoflnji3pcsfr@offworld> <20221103180916.00000bae@Huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20220429 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 09 Nov 2022, Ira Weiny wrote: >Unfortunately the following does not work with the current Qemu. > >/* > * NOTE: Currently all the functions which are enabled for CXL require their > * vectors to be in the first 16. Allocate this number as the min/max. > */ >#define CXL_PCI_REQUIRED_VECTORS 16 > >... > > rc = pci_alloc_irq_vectors(pdev, CXL_PCI_REQUIRED_VECTORS, > CXL_PCI_REQUIRED_VECTORS, > PCI_IRQ_MSIX | PCI_IRQ_MSI); > >This is because Qemu CXL devices only support (with the event changes I have >made) 8 msg numbers. So the code fails to allocate any vectors. > >I guess I should have known better. But allocating something less than 16 I >guess needs to be allowed. > >But that also means that beyond knowing _if_ irq's have been enabled I think >each CXL feature needs to know the number of vectors allocated so they can >ensure their msg numbers are going to work. > >So how about the following as a diff to this patch? > >In the event code I have then used the nr_irq_vecs field to determine if I >should enable the irq for each log. > >If you are ok with it I'm going to squash it into your patch and send out a new >version of the event log series. LGTM, thanks.