[PATCH 0/3] hw/{i2c, nvme}: mctp endpoint, nvme management interface model

From: Klaus Jensen <its@irrelevant.dk>
To: qemu-devel@nongnu.org
Cc: "Andrew Jeffery" <andrew@aj.id.au>,
	"Keith Busch" <kbusch@kernel.org>,
	"Corey Minyard" <cminyard@mvista.com>,
	"Peter Delevoryas" <peter@pjd.dev>,
	qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
	qemu-block@nongnu.org, "Jeremy Kerr" <jk@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Klaus Jensen" <its@irrelevant.dk>,
	"Klaus Jensen" <k.jensen@samsung.com>
Subject: [PATCH 0/3] hw/{i2c, nvme}: mctp endpoint, nvme management interface model
Date: Wed, 16 Nov 2022 09:43:09 +0100	[thread overview]
Message-ID: <20221116084312.35808-1-its@irrelevant.dk> (raw)

From: Klaus Jensen <k.jensen@samsung.com>

This adds a generic MCTP endpoint model that other devices may derive
from. I'm not 100% happy with the design of the class methods, but it's
a start.

Patch 1 is a bug fix, but since there are currently no in-tree users of
the API, it is not critical. I'd like to have Peter verify the fix with
his netdev code as well.

Also included is a very basic implementation of an NVMe-MI device,
supporting only a small subset of the required commands.

Since this all relies on i2c target mode, this can currently only be
used with an SoC that includes the Aspeed I2C controller.

The easiest way to get up and running with this, is to grab my buildroot
overlay[1]. It includes modified a modified dts as well as a couple of
required packages.

QEMU can then be launched along these lines:

  qemu-system-arm \
    -nographic \
    -M ast2600-evb \
    -kernel output/images/zImage \
    -initrd output/images/rootfs.cpio \
    -dtb output/images/aspeed-ast2600-evb-nmi.dtb \
    -nic user,hostfwd=tcp::2222-:22 \
    -device nmi-i2c,address=0x3a \
    -serial mon:stdio

From within the booted system,

  mctp addr add 8 dev mctpi2c15
  mctp link set mctpi2c15 up
  mctp route add 9 via mctpi2c15
  mctp neigh add 9 dev mctpi2c15 lladdr 0x3a
  mi-mctp 1 9 info

Comments are very welcome!

  [1]: https://github.com/birkelund/buildroots/tree/main/mctp-i2c

Klaus Jensen (3):
  hw/i2c: only schedule pending master when bus is idle
  hw/i2c: add mctp core
  hw/nvme: add nvme management interface model

 hw/arm/Kconfig         |   1 +
 hw/i2c/Kconfig         |   4 +
 hw/i2c/aspeed_i2c.c    |   2 +
 hw/i2c/core.c          |  37 ++--
 hw/i2c/mctp.c          | 365 +++++++++++++++++++++++++++++++++++++++
 hw/i2c/meson.build     |   1 +
 hw/i2c/trace-events    |  12 ++
 hw/nvme/meson.build    |   1 +
 hw/nvme/nmi-i2c.c      | 381 +++++++++++++++++++++++++++++++++++++++++
 hw/nvme/trace-events   |   6 +
 include/hw/i2c/i2c.h   |   2 +
 include/hw/i2c/mctp.h  |  83 +++++++++
 include/hw/misc/mctp.h |  43 +++++
 13 files changed, 923 insertions(+), 15 deletions(-)
 create mode 100644 hw/i2c/mctp.c
 create mode 100644 hw/nvme/nmi-i2c.c
 create mode 100644 include/hw/i2c/mctp.h
 create mode 100644 include/hw/misc/mctp.h

-- 
2.38.1