Hi,

I love your patch! Perhaps something to improve:

[auto build test WARNING on 3c1f24109dfc4fb1a3730ed237e50183c6bb26b3]

url:    https://github.com/intel-lab-lkp/linux/commits/daire-mcnamara-microchip-com/PCI-microchip-Partition-address-translations/20221116-220208
base:   3c1f24109dfc4fb1a3730ed237e50183c6bb26b3
patch link:    https://lore.kernel.org/r/20221116135504.258687-5-daire.mcnamara%40microchip.com
patch subject: [PATCH v1 4/9] PCI: microchip: Clean up initialisation of interrupts
config: x86_64-randconfig-a012
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/95ed87687f4c8f6f3f0cd68380500fd764db9fbd
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review daire-mcnamara-microchip-com/PCI-microchip-Partition-address-translations/20221116-220208
        git checkout 95ed87687f4c8f6f3f0cd68380500fd764db9fbd
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/pci/controller/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/pci/controller/pcie-microchip-host.c:1103:16: warning: variable 'ctrl_base_addr' set but not used [-Wunused-but-set-variable]
           void __iomem *ctrl_base_addr;
                         ^
   1 warning generated.


vim +/ctrl_base_addr +1103 drivers/pci/controller/pcie-microchip-host.c

  1096	
  1097	static int mc_platform_init(struct pci_config_window *cfg)
  1098	{
  1099		struct device *dev = cfg->parent;
  1100		struct platform_device *pdev = to_platform_device(dev);
  1101		struct mc_pcie *port;
  1102		void __iomem *bridge_base_addr;
> 1103		void __iomem *ctrl_base_addr;
  1104		int ret;
  1105	
  1106		port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
  1107		if (!port)
  1108			return -ENOMEM;
  1109		port->dev = dev;
  1110	
  1111		ret = mc_pcie_init_clks(dev);
  1112		if (ret) {
  1113			dev_err(dev, "failed to get clock resources, error %d\n", ret);
  1114			return -ENODEV;
  1115		}
  1116	
  1117		port->axi_base_addr = devm_platform_ioremap_resource(pdev, 1);
  1118		if (IS_ERR(port->axi_base_addr))
  1119			return PTR_ERR(port->axi_base_addr);
  1120	
  1121		mc_disable_interrupts(port);
  1122	
  1123		bridge_base_addr = port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
  1124		ctrl_base_addr = port->axi_base_addr + MC_PCIE_CTRL_ADDR;
  1125	
  1126		port->msi.vector_phy = MSI_ADDR;
  1127		port->msi.num_vectors = MC_NUM_MSI_IRQS;
  1128	
  1129		/* Hardware doesn't setup MSI by default */
  1130		mc_pcie_enable_msi(port, cfg->win);
  1131	
  1132		/* Configure Address Translation Table 0 for PCIe config space */
  1133		mc_pcie_setup_window(bridge_base_addr, 0, cfg->res.start & 0xffffffff,
  1134				     cfg->res.start, resource_size(&cfg->res));
  1135	
  1136		ret = mc_pcie_setup_windows(pdev, port);
  1137		if (ret)
  1138			return ret;
  1139	
  1140		/* address translation is up; safe to enable interrupts */
  1141		return mc_init_interrupts(pdev, port);
  1142	}
  1143	

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp