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From: Jisheng Zhang <jszhang@kernel.org>
To: "Rob Herring" <robh+dt@kernel.org>,
	"Conor Dooley" <conor@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Jiri Slaby" <jirislaby@kernel.org>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org
Subject: [PATCH v2 1/9] dt-bindings: serial: add documentation for Bouffalolab UART Driver
Date: Sun, 27 Nov 2022 21:24:40 +0800	[thread overview]
Message-ID: <20221127132448.4034-2-jszhang@kernel.org> (raw)
In-Reply-To: <20221127132448.4034-1-jszhang@kernel.org>

Add bindings doc for Bouffalolab UART Driver

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 .../bindings/serial/bouffalolab,uart.yaml     | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml

diff --git a/Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml b/Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml
new file mode 100644
index 000000000000..a8293444ca31
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/bouffalolab,uart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Bouffalolab UART Controller
+
+maintainers:
+  - Jisheng Zhang <jszhang@kernel.org>
+
+allOf:
+  - $ref: serial.yaml#
+
+properties:
+  compatible:
+    const: bouffalolab,bl808-uart
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    uart0: serial@30002000 {
+        compatible = "bouffalolab,bl808-uart";
+        reg = <0x30002000 0x1000>;
+        interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&xtal>;
+    };
+...
-- 
2.38.1


WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: "Rob Herring" <robh+dt@kernel.org>,
	"Conor Dooley" <conor@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Jiri Slaby" <jirislaby@kernel.org>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org
Subject: [PATCH v2 1/9] dt-bindings: serial: add documentation for Bouffalolab UART Driver
Date: Sun, 27 Nov 2022 21:24:40 +0800	[thread overview]
Message-ID: <20221127132448.4034-2-jszhang@kernel.org> (raw)
In-Reply-To: <20221127132448.4034-1-jszhang@kernel.org>

Add bindings doc for Bouffalolab UART Driver

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 .../bindings/serial/bouffalolab,uart.yaml     | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml

diff --git a/Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml b/Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml
new file mode 100644
index 000000000000..a8293444ca31
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/bouffalolab,uart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Bouffalolab UART Controller
+
+maintainers:
+  - Jisheng Zhang <jszhang@kernel.org>
+
+allOf:
+  - $ref: serial.yaml#
+
+properties:
+  compatible:
+    const: bouffalolab,bl808-uart
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    uart0: serial@30002000 {
+        compatible = "bouffalolab,bl808-uart";
+        reg = <0x30002000 0x1000>;
+        interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&xtal>;
+    };
+...
-- 
2.38.1


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  reply	other threads:[~2022-11-27 13:34 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-27 13:24 [PATCH v2 0/9] riscv: add Bouffalolab bl808 support Jisheng Zhang
2022-11-27 13:24 ` Jisheng Zhang
2022-11-27 13:24 ` Jisheng Zhang [this message]
2022-11-27 13:24   ` [PATCH v2 1/9] dt-bindings: serial: add documentation for Bouffalolab UART Driver Jisheng Zhang
2022-11-30  5:45   ` Samuel Holland
2022-11-30  5:45     ` Samuel Holland
2022-12-01 11:02   ` Krzysztof Kozlowski
2022-12-01 11:02     ` Krzysztof Kozlowski
2022-11-27 13:24 ` [PATCH v2 2/9] serial: bflb_uart: add " Jisheng Zhang
2022-11-27 13:24   ` Jisheng Zhang
2022-11-28  6:10   ` Jiri Slaby
2022-11-28  6:10     ` Jiri Slaby
2022-11-28 14:21     ` Jisheng Zhang
2022-11-28 14:21       ` Jisheng Zhang
2022-11-28 16:01       ` Ilpo Järvinen
2022-11-28 16:01         ` Ilpo Järvinen
2022-11-28 23:20         ` Jisheng Zhang
2022-11-28 23:20           ` Jisheng Zhang
2022-11-29  6:32           ` Jiri Slaby
2022-11-29  6:32             ` Jiri Slaby
2022-12-05 20:03   ` kernel test robot
2022-12-05 20:03     ` kernel test robot
2022-11-27 13:24 ` [PATCH v2 3/9] riscv: add the Bouffalolab SoC family Kconfig option Jisheng Zhang
2022-11-27 13:24   ` Jisheng Zhang
2022-11-30  6:48   ` Samuel Holland
2022-11-30  6:48     ` Samuel Holland
2022-11-27 13:24 ` [PATCH v2 4/9] dt-bindings: vendor-prefixes: add bouffalolab Jisheng Zhang
2022-11-27 13:24   ` Jisheng Zhang
2022-11-27 17:23   ` Conor Dooley
2022-11-27 17:23     ` Conor Dooley
2022-12-01 11:03   ` Krzysztof Kozlowski
2022-12-01 11:03     ` Krzysztof Kozlowski
2022-11-27 13:24 ` [PATCH v2 5/9] dt-bindings: riscv: Add bouffalolab bl808 board compatibles Jisheng Zhang
2022-11-27 13:24   ` Jisheng Zhang
2022-11-27 16:25   ` Rob Herring
2022-11-27 16:25     ` Rob Herring
2022-11-27 17:29   ` Conor Dooley
2022-11-27 17:29     ` Conor Dooley
2022-12-01 11:05   ` Krzysztof Kozlowski
2022-12-01 11:05     ` Krzysztof Kozlowski
2022-12-01 11:14     ` Conor Dooley
2022-12-01 11:14       ` Conor Dooley
2022-12-01 11:41       ` Krzysztof Kozlowski
2022-12-01 11:41         ` Krzysztof Kozlowski
2022-11-27 13:24 ` [PATCH v2 6/9] riscv: dts: bouffalolab: add the bl808 SoC base device tree Jisheng Zhang
2022-11-27 13:24   ` Jisheng Zhang
2022-11-27 17:21   ` Conor Dooley
2022-11-27 17:21     ` Conor Dooley
2022-11-28  9:52     ` Icenowy Zheng
2022-11-28  9:52       ` Icenowy Zheng
2022-11-28 14:52       ` Conor Dooley
2022-11-28 14:52         ` Conor Dooley
2022-11-30  7:21   ` Samuel Holland
2022-11-30  7:21     ` Samuel Holland
2022-12-05  8:17     ` Icenowy Zheng
2022-12-05  8:17       ` Icenowy Zheng
2022-12-05 10:29       ` Conor Dooley
2022-12-05 10:29         ` Conor Dooley
2023-01-04  8:32   ` Michael Walle
2023-01-04  8:32     ` Michael Walle
2022-11-27 13:24 ` [PATCH v2 7/9] riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree Jisheng Zhang
2022-11-27 13:24   ` Jisheng Zhang
2022-11-27 17:32   ` Conor Dooley
2022-11-27 17:32     ` Conor Dooley
2022-11-30  7:25   ` Samuel Holland
2022-11-30  7:25     ` Samuel Holland
2022-12-05  8:15     ` Icenowy Zheng
2022-12-05  8:15       ` Icenowy Zheng
2022-11-27 13:24 ` [PATCH v2 8/9] MAINTAINERS: riscv: add entry for Bouffalolab SoC Jisheng Zhang
2022-11-27 13:24   ` Jisheng Zhang
2022-11-27 17:35   ` Conor Dooley
2022-11-27 17:35     ` Conor Dooley
2022-11-27 17:36     ` Conor Dooley
2022-11-27 17:36       ` Conor Dooley
2022-11-28 14:30       ` Jisheng Zhang
2022-11-28 14:30         ` Jisheng Zhang
2022-11-28 14:34         ` Jisheng Zhang
2022-11-28 14:34           ` Jisheng Zhang
2022-11-28 14:50         ` Conor Dooley
2022-11-28 14:50           ` Conor Dooley
2022-11-30  7:27   ` Samuel Holland
2022-11-30  7:27     ` Samuel Holland
2022-11-27 13:24 ` [PATCH v2 9/9] riscv: defconfig: enable BOUFFALOLAB SoC Jisheng Zhang
2022-11-27 13:24   ` Jisheng Zhang
2022-11-27 17:36   ` Conor Dooley
2022-11-27 17:36     ` Conor Dooley
2022-12-02 17:54 ` [PATCH v2 0/9] riscv: add Bouffalolab bl808 support Palmer Dabbelt
2022-12-02 17:54   ` Palmer Dabbelt

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