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From: Andrew Jones <ajones@ventanamicro.com>
To: panqinglin2020@iscas.ac.cn
Cc: palmer@dabbelt.com, linux-riscv@lists.infradead.org,
	jeff@riscv.org, xuyinan@ict.ac.cn, conor@kernel.org,
	alex@ghiti.fr
Subject: Re: [PATCH v8 3/3] riscv: mm: support Svnapot in huge vmap
Date: Tue, 29 Nov 2022 14:18:39 +0100	[thread overview]
Message-ID: <20221129131839.axu6yvrv3kum6pdc@kamzik> (raw)
In-Reply-To: <20221128022719.328770-4-panqinglin2020@iscas.ac.cn>

On Mon, Nov 28, 2022 at 10:27:19AM +0800, panqinglin2020@iscas.ac.cn wrote:
> From: Qinglin Pan <panqinglin2020@iscas.ac.cn>
> 
> As HAVE_ARCH_HUGE_VMAP and HAVE_ARCH_HUGE_VMALLOC is supported, we can
> implement arch_vmap_pte_range_map_size and arch_vmap_pte_supported_shift
> for Svnapot to support huge vmap about napot size.
> 
> It can be tested by huge vmap used in pci driver. Huge vmalloc with svnapot
> can be tested by changing test_vmalloc module to use vmalloc_huge in it,
> and probe this module to run tests.

It'd be nice to get your changes to test_vmalloc posted where the switch
between vmalloc and vmalloc_huge is controlled by a module parameter.

> 
> Signed-off-by: Qinglin Pan <panqinglin2020@iscas.ac.cn>
> 
> diff --git a/arch/riscv/include/asm/vmalloc.h b/arch/riscv/include/asm/vmalloc.h
> index 48da5371f1e9..99b89ab445e2 100644
> --- a/arch/riscv/include/asm/vmalloc.h
> +++ b/arch/riscv/include/asm/vmalloc.h
> @@ -17,6 +17,65 @@ static inline bool arch_vmap_pmd_supported(pgprot_t prot)
>  	return true;
>  }
>  
> -#endif
> +#ifdef CONFIG_RISCV_ISA_SVNAPOT
> +#include <linux/pgtable.h>
>  
> +#define arch_vmap_pte_range_map_size arch_vmap_pte_range_map_size
> +static inline unsigned long arch_vmap_pte_range_map_size(unsigned long addr, unsigned long end,
> +							 u64 pfn, unsigned int max_page_shift)
> +{
> +	unsigned long size, order;
> +	unsigned long map_size = PAGE_SIZE;
> +
> +	if (!has_svnapot())
> +		return map_size;
> +
> +	for_each_napot_order_rev(order) {
> +		if (napot_cont_shift(order) > max_page_shift)
> +			continue;
> +
> +		size = napot_cont_size(order);
> +		if (end - addr < size)
> +			continue;
> +
> +		if (!IS_ALIGNED(addr, size))
> +			continue;
> +
> +		if (!IS_ALIGNED(PFN_PHYS(pfn), size))
> +			continue;
> +
> +		map_size = size;
> +		break;
> +	}
> +
> +	return map_size;
> +}
> +
> +#define arch_vmap_pte_supported_shift arch_vmap_pte_supported_shift
> +static inline int arch_vmap_pte_supported_shift(unsigned long size)
> +{
> +	int shift = PAGE_SHIFT;
> +	unsigned long order;
> +
> +	if (!has_svnapot())
> +		return shift;
> +
> +	WARN_ON_ONCE(size >= PMD_SIZE);
> +
> +	for_each_napot_order_rev(order) {
> +		if (napot_cont_size(order) > size)
> +			continue;
> +
> +		if (size & napot_cont_mask(order))
> +			continue;
> +
> +		shift = napot_cont_shift(order);
> +		break;
> +	}
> +
> +	return shift;
> +}
> +
> +#endif /* CONFIG_RISCV_ISA_SVNAPOT */
> +#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
>  #endif /* _ASM_RISCV_VMALLOC_H */
> -- 
> 2.37.4
>

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

Thanks,
drew

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      reply	other threads:[~2022-11-29 13:18 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-28  2:27 [PATCH v8 0/3] riscv, mm: detect svnapot cpu support at runtime panqinglin2020
2022-11-28  2:27 ` [PATCH v8 1/3] riscv: mm: modify pte format for Svnapot panqinglin2020
2022-11-29  9:49   ` Andrew Jones
2022-11-29 15:42     ` Jisheng Zhang
2022-12-04  9:21     ` Qinglin Pan
2022-11-29 14:37   ` Andrew Jones
2022-11-28  2:27 ` [PATCH v8 2/3] riscv: mm: support Svnapot in hugetlb page panqinglin2020
2022-11-29 13:01   ` Andrew Jones
2022-12-04  9:24     ` Qinglin Pan
2022-11-28  2:27 ` [PATCH v8 3/3] riscv: mm: support Svnapot in huge vmap panqinglin2020
2022-11-29 13:18   ` Andrew Jones [this message]

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