From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FB4F569B for ; Thu, 15 Dec 2022 18:11:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0A229C433EF; Thu, 15 Dec 2022 18:11:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1671127913; bh=auDQjwHm6h2ALybttMU6AStHAYjCwp3thiNoP+tCx8I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xoMdUy9s2mrGR0Z9nzM2deSgO8Wxsxs6/Inr2ziIw0mABPr7DcWCGxcBFOPZ2zOBZ 1tbTRL9TjDve3noU7MpeEmwoXZXDXOIHyP8/CFvfJqwXD/5zCq+shLAfq6hQbGV/Cb j0Uqpr3qdwK8SiX/sZ9JF0CysmjRMvkmHtTM3FmU= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Shengjiu Wang , Mark Brown , Sasha Levin Subject: [PATCH 5.10 07/15] ASoC: fsl_micfil: explicitly clear software reset bit Date: Thu, 15 Dec 2022 19:10:34 +0100 Message-Id: <20221215172907.331503609@linuxfoundation.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221215172906.638553794@linuxfoundation.org> References: <20221215172906.638553794@linuxfoundation.org> User-Agent: quilt/0.67 Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Shengjiu Wang [ Upstream commit 292709b9cf3ba470af94b62c9bb60284cc581b79 ] SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined as non volatile register, it still remain in regmap cache after set, then every update of REG_MICFIL_CTRL1, software reset happens. to avoid this, clear it explicitly. Signed-off-by: Shengjiu Wang Link: https://lore.kernel.org/r/1651925654-32060-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- sound/soc/fsl/fsl_micfil.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c index efc5daf53bba..ead4bfa13561 100644 --- a/sound/soc/fsl/fsl_micfil.c +++ b/sound/soc/fsl/fsl_micfil.c @@ -190,6 +190,17 @@ static int fsl_micfil_reset(struct device *dev) return ret; } + /* + * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined + * as non-volatile register, so SRES still remain in regmap + * cache after set, that every update of REG_MICFIL_CTRL1, + * software reset happens. so clear it explicitly. + */ + ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, + MICFIL_CTRL1_SRES); + if (ret) + return ret; + return 0; } -- 2.35.1