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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Rob Herring <robh@kernel.org>
Cc: andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	bhelgaas@google.com, konrad.dybcio@linaro.org,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/3] dt-bindings: PCI: qcom: Document msi-map and msi-map-mask properties
Date: Fri, 23 Dec 2022 20:22:26 +0530	[thread overview]
Message-ID: <20221223145226.GB4587@thinkpad> (raw)
In-Reply-To: <20221222190141.GA1908434-robh@kernel.org>

On Thu, Dec 22, 2022 at 01:01:41PM -0600, Rob Herring wrote:
> On Thu, Dec 22, 2022 at 07:01:22PM +0530, Manivannan Sadhasivam wrote:
> > The Qcom PCIe controller is capable of using either internal MSI controller
> > or the external GIC-ITS for receiving the MSIs from endpoint devices.
> > Currently, the binding only documents the internal MSI implementation.
> > 
> > Let's document the GIC-ITS imeplementation by making use of msi-map and
> > msi-map-mask properties. Only one of the implementation should be used
> > at a time.
> 
> Isn't that up to the OS to decide? Some versions may not support MSIs.
> 

Yes, OS may choose either of them but the controller supports both and only one
implementation can be used at a time.

AFAIK, all of the SoCs supported in upstream support both MSI and legacy
interrupts.

> What about legacy interrupts? Don't you need to keep the interrupt 
> properties for them?
> 

We have "interrupt-map-mask" and "interrupt-map" properties for legacy
interrupts.

Thanks,
Mani

> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > ---
> >  Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 +++++++++---
> >  1 file changed, 9 insertions(+), 3 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > index 02450fb26bb9..10fec6a7abfc 100644
> > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > @@ -104,14 +104,20 @@ required:
> >    - compatible
> >    - reg
> >    - reg-names
> > -  - interrupts
> > -  - interrupt-names
> > -  - "#interrupt-cells"
> >    - interrupt-map-mask
> >    - interrupt-map
> >    - clocks
> >    - clock-names
> >  
> > +oneOf:
> > +  - required:
> > +      - interrupts
> > +      - interrupt-names
> > +      - "#interrupt-cells"
> > +  - required:
> > +      - msi-map
> > +      - msi-map-mask
> > +
> >  allOf:
> >    - $ref: /schemas/pci/pci-bus.yaml#
> >    - if:
> > -- 
> > 2.25.1
> > 
> > 

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2022-12-23 14:52 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-22 13:31 [PATCH v2 0/3] Qcom: Add GIC-ITS support to SM8450 PCIe controllers Manivannan Sadhasivam
2022-12-22 13:31 ` [PATCH v2 1/3] dt-bindings: PCI: qcom: Update maintainers Manivannan Sadhasivam
2022-12-22 13:31 ` [PATCH v2 2/3] dt-bindings: PCI: qcom: Document msi-map and msi-map-mask properties Manivannan Sadhasivam
2022-12-22 19:01   ` Rob Herring
2022-12-23 14:52     ` Manivannan Sadhasivam [this message]
2022-12-30 15:46   ` Lorenzo Pieralisi
2022-12-22 13:31 ` [PATCH v2 3/3] arm64: dts: qcom: sm8450: Use GIC-ITS for PCIe0 and PCIe1 Manivannan Sadhasivam
2022-12-23 17:18   ` Dmitry Baryshkov
2022-12-23 17:45     ` Manivannan Sadhasivam
2022-12-23 18:15       ` Dmitry Baryshkov
2022-12-28  9:04         ` Manivannan Sadhasivam
2022-12-30 15:47   ` Lorenzo Pieralisi

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