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From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
	qemu-block@nongnu.org, "Hervé Poussineau" <hpoussin@reactos.org>,
	"Ani Sinha" <ani@anisinha.ca>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"John Snow" <jsnow@redhat.com>,
	"Gerd Hoffmann" <kraxel@redhat.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v5 14/31] hw/isa/piix3: Create ISA PIC in host device
Date: Thu,  5 Jan 2023 15:32:11 +0100	[thread overview]
Message-ID: <20230105143228.244965-15-shentey@gmail.com> (raw)
In-Reply-To: <20230105143228.244965-1-shentey@gmail.com>

Use the newly introduced TYPE_ISA_PIC which allows for wiring
up devices in the southbridge where the virtualization technology used
(KVM, TCG, Xen) is not yet known.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221022150508.26830-16-shentey@gmail.com>
---
 include/hw/southbridge/piix.h |  4 ++--
 hw/i386/pc_piix.c             | 15 +++++++++------
 hw/isa/piix3.c                | 10 +++++++++-
 hw/i386/Kconfig               |  1 +
 hw/isa/Kconfig                |  1 +
 5 files changed, 22 insertions(+), 9 deletions(-)

diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index 1c291cc954..7178147b75 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -15,6 +15,7 @@
 #include "hw/pci/pci.h"
 #include "qom/object.h"
 #include "hw/acpi/piix4.h"
+#include "hw/intc/i8259.h"
 #include "hw/rtc/mc146818rtc.h"
 #include "hw/usb/hcd-uhci.h"
 
@@ -50,11 +51,10 @@ struct PIIXState {
 #endif
     uint64_t pic_levels;
 
-    qemu_irq *pic;
-
     /* This member isn't used. Just for save/load compatibility */
     int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS];
 
+    ISAPICState pic;
     RTCState rtc;
     UHCIState uhci;
     PIIX4PMState pm;
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index eaf252187e..f779251e79 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -219,10 +219,11 @@ static void pc_init1(MachineState *machine,
     gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
 
     if (pcmc->pci_enabled) {
-        PIIX3State *piix3;
+        DeviceState *dev;
         PCIDevice *pci_dev;
         const char *type = xen_enabled() ? TYPE_PIIX3_XEN_DEVICE
                                          : TYPE_PIIX3_DEVICE;
+        int i;
 
         pci_bus = i440fx_init(pci_type,
                               i440fx_host,
@@ -247,10 +248,12 @@ static void pc_init1(MachineState *machine,
                                  &error_abort);
         pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
 
-        piix3 = PIIX3_PCI_DEVICE(pci_dev);
-        piix3->pic = x86ms->gsi;
-        piix3_devfn = piix3->dev.devfn;
-        isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));
+        dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "pic"));
+        for (i = 0; i < ISA_NUM_IRQS; i++) {
+            qdev_connect_gpio_out(dev, i, x86ms->gsi[i]);
+        }
+        piix3_devfn = pci_dev->devfn;
+        isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
         rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
                                                              "rtc"));
         piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
@@ -259,6 +262,7 @@ static void pc_init1(MachineState *machine,
         piix4_pm = NULL;
         isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
                               &error_abort);
+        isa_bus_irqs(isa_bus, x86ms->gsi);
 
         rtc_state = isa_new(TYPE_MC146818_RTC);
         qdev_prop_set_int32(DEVICE(rtc_state), "base_year", 2000);
@@ -267,7 +271,6 @@ static void pc_init1(MachineState *machine,
         i8257_dma_init(isa_bus, 0);
         pcms->hpet_enabled = false;
     }
-    isa_bus_irqs(isa_bus, x86ms->gsi);
 
     if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
         pc_i8259_create(isa_bus, gsi_state->i8259_irq);
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index ed7d58bc98..88a6bf28ea 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -39,7 +39,7 @@
 
 static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq)
 {
-    qemu_set_irq(piix3->pic[pic_irq],
+    qemu_set_irq(piix3->pic.in_irqs[pic_irq],
                  !!(piix3->pic_levels &
                     (((1ULL << PIIX_NUM_PIRQS) - 1) <<
                      (pic_irq * PIIX_NUM_PIRQS))));
@@ -297,6 +297,13 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
         return;
     }
 
+    /* PIC */
+    if (!qdev_realize(DEVICE(&d->pic), NULL, errp)) {
+        return;
+    }
+
+    isa_bus_irqs(isa_bus, d->pic.in_irqs);
+
     memory_region_init_io(&d->rcr_mem, OBJECT(dev), &rcr_ops, d,
                           "piix3-reset-control", 1);
     memory_region_add_subregion_overlap(pci_address_space_io(dev),
@@ -360,6 +367,7 @@ static void pci_piix3_init(Object *obj)
 {
     PIIX3State *d = PIIX3_PCI_DEVICE(obj);
 
+    object_initialize_child(obj, "pic", &d->pic, TYPE_ISA_PIC);
     object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
 }
 
diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig
index d22ac4a4b9..79f5925dbe 100644
--- a/hw/i386/Kconfig
+++ b/hw/i386/Kconfig
@@ -72,6 +72,7 @@ config I440FX
     select PC_PCI
     select PC_ACPI
     select ACPI_SMBUS
+    select I8259
     select PCI_I440FX
     select PIIX3
     select IDE_PIIX
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index 6c154d88c7..694c8840de 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -35,6 +35,7 @@ config PIIX3
     bool
     select ACPI_PIIX4
     select I8257
+    select I8259
     select ISA_BUS
     select MC146818RTC
     select USB_UHCI
-- 
2.39.0



  parent reply	other threads:[~2023-01-05 14:40 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-05 14:31 [PATCH v5 00/31] Consolidate PIIX south bridges Bernhard Beschow
2023-01-05 14:31 ` [PATCH v5 01/31] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition Bernhard Beschow
2023-01-05 14:31 ` [PATCH v5 02/31] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 03/31] hw/isa/piix4: Correct IRQRC[A:D] reset values Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 04/31] hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 05/31] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 06/31] hw/i386/pc_piix: Associate pci_map_irq_fn as soon as PCI bus is created Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 07/31] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 08/31] hw/i386/pc: Create RTC controllers in south bridges Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 09/31] hw/i386/pc: No need for rtc_state to be an out-parameter Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 10/31] hw/isa/piix3: Create USB controller in host device Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 11/31] hw/isa/piix3: Create power management " Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 12/31] hw/intc/i8259: Make using the isa_pic singleton more type-safe Bernhard Beschow
2023-01-07 23:28   ` Mark Cave-Ayland
2023-01-05 14:32 ` [PATCH v5 13/31] hw/intc/i8259: Introduce i8259 proxy "isa-pic" Bernhard Beschow
2023-01-07 23:45   ` Mark Cave-Ayland
2023-01-08 15:30     ` Bernhard Beschow
2023-01-05 14:32 ` Bernhard Beschow [this message]
2023-01-05 14:32 ` [PATCH v5 15/31] hw/isa/piix3: Create IDE controller in host device Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 16/31] hw/isa/piix3: Wire up ACPI interrupt internally Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 17/31] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 18/31] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 19/31] hw/isa/piix3: Rename piix3_reset() " Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 20/31] hw/isa/piix3: Drop the "3" from PIIX base class Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 21/31] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 22/31] hw/isa/piix4: Remove unused inbound ISA interrupt lines Bernhard Beschow
2023-01-07 23:47   ` Mark Cave-Ayland
2023-01-05 14:32 ` [PATCH v5 23/31] hw/isa/piix4: Use ISA PIC device Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 24/31] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2023-01-07 23:48   ` Mark Cave-Ayland
2023-01-08 15:31     ` Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 25/31] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 26/31] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 27/31] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 28/31] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 29/31] hw/isa/piix: Rename functions to be shared for interrupt triggering Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 30/31] hw/isa/piix: Consolidate IRQ triggering Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 31/31] hw/isa/piix: Share PIIX3's base class with PIIX4 Bernhard Beschow
2023-01-05 16:39 ` [PATCH v5 00/31] Consolidate PIIX south bridges Michael S. Tsirkin
2023-01-05 17:29   ` Bernhard Beschow
2023-01-07 23:57 ` Mark Cave-Ayland
2023-01-08 15:12   ` Bernhard Beschow
2023-01-08 18:28     ` Philippe Mathieu-Daudé
2023-01-08 21:18       ` Bernhard Beschow
2023-01-09 17:33       ` Bernhard Beschow

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