From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Taniya Das <quic_tdas@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH v2 04/14] clk: qcom: cpu-8996: fix the init clock rate
Date: Wed, 11 Jan 2023 23:01:18 +0300 [thread overview]
Message-ID: <20230111200128.2593359-5-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20230111200128.2593359-1-dmitry.baryshkov@linaro.org>
Change PLL programming to let both power and performance cluster clocks
to start from the maximum common frequency.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/clk-cpu-8996.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index ed8cb558e1aa..d51965fda56d 100644
--- a/drivers/clk/qcom/clk-cpu-8996.c
+++ b/drivers/clk/qcom/clk-cpu-8996.c
@@ -102,7 +102,7 @@ static const u8 alt_pll_regs[PLL_OFF_MAX_REGS] = {
/* PLLs */
static const struct alpha_pll_config hfpll_config = {
- .l = 60,
+ .l = 54,
.config_ctl_val = 0x200d4828,
.config_ctl_hi_val = 0x006,
.test_ctl_val = 0x1c000000,
--
2.30.2
next prev parent reply other threads:[~2023-01-11 20:05 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-11 20:01 [PATCH v2 00/14] clk: qcom: cpu-8996: stability fixes Dmitry Baryshkov
2023-01-11 20:01 ` [PATCH v2 01/14] dt-bindings: clock: qcom,msm8996-apcc: add sys_apcs_aux clock Dmitry Baryshkov
2023-01-12 8:38 ` Krzysztof Kozlowski
2023-01-11 20:01 ` [PATCH v2 02/14] clk: qcom: clk-alpha-pll: program PLL_TEST/PLL_TEST_U if required Dmitry Baryshkov
2023-01-11 20:01 ` [PATCH v2 03/14] clk: qcom: cpu-8996: correct PLL programming Dmitry Baryshkov
2023-01-11 20:01 ` Dmitry Baryshkov [this message]
2023-01-11 20:01 ` [PATCH v2 05/14] clk: qcom: cpu-8996: support using GPLL0 as SMUX input Dmitry Baryshkov
2023-01-11 20:01 ` [PATCH v2 06/14] clk: qcom: cpu-8996: skip ACD init if the setup is valid Dmitry Baryshkov
2023-01-11 20:01 ` [PATCH v2 07/14] clk: qcom: cpu-8996: simplify the cpu_clk_notifier_cb Dmitry Baryshkov
2023-01-11 20:01 ` [PATCH v2 08/14] clk: qcom: cpu-8996: setup PLLs before registering clocks Dmitry Baryshkov
2023-01-11 20:01 ` [PATCH v2 09/14] clk: qcom: cpu-8996: move qcom_cpu_clk_msm8996_acd_init call Dmitry Baryshkov
2023-01-11 20:01 ` [PATCH v2 10/14] clk: qcom: cpu-8996: fix PLL configuration sequence Dmitry Baryshkov
2023-01-11 20:01 ` [PATCH v2 11/14] clk: qcom: cpu-8996: fix ACD initialization Dmitry Baryshkov
2023-01-11 20:01 ` [PATCH v2 12/14] clk: qcom: cpu-8996: fix PLL clock ops Dmitry Baryshkov
2023-01-11 20:01 ` [PATCH v2 13/14] clk: qcom: cpu-8996: change setup sequence to follow vendor kernel Dmitry Baryshkov
2023-01-11 20:01 ` [PATCH v2 14/14] arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input Dmitry Baryshkov
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