From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 17D7FC54EBE for ; Thu, 12 Jan 2023 19:11:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Exo1KwBuA3Yv6lGoNK/6htIcML7tbiOW8Dj+LPIXQdo=; b=pc9EMABvZAIvP9 ZiyhHFnBVx/sBmwFGPZLxZVijFuBm+AcD0QcUxVTRpjmedrusMxE8LHq/SG5kxZYRFycyz+K6iXpg NlMjFb0X2+SY93XfXw+aHNflLIhUXH7EBT+kZ8WlwbwVA4LJr3QDMuJot/B1jqhc6KGEkAEPWMJex eeEn57z7wwQd/Y+HFvnu/YOAvxC3Ah/C/YEVeZ40TTmK/hrMsaAhQn+OptCqMGUdZAoVYMDS7M2jN ZBeqs4E+pznlJrvtACPrJCVsVUGx9PCKSceWPuvmGY9BbdBiweuxObM0YfTPzsAxOpvjNMgi7qd+p 1dk/C2DYrpIbd2xXMf3w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pG2xU-00GP36-LU; Thu, 12 Jan 2023 19:09:52 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pG2xR-00GP2Z-DN for linux-arm-kernel@lists.infradead.org; Thu, 12 Jan 2023 19:09:50 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id D9B70B82012; Thu, 12 Jan 2023 19:09:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4EE6BC433D2; Thu, 12 Jan 2023 19:09:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1673550586; bh=LfVocOPeuXU9PT7e7b20/1KuExU0UCPaV8icE6vvT7E=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=tD3acM42NClnAlycdRwkO7q9r46gNcdJFDIYdMPkYmnnUqI3U+ftoqv8VLWoTUFMA VCOK8H1uJWoeYJIvUSMS+Ks20CTQDiERDYDrPGQ9IzLqJGvSsYro79DI6VzutKvKye hdSRNCMao/RrkYacvCTYmTq5UmYV8XTZaN8HCnbZbvC08lhy3pPQoAvZMT1zLOz4Bs cjaxqjnZAhr4/H+d7sQ9WpXd3cvIgE0PHVmsN1yW82a3qLKPnPcReHWq0NPb+75Uwz bf7E6a7WTx4Yc+zQDVRNuFyCavpSPsjsDEumoH5G3A01NkyMLjku5GGBNIIISO0uDp s5zRzOUYXpPhg== Date: Thu, 12 Jan 2023 11:09:45 -0800 From: Jakub Kicinski To: "Kubalewski, Arkadiusz" Cc: Vadim Fedorenko , Jiri Pirko , Jonathan Lemon , Paolo Abeni , "netdev@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-clk@vger.kernel.org" Subject: Re: [RFC PATCH v4 0/4] Create common DPLL/clock configuration API Message-ID: <20230112110945.6f168a3e@kernel.org> In-Reply-To: References: <20221129213724.10119-1-vfedorenko@novek.ru> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230112_110949_653556_9A02519C X-CRM114-Status: GOOD ( 13.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 12 Jan 2023 12:23:29 +0000 Kubalewski, Arkadiusz wrote: > Then we would create and register muxed pins with existing dpll pins. > Each muxed pin is allocated and registered with each parent it can provide > signal with, like below (number in bracket is parent idx): > +---+ > 0--| | > +---+ | | > 8(2) / 9(3)---| | 1--| D |--5 > | | | P | > 10(2) / 11(3)---| M |---2--| L |--6 > | U | | L | > 12(2) / 13(3)---| X |---3--| |--7 > | | | | > 14(2) / 15(3)---| | 4--| | > +---+ +---+ > > Controlling the mux input/output: > In this case selecting pin #8 would provide its signal into DPLLs input#2 and > selecting #9 would provide its signal into DPLLs input#3. I agree with Jiri, the duplication seems unnecessary. My thinking would be to handle this as follows: +---+ 0--| | +---+ | | 10---| | 1--| D |--5 | | | P | 11---| M |-8---2--| L |--6 | U | | L | 12---| X |-9---3--| |--7 | | | | 13---| | 4--| | +---+ +---+ Give the user the ability to both select the inputs to DPLL from 0-4 and from 10-13. If 10-13 are selected the core should give mapping things automatically a try (but we don't need to support auto-mapping for muxes with more than one output from the start). There should also be an API for manually configuring muxes. Eg. User requests DPLL inputs: 0, 1, 10, 11 Core automatically maps 10 -> 8, 11 -> 9 User requests DPLL inputs: 0, 1, 10, 11, 12 Core responds with an error User requests DPLL inputs: 0, 1, 2, 3 Core doesn't touch the mux User requests mux to direct 10 -> 8 User requests mux to direct 11 -> 9 Now the config is equivalent to case #1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 386FBC61DB3 for ; Thu, 12 Jan 2023 19:22:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240505AbjALTWT (ORCPT ); Thu, 12 Jan 2023 14:22:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44830 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240378AbjALTVs (ORCPT ); Thu, 12 Jan 2023 14:21:48 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 51E14676D4; Thu, 12 Jan 2023 11:09:49 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id DE766B82016; Thu, 12 Jan 2023 19:09:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4EE6BC433D2; Thu, 12 Jan 2023 19:09:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1673550586; bh=LfVocOPeuXU9PT7e7b20/1KuExU0UCPaV8icE6vvT7E=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=tD3acM42NClnAlycdRwkO7q9r46gNcdJFDIYdMPkYmnnUqI3U+ftoqv8VLWoTUFMA VCOK8H1uJWoeYJIvUSMS+Ks20CTQDiERDYDrPGQ9IzLqJGvSsYro79DI6VzutKvKye hdSRNCMao/RrkYacvCTYmTq5UmYV8XTZaN8HCnbZbvC08lhy3pPQoAvZMT1zLOz4Bs cjaxqjnZAhr4/H+d7sQ9WpXd3cvIgE0PHVmsN1yW82a3qLKPnPcReHWq0NPb+75Uwz bf7E6a7WTx4Yc+zQDVRNuFyCavpSPsjsDEumoH5G3A01NkyMLjku5GGBNIIISO0uDp s5zRzOUYXpPhg== Date: Thu, 12 Jan 2023 11:09:45 -0800 From: Jakub Kicinski To: "Kubalewski, Arkadiusz" Cc: Vadim Fedorenko , Jiri Pirko , Jonathan Lemon , Paolo Abeni , "netdev@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-clk@vger.kernel.org" Subject: Re: [RFC PATCH v4 0/4] Create common DPLL/clock configuration API Message-ID: <20230112110945.6f168a3e@kernel.org> In-Reply-To: References: <20221129213724.10119-1-vfedorenko@novek.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Thu, 12 Jan 2023 12:23:29 +0000 Kubalewski, Arkadiusz wrote: > Then we would create and register muxed pins with existing dpll pins. > Each muxed pin is allocated and registered with each parent it can provide > signal with, like below (number in bracket is parent idx): > +---+ > 0--| | > +---+ | | > 8(2) / 9(3)---| | 1--| D |--5 > | | | P | > 10(2) / 11(3)---| M |---2--| L |--6 > | U | | L | > 12(2) / 13(3)---| X |---3--| |--7 > | | | | > 14(2) / 15(3)---| | 4--| | > +---+ +---+ > > Controlling the mux input/output: > In this case selecting pin #8 would provide its signal into DPLLs input#2 and > selecting #9 would provide its signal into DPLLs input#3. I agree with Jiri, the duplication seems unnecessary. My thinking would be to handle this as follows: +---+ 0--| | +---+ | | 10---| | 1--| D |--5 | | | P | 11---| M |-8---2--| L |--6 | U | | L | 12---| X |-9---3--| |--7 | | | | 13---| | 4--| | +---+ +---+ Give the user the ability to both select the inputs to DPLL from 0-4 and from 10-13. If 10-13 are selected the core should give mapping things automatically a try (but we don't need to support auto-mapping for muxes with more than one output from the start). There should also be an API for manually configuring muxes. Eg. User requests DPLL inputs: 0, 1, 10, 11 Core automatically maps 10 -> 8, 11 -> 9 User requests DPLL inputs: 0, 1, 10, 11, 12 Core responds with an error User requests DPLL inputs: 0, 1, 2, 3 Core doesn't touch the mux User requests mux to direct 10 -> 8 User requests mux to direct 11 -> 9 Now the config is equivalent to case #1