From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CB20C678DC for ; Fri, 13 Jan 2023 06:30:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241285AbjAMGaA (ORCPT ); Fri, 13 Jan 2023 01:30:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37566 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240753AbjAMG0t (ORCPT ); Fri, 13 Jan 2023 01:26:49 -0500 Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 873DE5BA14; Thu, 12 Jan 2023 22:24:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender :Reply-To:Content-Type:Content-ID:Content-Description; bh=iukbm4IkjfomIK3EfPQb3pM2uZtgleJjPX7CiCdGPsw=; b=bctQ26YIIgDNETWqWEH1faeoiC 5ktgEfTapXGrurmR9U4e7rnZhY6Cwur/HNcTFDEguI7nrrjhQMk5LJZRnXQk/Lh/SgAsj5oUR1cNC 6SWrceAqwQKLhXM4b9+5hQvSpMqgJj6Fi1i/TaketNXyVfW/AwoYVQnx70z7dzq4fJub9GsHbuyZ5 HDmhDiNuu8m8OdZDuEJyIrydgrmSdNheR0U9+6Rotsg72jUQftqVDSCn6tM1GTULxOLQT60TelhnY qeYO2LcPFeCb7ZL/Bxwy4AWEhdIRBjlajWtTjxyUMXW5KzAfXsUm2V07QOaprHacrHX0gFnJIBipd ZAhGSquQ==; Received: from [2001:4bb8:181:656b:9509:7d20:8d39:f895] (helo=localhost) by bombadil.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1pGDUZ-000lye-Sk; Fri, 13 Jan 2023 06:24:44 +0000 From: Christoph Hellwig To: Yoshinori Sato , Rich Felker , Arnd Bergmann , Greg Kroah-Hartman Cc: Laurent Pinchart , Kieran Bingham , Geert Uytterhoeven , linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, dmaengine@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-input@vger.kernel.org, linux-media@vger.kernel.org, linux-mmc@vger.kernel.org, linux-mtd@lists.infradead.org, netdev@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, linux-usb@vger.kernel.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org, linux-sh@vger.kernel.org Subject: [PATCH 17/22] spi: remove spi-jcore Date: Fri, 13 Jan 2023 07:23:34 +0100 Message-Id: <20230113062339.1909087-18-hch@lst.de> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230113062339.1909087-1-hch@lst.de> References: <20230113062339.1909087-1-hch@lst.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SRS-Rewrite: SMTP reverse-path rewritten from by bombadil.infradead.org. See http://www.infradead.org/rpr.html Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Now that arch/sh is removed this driver is dead code. Signed-off-by: Christoph Hellwig --- drivers/spi/Kconfig | 7 -- drivers/spi/Makefile | 1 - drivers/spi/spi-jcore.c | 235 ---------------------------------------- 3 files changed, 243 deletions(-) delete mode 100644 drivers/spi/spi-jcore.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 76f3bc6f8c81fc..17c75f5c19be75 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -483,13 +483,6 @@ config SPI_INTEL_PLATFORM To compile this driver as a module, choose M here: the module will be called spi-intel-platform. -config SPI_JCORE - tristate "J-Core SPI Master" - depends on OF && (SUPERH || COMPILE_TEST) - help - This enables support for the SPI master controller in the J-Core - synthesizable, open source SoC. - config SPI_LM70_LLP tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" depends on PARPORT diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 27d877440c6539..2d03fcefc11ea2 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -67,7 +67,6 @@ obj-$(CONFIG_SPI_INTEL) += spi-intel.o obj-$(CONFIG_SPI_INTEL_PCI) += spi-intel-pci.o obj-$(CONFIG_SPI_INTEL_PLATFORM) += spi-intel-platform.o obj-$(CONFIG_SPI_LANTIQ_SSC) += spi-lantiq-ssc.o -obj-$(CONFIG_SPI_JCORE) += spi-jcore.o obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o obj-$(CONFIG_SPI_LP8841_RTC) += spi-lp8841-rtc.o obj-$(CONFIG_SPI_MESON_SPICC) += spi-meson-spicc.o diff --git a/drivers/spi/spi-jcore.c b/drivers/spi/spi-jcore.c deleted file mode 100644 index 74c8319c29f170..00000000000000 --- a/drivers/spi/spi-jcore.c +++ /dev/null @@ -1,235 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * J-Core SPI controller driver - * - * Copyright (C) 2012-2016 Smart Energy Instruments, Inc. - * - * Current version by Rich Felker - * Based loosely on initial version by Oleksandr G Zhadan - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define DRV_NAME "jcore_spi" - -#define CTRL_REG 0x0 -#define DATA_REG 0x4 - -#define JCORE_SPI_CTRL_XMIT 0x02 -#define JCORE_SPI_STAT_BUSY 0x02 -#define JCORE_SPI_CTRL_LOOP 0x08 -#define JCORE_SPI_CTRL_CS_BITS 0x15 - -#define JCORE_SPI_WAIT_RDY_MAX_LOOP 2000000 - -struct jcore_spi { - struct spi_master *master; - void __iomem *base; - unsigned int cs_reg; - unsigned int speed_reg; - unsigned int speed_hz; - unsigned int clock_freq; -}; - -static int jcore_spi_wait(void __iomem *ctrl_reg) -{ - unsigned timeout = JCORE_SPI_WAIT_RDY_MAX_LOOP; - - do { - if (!(readl(ctrl_reg) & JCORE_SPI_STAT_BUSY)) - return 0; - cpu_relax(); - } while (--timeout); - - return -EBUSY; -} - -static void jcore_spi_program(struct jcore_spi *hw) -{ - void __iomem *ctrl_reg = hw->base + CTRL_REG; - - if (jcore_spi_wait(ctrl_reg)) - dev_err(hw->master->dev.parent, - "timeout waiting to program ctrl reg.\n"); - - writel(hw->cs_reg | hw->speed_reg, ctrl_reg); -} - -static void jcore_spi_chipsel(struct spi_device *spi, bool value) -{ - struct jcore_spi *hw = spi_master_get_devdata(spi->master); - u32 csbit = 1U << (2 * spi->chip_select); - - dev_dbg(hw->master->dev.parent, "chipselect %d\n", spi->chip_select); - - if (value) - hw->cs_reg |= csbit; - else - hw->cs_reg &= ~csbit; - - jcore_spi_program(hw); -} - -static void jcore_spi_baudrate(struct jcore_spi *hw, int speed) -{ - if (speed == hw->speed_hz) - return; - hw->speed_hz = speed; - if (speed >= hw->clock_freq / 2) - hw->speed_reg = 0; - else - hw->speed_reg = ((hw->clock_freq / 2 / speed) - 1) << 27; - jcore_spi_program(hw); - dev_dbg(hw->master->dev.parent, "speed=%d reg=0x%x\n", - speed, hw->speed_reg); -} - -static int jcore_spi_txrx(struct spi_master *master, struct spi_device *spi, - struct spi_transfer *t) -{ - struct jcore_spi *hw = spi_master_get_devdata(master); - - void __iomem *ctrl_reg = hw->base + CTRL_REG; - void __iomem *data_reg = hw->base + DATA_REG; - u32 xmit; - - /* data buffers */ - const unsigned char *tx; - unsigned char *rx; - unsigned int len; - unsigned int count; - - jcore_spi_baudrate(hw, t->speed_hz); - - xmit = hw->cs_reg | hw->speed_reg | JCORE_SPI_CTRL_XMIT; - tx = t->tx_buf; - rx = t->rx_buf; - len = t->len; - - for (count = 0; count < len; count++) { - if (jcore_spi_wait(ctrl_reg)) - break; - - writel(tx ? *tx++ : 0, data_reg); - writel(xmit, ctrl_reg); - - if (jcore_spi_wait(ctrl_reg)) - break; - - if (rx) - *rx++ = readl(data_reg); - } - - spi_finalize_current_transfer(master); - - if (count < len) - return -EREMOTEIO; - - return 0; -} - -static int jcore_spi_probe(struct platform_device *pdev) -{ - struct device_node *node = pdev->dev.of_node; - struct jcore_spi *hw; - struct spi_master *master; - struct resource *res; - u32 clock_freq; - struct clk *clk; - int err = -ENODEV; - - master = spi_alloc_master(&pdev->dev, sizeof(struct jcore_spi)); - if (!master) - return err; - - /* Setup the master state. */ - master->num_chipselect = 3; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; - master->transfer_one = jcore_spi_txrx; - master->set_cs = jcore_spi_chipsel; - master->dev.of_node = node; - master->bus_num = pdev->id; - - hw = spi_master_get_devdata(master); - hw->master = master; - platform_set_drvdata(pdev, hw); - - /* Find and map our resources */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - goto exit_busy; - if (!devm_request_mem_region(&pdev->dev, res->start, - resource_size(res), pdev->name)) - goto exit_busy; - hw->base = devm_ioremap(&pdev->dev, res->start, - resource_size(res)); - if (!hw->base) - goto exit_busy; - - /* - * The SPI clock rate controlled via a configurable clock divider - * which is applied to the reference clock. A 50 MHz reference is - * most suitable for obtaining standard SPI clock rates, but some - * designs may have a different reference clock, and the DT must - * make the driver aware so that it can properly program the - * requested rate. If the clock is omitted, 50 MHz is assumed. - */ - clock_freq = 50000000; - clk = devm_clk_get(&pdev->dev, "ref_clk"); - if (!IS_ERR(clk)) { - if (clk_prepare_enable(clk) == 0) { - clock_freq = clk_get_rate(clk); - clk_disable_unprepare(clk); - } else - dev_warn(&pdev->dev, "could not enable ref_clk\n"); - } - hw->clock_freq = clock_freq; - - /* Initialize all CS bits to high. */ - hw->cs_reg = JCORE_SPI_CTRL_CS_BITS; - jcore_spi_baudrate(hw, 400000); - - /* Register our spi controller */ - err = devm_spi_register_master(&pdev->dev, master); - if (err) - goto exit; - - return 0; - -exit_busy: - err = -EBUSY; -exit: - spi_master_put(master); - return err; -} - -static const struct of_device_id jcore_spi_of_match[] = { - { .compatible = "jcore,spi2" }, - {}, -}; -MODULE_DEVICE_TABLE(of, jcore_spi_of_match); - -static struct platform_driver jcore_spi_driver = { - .probe = jcore_spi_probe, - .driver = { - .name = DRV_NAME, - .of_match_table = jcore_spi_of_match, - }, -}; - -module_platform_driver(jcore_spi_driver); - -MODULE_DESCRIPTION("J-Core SPI driver"); -MODULE_AUTHOR("Rich Felker "); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:" DRV_NAME); -- 2.39.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E707C7112F for ; Fri, 13 Jan 2023 06:29:40 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id C280D8C90; Fri, 13 Jan 2023 07:28:47 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz C280D8C90 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1673591377; bh=JYBI/ukNx4Qndtq/MLdDg1/DgGYtiEJ8/TvHDtfBN1A=; h=From:To:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: Cc:From; b=j+fxTkZzBJHnHHfVRuftW1CWVVb18xSLKp93CX4bawK67OUL9LXjPfn6xqyDXSBCD 0Ah+OjC2CzRlOpe7BDLdqSYQlRD8MsmcJdnWce7ztIkoy5OTLlpdAT2f530Hza82/k Db2Aj1g/RGk/Lqnv5SqFCAefaj7bF1uqDm+Hcdco= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id B4268F804A9; Fri, 13 Jan 2023 07:25:04 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 642CBF804BC; Fri, 13 Jan 2023 07:25:03 +0100 (CET) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 6A35DF804D2 for ; Fri, 13 Jan 2023 07:25:01 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 6A35DF804D2 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=bctQ26YI DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender :Reply-To:Content-Type:Content-ID:Content-Description; bh=iukbm4IkjfomIK3EfPQb3pM2uZtgleJjPX7CiCdGPsw=; b=bctQ26YIIgDNETWqWEH1faeoiC 5ktgEfTapXGrurmR9U4e7rnZhY6Cwur/HNcTFDEguI7nrrjhQMk5LJZRnXQk/Lh/SgAsj5oUR1cNC 6SWrceAqwQKLhXM4b9+5hQvSpMqgJj6Fi1i/TaketNXyVfW/AwoYVQnx70z7dzq4fJub9GsHbuyZ5 HDmhDiNuu8m8OdZDuEJyIrydgrmSdNheR0U9+6Rotsg72jUQftqVDSCn6tM1GTULxOLQT60TelhnY qeYO2LcPFeCb7ZL/Bxwy4AWEhdIRBjlajWtTjxyUMXW5KzAfXsUm2V07QOaprHacrHX0gFnJIBipd ZAhGSquQ==; Received: from [2001:4bb8:181:656b:9509:7d20:8d39:f895] (helo=localhost) by bombadil.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1pGDUZ-000lye-Sk; Fri, 13 Jan 2023 06:24:44 +0000 From: Christoph Hellwig To: Yoshinori Sato , Rich Felker , Arnd Bergmann , Greg Kroah-Hartman Subject: [PATCH 17/22] spi: remove spi-jcore Date: Fri, 13 Jan 2023 07:23:34 +0100 Message-Id: <20230113062339.1909087-18-hch@lst.de> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230113062339.1909087-1-hch@lst.de> References: <20230113062339.1909087-1-hch@lst.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SRS-Rewrite: SMTP reverse-path rewritten from by bombadil.infradead.org. See http://www.infradead.org/rpr.html X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-fbdev@vger.kernel.org, Geert Uytterhoeven , linux-sh@vger.kernel.org, alsa-devel@alsa-project.org, dri-devel@lists.freedesktop.org, linux-mtd@lists.infradead.org, Laurent Pinchart , linux-arch@vger.kernel.org, linux-serial@vger.kernel.org, linux-input@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-gpio@vger.kernel.org, netdev@vger.kernel.org, linux-usb@vger.kernel.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Kieran Bingham , linux-i2c@vger.kernel.org, dmaengine@vger.kernel.org, linux-rtc@vger.kernel.org Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Now that arch/sh is removed this driver is dead code. Signed-off-by: Christoph Hellwig --- drivers/spi/Kconfig | 7 -- drivers/spi/Makefile | 1 - drivers/spi/spi-jcore.c | 235 ---------------------------------------- 3 files changed, 243 deletions(-) delete mode 100644 drivers/spi/spi-jcore.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 76f3bc6f8c81fc..17c75f5c19be75 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -483,13 +483,6 @@ config SPI_INTEL_PLATFORM To compile this driver as a module, choose M here: the module will be called spi-intel-platform. -config SPI_JCORE - tristate "J-Core SPI Master" - depends on OF && (SUPERH || COMPILE_TEST) - help - This enables support for the SPI master controller in the J-Core - synthesizable, open source SoC. - config SPI_LM70_LLP tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" depends on PARPORT diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 27d877440c6539..2d03fcefc11ea2 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -67,7 +67,6 @@ obj-$(CONFIG_SPI_INTEL) += spi-intel.o obj-$(CONFIG_SPI_INTEL_PCI) += spi-intel-pci.o obj-$(CONFIG_SPI_INTEL_PLATFORM) += spi-intel-platform.o obj-$(CONFIG_SPI_LANTIQ_SSC) += spi-lantiq-ssc.o -obj-$(CONFIG_SPI_JCORE) += spi-jcore.o obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o obj-$(CONFIG_SPI_LP8841_RTC) += spi-lp8841-rtc.o obj-$(CONFIG_SPI_MESON_SPICC) += spi-meson-spicc.o diff --git a/drivers/spi/spi-jcore.c b/drivers/spi/spi-jcore.c deleted file mode 100644 index 74c8319c29f170..00000000000000 --- a/drivers/spi/spi-jcore.c +++ /dev/null @@ -1,235 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * J-Core SPI controller driver - * - * Copyright (C) 2012-2016 Smart Energy Instruments, Inc. - * - * Current version by Rich Felker - * Based loosely on initial version by Oleksandr G Zhadan - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define DRV_NAME "jcore_spi" - -#define CTRL_REG 0x0 -#define DATA_REG 0x4 - -#define JCORE_SPI_CTRL_XMIT 0x02 -#define JCORE_SPI_STAT_BUSY 0x02 -#define JCORE_SPI_CTRL_LOOP 0x08 -#define JCORE_SPI_CTRL_CS_BITS 0x15 - -#define JCORE_SPI_WAIT_RDY_MAX_LOOP 2000000 - -struct jcore_spi { - struct spi_master *master; - void __iomem *base; - unsigned int cs_reg; - unsigned int speed_reg; - unsigned int speed_hz; - unsigned int clock_freq; -}; - -static int jcore_spi_wait(void __iomem *ctrl_reg) -{ - unsigned timeout = JCORE_SPI_WAIT_RDY_MAX_LOOP; - - do { - if (!(readl(ctrl_reg) & JCORE_SPI_STAT_BUSY)) - return 0; - cpu_relax(); - } while (--timeout); - - return -EBUSY; -} - -static void jcore_spi_program(struct jcore_spi *hw) -{ - void __iomem *ctrl_reg = hw->base + CTRL_REG; - - if (jcore_spi_wait(ctrl_reg)) - dev_err(hw->master->dev.parent, - "timeout waiting to program ctrl reg.\n"); - - writel(hw->cs_reg | hw->speed_reg, ctrl_reg); -} - -static void jcore_spi_chipsel(struct spi_device *spi, bool value) -{ - struct jcore_spi *hw = spi_master_get_devdata(spi->master); - u32 csbit = 1U << (2 * spi->chip_select); - - dev_dbg(hw->master->dev.parent, "chipselect %d\n", spi->chip_select); - - if (value) - hw->cs_reg |= csbit; - else - hw->cs_reg &= ~csbit; - - jcore_spi_program(hw); -} - -static void jcore_spi_baudrate(struct jcore_spi *hw, int speed) -{ - if (speed == hw->speed_hz) - return; - hw->speed_hz = speed; - if (speed >= hw->clock_freq / 2) - hw->speed_reg = 0; - else - hw->speed_reg = ((hw->clock_freq / 2 / speed) - 1) << 27; - jcore_spi_program(hw); - dev_dbg(hw->master->dev.parent, "speed=%d reg=0x%x\n", - speed, hw->speed_reg); -} - -static int jcore_spi_txrx(struct spi_master *master, struct spi_device *spi, - struct spi_transfer *t) -{ - struct jcore_spi *hw = spi_master_get_devdata(master); - - void __iomem *ctrl_reg = hw->base + CTRL_REG; - void __iomem *data_reg = hw->base + DATA_REG; - u32 xmit; - - /* data buffers */ - const unsigned char *tx; - unsigned char *rx; - unsigned int len; - unsigned int count; - - jcore_spi_baudrate(hw, t->speed_hz); - - xmit = hw->cs_reg | hw->speed_reg | JCORE_SPI_CTRL_XMIT; - tx = t->tx_buf; - rx = t->rx_buf; - len = t->len; - - for (count = 0; count < len; count++) { - if (jcore_spi_wait(ctrl_reg)) - break; - - writel(tx ? *tx++ : 0, data_reg); - writel(xmit, ctrl_reg); - - if (jcore_spi_wait(ctrl_reg)) - break; - - if (rx) - *rx++ = readl(data_reg); - } - - spi_finalize_current_transfer(master); - - if (count < len) - return -EREMOTEIO; - - return 0; -} - -static int jcore_spi_probe(struct platform_device *pdev) -{ - struct device_node *node = pdev->dev.of_node; - struct jcore_spi *hw; - struct spi_master *master; - struct resource *res; - u32 clock_freq; - struct clk *clk; - int err = -ENODEV; - - master = spi_alloc_master(&pdev->dev, sizeof(struct jcore_spi)); - if (!master) - return err; - - /* Setup the master state. */ - master->num_chipselect = 3; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; - master->transfer_one = jcore_spi_txrx; - master->set_cs = jcore_spi_chipsel; - master->dev.of_node = node; - master->bus_num = pdev->id; - - hw = spi_master_get_devdata(master); - hw->master = master; - platform_set_drvdata(pdev, hw); - - /* Find and map our resources */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - goto exit_busy; - if (!devm_request_mem_region(&pdev->dev, res->start, - resource_size(res), pdev->name)) - goto exit_busy; - hw->base = devm_ioremap(&pdev->dev, res->start, - resource_size(res)); - if (!hw->base) - goto exit_busy; - - /* - * The SPI clock rate controlled via a configurable clock divider - * which is applied to the reference clock. A 50 MHz reference is - * most suitable for obtaining standard SPI clock rates, but some - * designs may have a different reference clock, and the DT must - * make the driver aware so that it can properly program the - * requested rate. If the clock is omitted, 50 MHz is assumed. - */ - clock_freq = 50000000; - clk = devm_clk_get(&pdev->dev, "ref_clk"); - if (!IS_ERR(clk)) { - if (clk_prepare_enable(clk) == 0) { - clock_freq = clk_get_rate(clk); - clk_disable_unprepare(clk); - } else - dev_warn(&pdev->dev, "could not enable ref_clk\n"); - } - hw->clock_freq = clock_freq; - - /* Initialize all CS bits to high. */ - hw->cs_reg = JCORE_SPI_CTRL_CS_BITS; - jcore_spi_baudrate(hw, 400000); - - /* Register our spi controller */ - err = devm_spi_register_master(&pdev->dev, master); - if (err) - goto exit; - - return 0; - -exit_busy: - err = -EBUSY; -exit: - spi_master_put(master); - return err; -} - -static const struct of_device_id jcore_spi_of_match[] = { - { .compatible = "jcore,spi2" }, - {}, -}; -MODULE_DEVICE_TABLE(of, jcore_spi_of_match); - -static struct platform_driver jcore_spi_driver = { - .probe = jcore_spi_probe, - .driver = { - .name = DRV_NAME, - .of_match_table = jcore_spi_of_match, - }, -}; - -module_platform_driver(jcore_spi_driver); - -MODULE_DESCRIPTION("J-Core SPI driver"); -MODULE_AUTHOR("Rich Felker "); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:" DRV_NAME); -- 2.39.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 527D5C54EBD for ; Fri, 13 Jan 2023 07:31:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dZDamXC+tlEJttoOkurJeDS4hb0NTJWTWnUIUNqyGS8=; b=M5sqI3htlJod6Y G+Qr5oT0+k/t+d3bE8RWMCPZ0nPuo2RDInJpIRrSymNXtIcGBUyOIRp8sjB/VmJM9aRLrMyBo8+xn Kg+yul54KxO5qm68zQNCCntk5dMADhCia2SBvLSO3Cttuwo1T8grDuGplqrVRtwqZLtospr4Bxfj9 O+WJ1coUOl4Uz2IzoeAA60pE27hvTvL7xJi4uoAb1tBzdgBgnqZBWizxmlQS9H4M3lyc/8tYEglhX haMWYXrSJLMokqcUxLbP1z3K62lWBIVHg3TirHKzqohvRqM/kbyqQqGfpxerNNPy+VIBqBowPPH12 e/P4ew+ZlTVJ9ihC4piA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pGEWv-000zIo-FO; Fri, 13 Jan 2023 07:31:13 +0000 Received: from [2001:4bb8:181:656b:9509:7d20:8d39:f895] (helo=localhost) by bombadil.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1pGDUZ-000lye-Sk; Fri, 13 Jan 2023 06:24:44 +0000 From: Christoph Hellwig To: Yoshinori Sato , Rich Felker , Arnd Bergmann , Greg Kroah-Hartman Cc: Laurent Pinchart , Kieran Bingham , Geert Uytterhoeven , linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, dmaengine@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-input@vger.kernel.org, linux-media@vger.kernel.org, linux-mmc@vger.kernel.org, linux-mtd@lists.infradead.org, netdev@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, linux-usb@vger.kernel.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org, linux-sh@vger.kernel.org Subject: [PATCH 17/22] spi: remove spi-jcore Date: Fri, 13 Jan 2023 07:23:34 +0100 Message-Id: <20230113062339.1909087-18-hch@lst.de> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230113062339.1909087-1-hch@lst.de> References: <20230113062339.1909087-1-hch@lst.de> MIME-Version: 1.0 X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org Now that arch/sh is removed this driver is dead code. Signed-off-by: Christoph Hellwig --- drivers/spi/Kconfig | 7 -- drivers/spi/Makefile | 1 - drivers/spi/spi-jcore.c | 235 ---------------------------------------- 3 files changed, 243 deletions(-) delete mode 100644 drivers/spi/spi-jcore.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 76f3bc6f8c81fc..17c75f5c19be75 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -483,13 +483,6 @@ config SPI_INTEL_PLATFORM To compile this driver as a module, choose M here: the module will be called spi-intel-platform. -config SPI_JCORE - tristate "J-Core SPI Master" - depends on OF && (SUPERH || COMPILE_TEST) - help - This enables support for the SPI master controller in the J-Core - synthesizable, open source SoC. - config SPI_LM70_LLP tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" depends on PARPORT diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 27d877440c6539..2d03fcefc11ea2 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -67,7 +67,6 @@ obj-$(CONFIG_SPI_INTEL) += spi-intel.o obj-$(CONFIG_SPI_INTEL_PCI) += spi-intel-pci.o obj-$(CONFIG_SPI_INTEL_PLATFORM) += spi-intel-platform.o obj-$(CONFIG_SPI_LANTIQ_SSC) += spi-lantiq-ssc.o -obj-$(CONFIG_SPI_JCORE) += spi-jcore.o obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o obj-$(CONFIG_SPI_LP8841_RTC) += spi-lp8841-rtc.o obj-$(CONFIG_SPI_MESON_SPICC) += spi-meson-spicc.o diff --git a/drivers/spi/spi-jcore.c b/drivers/spi/spi-jcore.c deleted file mode 100644 index 74c8319c29f170..00000000000000 --- a/drivers/spi/spi-jcore.c +++ /dev/null @@ -1,235 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * J-Core SPI controller driver - * - * Copyright (C) 2012-2016 Smart Energy Instruments, Inc. - * - * Current version by Rich Felker - * Based loosely on initial version by Oleksandr G Zhadan - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define DRV_NAME "jcore_spi" - -#define CTRL_REG 0x0 -#define DATA_REG 0x4 - -#define JCORE_SPI_CTRL_XMIT 0x02 -#define JCORE_SPI_STAT_BUSY 0x02 -#define JCORE_SPI_CTRL_LOOP 0x08 -#define JCORE_SPI_CTRL_CS_BITS 0x15 - -#define JCORE_SPI_WAIT_RDY_MAX_LOOP 2000000 - -struct jcore_spi { - struct spi_master *master; - void __iomem *base; - unsigned int cs_reg; - unsigned int speed_reg; - unsigned int speed_hz; - unsigned int clock_freq; -}; - -static int jcore_spi_wait(void __iomem *ctrl_reg) -{ - unsigned timeout = JCORE_SPI_WAIT_RDY_MAX_LOOP; - - do { - if (!(readl(ctrl_reg) & JCORE_SPI_STAT_BUSY)) - return 0; - cpu_relax(); - } while (--timeout); - - return -EBUSY; -} - -static void jcore_spi_program(struct jcore_spi *hw) -{ - void __iomem *ctrl_reg = hw->base + CTRL_REG; - - if (jcore_spi_wait(ctrl_reg)) - dev_err(hw->master->dev.parent, - "timeout waiting to program ctrl reg.\n"); - - writel(hw->cs_reg | hw->speed_reg, ctrl_reg); -} - -static void jcore_spi_chipsel(struct spi_device *spi, bool value) -{ - struct jcore_spi *hw = spi_master_get_devdata(spi->master); - u32 csbit = 1U << (2 * spi->chip_select); - - dev_dbg(hw->master->dev.parent, "chipselect %d\n", spi->chip_select); - - if (value) - hw->cs_reg |= csbit; - else - hw->cs_reg &= ~csbit; - - jcore_spi_program(hw); -} - -static void jcore_spi_baudrate(struct jcore_spi *hw, int speed) -{ - if (speed == hw->speed_hz) - return; - hw->speed_hz = speed; - if (speed >= hw->clock_freq / 2) - hw->speed_reg = 0; - else - hw->speed_reg = ((hw->clock_freq / 2 / speed) - 1) << 27; - jcore_spi_program(hw); - dev_dbg(hw->master->dev.parent, "speed=%d reg=0x%x\n", - speed, hw->speed_reg); -} - -static int jcore_spi_txrx(struct spi_master *master, struct spi_device *spi, - struct spi_transfer *t) -{ - struct jcore_spi *hw = spi_master_get_devdata(master); - - void __iomem *ctrl_reg = hw->base + CTRL_REG; - void __iomem *data_reg = hw->base + DATA_REG; - u32 xmit; - - /* data buffers */ - const unsigned char *tx; - unsigned char *rx; - unsigned int len; - unsigned int count; - - jcore_spi_baudrate(hw, t->speed_hz); - - xmit = hw->cs_reg | hw->speed_reg | JCORE_SPI_CTRL_XMIT; - tx = t->tx_buf; - rx = t->rx_buf; - len = t->len; - - for (count = 0; count < len; count++) { - if (jcore_spi_wait(ctrl_reg)) - break; - - writel(tx ? *tx++ : 0, data_reg); - writel(xmit, ctrl_reg); - - if (jcore_spi_wait(ctrl_reg)) - break; - - if (rx) - *rx++ = readl(data_reg); - } - - spi_finalize_current_transfer(master); - - if (count < len) - return -EREMOTEIO; - - return 0; -} - -static int jcore_spi_probe(struct platform_device *pdev) -{ - struct device_node *node = pdev->dev.of_node; - struct jcore_spi *hw; - struct spi_master *master; - struct resource *res; - u32 clock_freq; - struct clk *clk; - int err = -ENODEV; - - master = spi_alloc_master(&pdev->dev, sizeof(struct jcore_spi)); - if (!master) - return err; - - /* Setup the master state. */ - master->num_chipselect = 3; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; - master->transfer_one = jcore_spi_txrx; - master->set_cs = jcore_spi_chipsel; - master->dev.of_node = node; - master->bus_num = pdev->id; - - hw = spi_master_get_devdata(master); - hw->master = master; - platform_set_drvdata(pdev, hw); - - /* Find and map our resources */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - goto exit_busy; - if (!devm_request_mem_region(&pdev->dev, res->start, - resource_size(res), pdev->name)) - goto exit_busy; - hw->base = devm_ioremap(&pdev->dev, res->start, - resource_size(res)); - if (!hw->base) - goto exit_busy; - - /* - * The SPI clock rate controlled via a configurable clock divider - * which is applied to the reference clock. A 50 MHz reference is - * most suitable for obtaining standard SPI clock rates, but some - * designs may have a different reference clock, and the DT must - * make the driver aware so that it can properly program the - * requested rate. If the clock is omitted, 50 MHz is assumed. - */ - clock_freq = 50000000; - clk = devm_clk_get(&pdev->dev, "ref_clk"); - if (!IS_ERR(clk)) { - if (clk_prepare_enable(clk) == 0) { - clock_freq = clk_get_rate(clk); - clk_disable_unprepare(clk); - } else - dev_warn(&pdev->dev, "could not enable ref_clk\n"); - } - hw->clock_freq = clock_freq; - - /* Initialize all CS bits to high. */ - hw->cs_reg = JCORE_SPI_CTRL_CS_BITS; - jcore_spi_baudrate(hw, 400000); - - /* Register our spi controller */ - err = devm_spi_register_master(&pdev->dev, master); - if (err) - goto exit; - - return 0; - -exit_busy: - err = -EBUSY; -exit: - spi_master_put(master); - return err; -} - -static const struct of_device_id jcore_spi_of_match[] = { - { .compatible = "jcore,spi2" }, - {}, -}; -MODULE_DEVICE_TABLE(of, jcore_spi_of_match); - -static struct platform_driver jcore_spi_driver = { - .probe = jcore_spi_probe, - .driver = { - .name = DRV_NAME, - .of_match_table = jcore_spi_of_match, - }, -}; - -module_platform_driver(jcore_spi_driver); - -MODULE_DESCRIPTION("J-Core SPI driver"); -MODULE_AUTHOR("Rich Felker "); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:" DRV_NAME); -- 2.39.0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/